Abstract: A network device and method may provide secure fallback operations. The device includes a port allowing the device to communicate with a network and a processor to generate a security credential, provide the security credential to a call manager during initialization, and provide the security credential to a secondary device during fallback operations. The network device may include a memory to store the security credential and routing information for fallback operations.

Abstract: A network device and method may provide secure fallback operations. The device includes a port allowing the device to communicate with a network and a processor to generate a security credential, provide the security credential to a call manager during initialization, and provide the security credential to a secondary device during fallback operations. The network device may include a memory to store the security credential and routing information for fallback operations.

Abstract: A network device and method may provide secure fallback operations. The device includes a port allowing the device to communicate with a network and a processor to generate a security credential, provide the security credential to a call manager during initialization, and provide the security credential to a secondary device during fallback operations. The network device may include a memory to store the security credential and routing information for fallback operations.

Abstract: Computer programs embodied in computer-readable media that can use canonical schemas to persist data from non-temporal tables, effective-time tables, assertion-time tables, and bitemporal tables, and that can enforce temporal integrity constraints on those tables, are provided. In one embodiment, the canonical schemas are used by database tables. In another embodiment, they are used by the physical files which persist data from those tables. Temporal metadata is used to express temporal requirements. Thus, uni-temporal, bitemporal, and temporally-enabled non-temporal tables can be generated without altering existing data models or designing temporal features into new data models. Support is also provided for managing temporal data that exists in future assertion time, and for using episodes to enforce temporal referential integrity.

Abstract: Computer programs embodied in computer-readable media that can use canonical schemas to persist data from non-temporal tables, effective-time tables, assertion-time tables, and bitemporal tables, and that can enforce temporal integrity constraints on those tables, are provided. In one embodiment, the canonical schemas are used by database tables. In another embodiment, they are used by the physical files which persist data from those tables. Temporal metadata is used to express temporal requirements. Thus, uni-temporal, bitemporal, and temporally-enabled non-temporal tables can be generated without altering existing data models or designing temporal features into new data models. Support is also provided for managing temporal data that exists in future assertion time, and for using episodes to enforce temporal referential integrity.

Abstract: Computer programs embodied in computer-readable media for managing temporal data in relational databases are provided. According to one embodiment, a computer program comprises logic for storing temporal data in tables stored in a database and using a single schema. The schema includes a first column designating an identifier of an object represented in a row of a table and columns designating an effective-time period. For a past effective-time period, the state of the object as it existed is described by atemporal data in the row. For a present effective-time period, the present state of the object is described. For a future effective-time period, the state of the object as it will exist is described by the atemporal data. Additional logic stores additional data in the tables, such as business data describing the state of the object.

Abstract: Computer programs embodied in computer-readable media for managing temporal data in relational databases are provided. According to one embodiment, a computer program comprises logic for storing temporal data in tables stored in a database and using a single schema. The schema includes a first column designating an identifier of an object represented in a row of a table and columns designating an effective-time period. For a past effective-time period, the state of the object as it existed is described by atemporal data in the row. For a present effective-time period, the present state of the object is described. For a future effective-time period, the state of the object as it will exist is described by the atemporal data. Additional logic stores additional data in the tables, such as business data describing the state of the object.

Abstract: The invention relates to a transconductance amplifier, intended to supply current variations di when it receives voltage variations dv, with a desired conversion coefficient Gm called transconductance: Gm=di/dv. The amplifier comprises a PMOS transistor (MP1) and an NMOS transistor (MP2) connected by their drains, their gates both being connected to the voltage input receiving dv; the source of the first transistor is connected to a constant current source (IB1) and to a resistor (R) and to the drain of a third MOS transistor (MN3) of the same type as the first; the sources of the second (MN2) and third (MN3) transistors are commoned, the gate of the third transistor being connected to the drains of the first and second; the output is connected to a circuit (MN4) which mirrors the current of the third transistor. The resulting amplifier has good linearity and can be used in a sample and hold device used to sample charges.

Abstract: The invention relates to a transconductance amplifier, providing current variations di=k·dv when it receives voltage variations dv. The amplifier comprises a first MOS transistor (MN4) whose drain provides differential currents (I?di, I+di). It comprises an output stage having a second transistor (MP5) of a type opposite to the first, whose source is linked to the drain of the first, whose gate is biased at a constant potential (Vref), and whose drain receives the current variations which are provided by the first transistor and which must be applied to a sampling capacitor.

Abstract: A network device and method may provide secure fallback operations. The device includes a port allowing the device to communicate with a network and a processor to generate a security credential, provide the security credential to a call manager during initialization, and provide the security credential to a secondary device during fallback operations. The network device may include a memory to store the security credential and routing information for fallback operations.

Abstract: A network device may provide secure fallback operations. The device includes a port allowing the device to communicate with a network and a processor to generate a security credential, provide the security credential to a call manager during initialization, and provide the security credential to a secondary device during fallback operations. The network device may include a memory to store the security credential and routing information for fallback operations.

Abstract: The invention relates to a transconductance amplifier, providing current variations di=k·dv when it receives voltage variations dv. The amplifier comprises a first MOS transistor (MN4) whose drain provides differential currents (I?di, I+di). It comprises an output stage having a second transistor (MP5) of a type opposite to the first, whose source is linked to the drain of the first, whose gate is biased at a constant potential (Vref), and whose drain receives the current variations which are provided by the first transistor and which must be applied to a sampling capacitor.

Abstract: The invention relates to sampled filters with finite impulse response, or FIR filters. According to the invention, there is proposed an FIR filter comprising a transconductance amplifier with controllable gain (AGM), at least one sampling capacitor (CE) intended to receive an output current (di) from the amplifier and to periodically accumulate the charges produced by N successive samples of this current, and means for controlling the gain of the amplifier to give the amplifier a desired individual gain for each of the N samples. The weighting of the coefficients of the finite impulse response filter is effected through the transconductance gain of the amplifier and not through the value of a capacitor.

Abstract: The invention relates to a transconductance amplifier, intended to supply current variations di when it receives voltage variations dv, with a desired conversion coefficient Gm called transconductance: Gm=di/dv. The amplifier comprises a PMOS transistor (MP1) and an NMOS transistor (MP2) connected by their drains, their gates both being connected to the voltage input receiving dv; the source of the first transistor is connected to a constant current source (IB1) and to a resistor (R) and to the drain of a third MOS transistor (MN3) of the same type as the first; the sources of the second (MN2) and third (MN3) transistors are commoned, the gate of the third transistor being connected to the drains of the first and second; the output is connected to a circuit (MN4) which mirrors the current of the third transistor. The resulting amplifier has good linearity and can be used in a sample and hold device used to sample charges.

Abstract: A low-phase noise voltage control oscillator (VCO) comprising a voltage source for supplying control voltage to the VCO core; a phase lock loop, having an output connected to an input of the voltage source; a VCO core, including an amplifier circuit with noiseless biasing and a tank circuit with noiseless biasing of the varactors; having an output connected to an input of the phase lock loop; and an attenuator, located between the voltage source and the VCO core, for reducing phase noise from the voltage source to the VCO core.

Abstract: A network device may provide secure fallback operations. The device includes a port allowing the device to communicate with a network and a processor to generate a security credential, provide the security credential to a call manager during initialization, and provide the security credential to a secondary device during fallback operations. The network device may include a memory to store the security credential and routing information for fallback operations.

Abstract: A low-phase noise voltage control oscillator (VCO) comprising a voltage source for supplying control voltage to the VCO core; a phase lock loop, having an output connected to an input of the voltage source; a VCO core, including an amplifier circuit with noiseless biasing and a tank circuit with noiseless biasing of the varactors; having an output connected to an input of the phase lock loop; and an attenuator, located between the voltage source and the VCO core, for reducing phase noise from the voltage source to the VCO core.

Abstract: An integrated circuit logic topology or architecture suitable for low voltage differential logic operating at radio frequencies is disclosed. The topology, referred to as enhanced pseudo common mode logic, is similar to and compatible with traditional CML, and provides the additional advantage of eliminating the need for level conversion between consecutive logic gates, thereby increasing the potential maximum operating frequency of subsystems implemented using the invention. The invention retains most of the advantages of traditional CML, and in addition permits the independent selection of output logic high level and output logic low level so that they may be matched with the succeeding circuit input levels.

Abstract: An integrated circuit logic topology or architecture suitable for low voltage differential logic operating at radio frequencies is disclosed. The topology, referred to as enhanced pseudo common mode logic, is similar to and compatible with traditional CML, and provides the additional advantage of eliminating the need for level conversion between consecutive logic gates, thereby increasing the potential maximum operating frequency of subsystems implemented using the invention. The invention retains most of the advantages of traditional CML, and in addition permits the independent selection of output logic high level and output logic low level so that they may be matched with the succeeding circuit input levels.

Abstract: A valve assembly for controlling the amount of coolant exiting an engine is provided. The valve assembly includes a valve housing that is mounted to the engine and defines a passage that is in fluid communication with a coolant outlet in the engine. A motor in the valve housing drives a valve shaft that extends into the passage and on which a butterfly valve plate is mounted. The physical geometry of the inventive assembly is not significantly effected by changes in coolant temperature or coolant contamination and the integrates the valve member and actuator in a single assembly to improve packaging and material use and eliminates potential coolant leak points.