Patents by Inventor Jan Yang

Jan Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230063435
    Abstract: A method of providing thermal conditioning for a vehicle occupant according to an example of the present disclosure includes determining a respective target temperature for each of a plurality of discrete OPZs. Each OPZ is associated with a different occupant body area. The determining is based on a difference between a first OTS indicative of a target heat flux for the occupant and a second OTS indicative of an estimated heat flux experienced by the occupant, wherein the respective target temperatures differ between the OPZs. The method includes providing thermal conditioning in each OPZ based on the target temperature for the OPZ, which includes utilizing at least one thermal effector in the OPZ. The method also includes receiving a temperature offset value for a particular one of the OPZs from the occupant, and adjusting the target temperature for the particular one of the OPZs based on the temperature offset value.
    Type: Application
    Filed: February 5, 2021
    Publication date: March 2, 2023
    Inventors: Alan Chewter, Chad Westerman, Tyler Myers, Jeremy Swanson, Jan Yang, Vladimir Jovovic
  • Patent number: 11056555
    Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: July 6, 2021
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Cheng-Hung Shih, Nian-Cih Yang, Yi-Cheng Chen, Shang-Jan Yang
  • Patent number: 10969898
    Abstract: A method for determining a force of a touch object on a touch device and for determining its related touch event is provided. The touch object touched on the touch device is clustered into different object groups. Thus, multiple touch objects are simply grouped into two object groups to easily calculate the pressing force that is provided for determining follow-up touch event.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: April 6, 2021
    Assignee: ELAN MICROELECTRONICS CORPORATION
    Inventors: Hsueh-Wei Yang, Ting-Jan Yang
  • Publication number: 20210089163
    Abstract: A touch device and an operation method thereof is provided. By determining whether the operating event of the touch device or its touchpad satisfies an exclusion condition, the command triggered when the touchpad is pressed is determined to be ignored or not. Therefore, the corresponding command triggered by pressing the touchpad downward is automatically excluded when it does not want to be triggered. Therefore, the user can naturally disable the function of the corresponding command, which is executed when the pressing module is triggered, during use without using other controls, thereby improving the convenience of use.
    Type: Application
    Filed: July 17, 2020
    Publication date: March 25, 2021
    Applicant: ELAN MICROELECTRONICS CORPORATION
    Inventors: Hsueh-Wei YANG, Ting-Jan YANG, Sung-Lin Wang
  • Publication number: 20200295123
    Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.
    Type: Application
    Filed: May 28, 2020
    Publication date: September 17, 2020
    Inventors: Cheng-Hung Shih, Nian-Cih Yang, Yi-Cheng Chen, Shang-Jan Yang
  • Publication number: 20200266262
    Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.
    Type: Application
    Filed: May 2, 2019
    Publication date: August 20, 2020
    Inventors: Cheng-Hung Shih, Nian-Cih Yang, Yi-Cheng Chen, Shang-Jan Yang
  • Publication number: 20190361563
    Abstract: A method for determining a force of a touch object on a touch device and for determining its related touch event is provided. The touch object touched on the touch device is clustered into different object groups. Thus, multiple touch objects are simply grouped into two object groups to easily calculate the pressing force that is provided for determining follow-up touch event.
    Type: Application
    Filed: May 3, 2019
    Publication date: November 28, 2019
    Applicant: ELAN MICROELECTRONICS CORPORATION
    Inventors: HSUEH-WEI YANG, TING-JAN YANG
  • Patent number: 10355679
    Abstract: A display driving circuit, a calibration module, and an associated calibration method are provided. The display driving circuit includes an internal clock circuit and the calibration module. The internal clock circuit generates an internal clock signal. The calibration module includes a counting circuit and a trimming circuit. The counting circuit counts pulses of a reference clock signal to generate a detected reference-clock count and counts pulses of the internal clock signal to generate a detected internal-clock count. The trimming circuit generates a calibration signal to adjust frequency of the internal clock signal when a predefined condition is satisfied. The predefined condition is related to comparison between a first preset count and one of the detected reference-clock count and the detected internal-clock count.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: July 16, 2019
    Assignee: NOVATEK MICROELECTRONICS CORP.
    Inventors: Chien-Chuan Huang, Chia-Hsin Tung, Chun-Hung Chen, Hao-Jan Yang, Chieh-Hsiang Chang
  • Publication number: 20190173457
    Abstract: A display driving circuit, a calibration module, and an associated calibration method are provided. The display driving circuit includes an internal clock circuit and the calibration module. The internal clock circuit generates an internal clock signal. The calibration module includes a counting circuit and a trimming circuit. The counting circuit counts pulses of a reference clock signal to generate a detected reference-clock count and counts pulses of the internal clock signal to generate a detected internal-clock count. The trimming circuit generates a calibration signal to adjust frequency of the internal clock signal when a predefined condition is satisfied. The predefined condition is related to comparison between a first preset count and one of the detected reference-clock count and the detected internal-clock count.
    Type: Application
    Filed: December 1, 2017
    Publication date: June 6, 2019
    Inventors: Chien-Chuan Huang, Chia-Hsin Tung, Chun-Hung Chen, Hao-Jan Yang, Chieh-Hsiang Chang
  • Patent number: 9065444
    Abstract: A power-up initial circuit includes a power-up control unit, a first switch and a second switch. The power-up control unit is used for receiving a high voltage start-up signal, and generating a first power-up control signal. The first switch has a first terminal for receiving an external voltage, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal. The second switch has a first terminal coupled to the third terminal of the first switch, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal for coupling to a high voltage generator.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: June 23, 2015
    Assignee: Etron Technology, Inc.
    Inventors: Yen-An Chang, Hao-Jan Yang, Chun Shiah
  • Patent number: 8823446
    Abstract: A current mirror with immunity for the variation of threshold voltage includes raising the voltage difference between the gate and the source of a MOS in the current source, and increasing the channel length of the MOS for limiting the generated reference current.
    Type: Grant
    Filed: May 24, 2009
    Date of Patent: September 2, 2014
    Assignee: Etron Technology, Inc.
    Inventors: Chun Shiah, Hao-Jan Yang, Ho-Yin Chen, Kuo-Chen Lai
  • Publication number: 20140216112
    Abstract: A cabinet lock is disclosed. The cabinet lock includes an outer lock, an extension rod and an inner lock. The outer lock and the inner lock are separately disposed in two sides of the plate. The outer lock includes an outer decorating housing, a lock head and a lock post. The extension rod can optionally connect with the lock post and extend along an axis of the lock post. The inner lock includes an inner decorating housing, a lock barrel and a bolt. The lock post can optionally connect with the lock barrel through the extension rod. The lock head drives the lock post and the lock barrel for a telescopic movement of the bolt.
    Type: Application
    Filed: March 14, 2013
    Publication date: August 7, 2014
    Applicant: REAL LOCKS & SECURITY CO., LTD.
    Inventor: Ping-Jan YANG
  • Patent number: 8742836
    Abstract: A double-swing clock generator includes a first double-swing clock generation circuit and a second double-swing clock generation circuit. The first double-swing clock generation circuit is used for receiving a first voltage, a second voltage, a first clock, an inverse first clock, and a third voltage, and outputting a first double-swing clock. The second double-swing clock generation circuit is used for receiving a fourth voltage, the second voltage, the first clock, the inverse first clock, and the third voltage, and outputting a second double-swing clock.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: June 3, 2014
    Assignee: Etron Technology, Inc.
    Inventors: Yen-An Chang, Hao-Jan Yang
  • Patent number: 8536903
    Abstract: An output stage circuit includes a first P-type metal-oxide-semiconductor transistor, a second P-type metal-oxide-semiconductor transistor, an N-type metal-oxide-semiconductor transistor, and a current source. A voltage of a third terminal of the first P-type metal-oxide-semiconductor transistor is a first voltage minus a voltage drop between a first terminal and a second terminal of the first P-type metal-oxide-semiconductor transistor. The N-type metal-oxide-semiconductor transistor is coupled between the third terminal of the first P-type metal-oxide-semiconductor transistor and the current source. A second terminal of the second P-type metal-oxide-semiconductor transistor is coupled to the third terminal of the first P-type metal-oxide-semiconductor transistor.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: September 17, 2013
    Assignee: Etron Technology, Inc.
    Inventors: Chun Shiah, Hao-Jan Yang, Ching-Ying Hsu
  • Publication number: 20130033250
    Abstract: A power-up initial circuit includes a power-up control unit, a first switch and a second switch. The power-up control unit is used for receiving a high voltage start-up signal, and generating a first power-up control signal. The first switch has a first terminal for receiving an external voltage, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal. The second switch has a first terminal coupled to the third terminal of the first switch, a second terminal for coupling to the power-up control circuit for receiving the first power-up control signal, and a third terminal for coupling to a high voltage generator.
    Type: Application
    Filed: July 25, 2012
    Publication date: February 7, 2013
    Inventors: Yen-An Chang, Hao-Jan Yang, Chun Shiah
  • Publication number: 20130033298
    Abstract: A double-swing clock generator includes a first double-swing clock generation circuit and a second double-swing clock generation circuit. The first double-swing clock generation circuit is used for receiving a first voltage, a second voltage, a first clock, an inverse first clock, and a third voltage, and outputting a first double-swing clock. The second double-swing clock generation circuit is used for receiving a fourth voltage, the second voltage, the first clock, the inverse first clock, and the third voltage, and outputting a second double-swing clock.
    Type: Application
    Filed: July 23, 2012
    Publication date: February 7, 2013
    Inventors: Yen-An Chang, Hao-Jan Yang
  • Publication number: 20120229174
    Abstract: An output stage circuit includes a first P-type metal-oxide-semiconductor transistor, a second P-type metal-oxide-semiconductor transistor, an N-type metal-oxide-semiconductor transistor, and a current source. A voltage of a third terminal of the first P-type metal-oxide-semiconductor transistor is a first voltage minus a voltage drop between a first terminal and a second terminal of the first P-type metal-oxide-semiconductor transistor. The N-type metal-oxide-semiconductor transistor is coupled between the third terminal of the first P-type metal-oxide-semiconductor transistor and the current source. A second terminal of the second P-type metal-oxide-semiconductor transistor is coupled to the third terminal of the first P-type metal-oxide-semiconductor transistor.
    Type: Application
    Filed: May 3, 2011
    Publication date: September 13, 2012
    Inventors: Chun Shiah, Hao-Jan Yang, Ching-Ying Hsu
  • Patent number: 8136377
    Abstract: A card lock structure for selectively locking or releasing a lock barrel includes a card lock casing and a card barrel limiting mechanism. The card lock casing has a card-inserting groove. The card barrel limiting mechanism has a lock barrel limiting push rod pivotally disposed in the card lock casing, an elastic element disposed between the card lock casing and the lock barrel limiting push rod, and a movable pressing unit for pressing the lock barrel limiting push rod. One end of the lock barrel limiting push rod projects outside the card lock casing in order to selectively lock or release the lock barrel. When a card passes through the card-inserting groove to push the movable pressing unit to release the lock barrel limiting push rod, the lock barrel limited push is moved by the elasticity of the elastic element in order to release the lock barrel.
    Type: Grant
    Filed: January 5, 2009
    Date of Patent: March 20, 2012
    Assignee: Cheng-Bao Engineering Enterprise Co. Ltd.
    Inventor: Ping Jan Yang
  • Patent number: 8113024
    Abstract: A double system lock apparatus comprises a lock shell, a combination lock, a key lock, and a control piece set. The lock shell has a panel and a main base assembled with each other. The combination lock has a plurality of rotating discs, coupling springs, couplings, and a shaft. The key lock has a lock cylinder and a sleeve set. From back to front, the control piece set has a first control piece, a second control piece, and a third control piece. By means of the control piece set working between the combination lock and the key lock, a double system lock apparatus of simple structure but well function has been formed.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: February 14, 2012
    Assignee: Real Locks & Security Co., Ltd.
    Inventor: Ping-Jan Yang
  • Publication number: 20110083483
    Abstract: A double system lock apparatus comprises a lock shell, a combination lock, a key lock, and a control piece set. The lock shell has a panel and a main base assembled with each other. The combination lock has a plurality of rotating discs, coupling springs, couplings, and a shaft. The key lock has a lock cylinder and a sleeve set. From back to front, the control piece set has a first control piece, a second control piece, and a third control piece. By means of the control piece set working between the combination lock and the key lock, a double system lock apparatus of simple structure but well function has been formed.
    Type: Application
    Filed: October 8, 2009
    Publication date: April 14, 2011
    Inventor: PING-JAN YANG