Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Abstract: A liquid crystal display includes: first and second thin film transistors and a compensation transistor formed on a first insulation substrate; a first gray subpixel electrode connected to a drain electrode of the first thin film transistor; a second gray subpixel electrode connected to a drain electrode of the compensation transistor and a drain electrode of the second thin film transistor; and first and second reference voltage lines overlapping at least one of the second gray subpixel electrode and the first gray subpixel electrode, wherein a pixel area occupied by the first gray subpixel electrode and the second gray subpixel electrode is extended in a first direction, the first and second reference voltage lines are extended in a second direction, which is substantially perpendicular to the first direction, to overlap the pixel area, and one of the first and second reference voltage lines is connected to a source electrode of the compensation transistor.

Abstract: Provided is a method for manufacturing vehicle body parts, including: rolling a blank such that the blank has two or more regions with different thicknesses; trimming the rolled blank; and performing hot press forming on the trimmed blank, and cooling the trimmed blank. The blank to be rolled has an absorption hole, and a flange protrudes from an edge region of the blank corresponding to a position of the absorption hole. The blank is rolled in two or more different directions.

Abstract: A liquid crystal display includes: first and second thin film transistors and a compensation transistor formed on a first insulation substrate; a first gray subpixel electrode connected to a drain electrode of the first thin film transistor; a second gray subpixel electrode connected to a drain electrode of the compensation transistor and a drain electrode of the second thin film transistor; and first and second reference voltage lines overlapping at least one of the second gray subpixel electrode and the first gray subpixel electrode, wherein a pixel area occupied by the first gray subpixel electrode and the second gray subpixel electrode is extended in a first direction, the first and second reference voltage lines are extended in a second direction, which is substantially perpendicular to the first direction, to overlap the pixel area, and one of the first and second reference voltage lines is connected to a source electrode of the compensation transistor.

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Abstract: Provided is a bushing for manufacturing a three-dimensional composite preform using a tow made of a fiber reinforced polymer. The bushing includes a base plate in which one or more through-holes are formed, and a plurality of spools spaced apart from each other on the base plate. A flat top is formed at an end portion of the spools, and grooves are formed on outer surfaces of the plurality of spools in a circumferential direction thereof.

Abstract: Provided is a bushing for manufacturing a three-dimensional composite preform using a tow made of a fiber reinforced polymer. The bushing includes a base plate in which one or more through-holes are formed, and a plurality of spools spaced apart from each other on the base plate. A flat top is formed at an end portion of the spools, and grooves are formed on outer surfaces of the plurality of spools in a circumferential direction thereof.

Abstract: A mother substrate for a display device includes: a first mother substrate and a second mother substrate including a plurality of panel regions and facing each other; a first contact electrode and a second contact electrode on the first mother substrate; a common electrode, a first voltage application electrode and a second voltage application electrode separated from each other and on the second mother substrate; and a liquid crystal layer between the first mother substrate and the second mother substrate. The first voltage application electrode is connected to the first contact electrode, and the second voltage application electrode is connected to the second contact electrode. The first voltage application electrode is applied with a first voltage, and the second voltage application electrode is applied with a second voltage different from the first voltage.

Abstract: Disclosed is a thin film transistor array panel including: a substrate including a display area and a peripheral area; a second semiconductor layer disposed on the substrate, and disposed on a first semiconductor layer disposed in the display area and the peripheral area; and a passivation layer disposed on the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer include an oxide semiconductor, and a thickness of the first semiconductor layer is different from that of the second semiconductor layer.

Abstract: Provided is a hot stamping method for manufacturing high strength vehicle body parts. The hot stamping method includes: high frequency induction heating a blank in a first heating furnace while transferring the blank; heating the heated blank to an austenitization temperature or more of a corresponding blank while transferring the heated blank from the first heating furnace to a second heating furnace; and drawing the blank heated to the austenitization temperature or more in the second heating furnace to form and cool the blank by using a press forming apparatus. According to the hot stamping method, it is possible to achieve excellent productivity and reduce energy.

Abstract: A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.

Abstract: Provided is an apparatus for forming steel workpieces using electroplasticity. The apparatus comprises a power supply (40) for supplying electricity to the workpiece (W) through electrodes (30) disposed in a mold (20) of a press (10) during a deformation stroke of the press (10), a control unit (50) for controlling the power supply (40) and a plurality of sensors (60, 70, 80 and 90).

Abstract: A thin film transistor array panel, including a substrate; a gate electrode on the substrate; a semiconductor layer on the substrate; a gate insulating layer between the gate electrode and the semiconductor layer, the gate insulating layer including a first oxide insulating layer in contact with the semiconductor layer; a source electrode on the semiconductor layer; a drain electrode facing the source electrode; and a passivation layer covering the source electrode and the drain electrode, the passivation layer including a second oxide insulating layer in contact with the source electrode and the drain electrode, at least one of the first oxide insulating layer and the second oxide insulating layer having a varying hydrogen content distribution in a thickness direction.

Abstract: A liquid crystal display includes: first and second thin film transistors and a compensation transistor formed on a first insulation substrate; a first gray subpixel electrode connected to a drain electrode of the first thin film transistor; a second gray subpixel electrode connected to a drain electrode of the compensation transistor and a drain electrode of the second thin film transistor; and first and second reference voltage lines overlapping at least one of the second gray subpixel electrode and the first gray subpixel electrode, wherein a pixel area occupied by the first gray subpixel electrode and the second gray subpixel electrode is extended in a first direction, the first and second reference voltage lines are extended in a second direction, which is substantially perpendicular to the first direction, to overlap the pixel area, and one of the first and second reference voltage lines is connected to a source electrode of the compensation transistor.

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a gate line disposed on a substrate and including a gate electrode; a gate insulating layer formed on the gate line; a first oxide semiconductor layer disposed on the gate insulating layer and formed of an oxide semiconductor; a data wiring layer disposed on the gate insulating layer and including data line intersecting with the gate line, a source electrode connected to the data line, and a drain electrode facing the drain electrode; and a second oxide semiconductor layer covering the source electrode and the drain electrode, wherein the data wiring layer includes copper or a copper alloy.

Abstract: A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.

Abstract: A thin film transistor array panel includes: a gate conductor disposed on a substrate and including a gate line and a gate electrode, a semiconductor layer overlapping the gate electrode and including an oxide semiconductor, a data conductor including a data line intersecting the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, a sidewall covering side surface parts of the drain electrode and the source electrode adjacent to a channel region of the semiconductor layer, and a passivation layer covering the source electrode, the drain electrode, and the sidewall.

Abstract: A display device includes: a display panel including a pixel that includes a first subpixel and a second subpixel, the first subpixel displaying a first image based on a first gamma curve during a first period of a first frame and the second subpixel displaying a second image based on a second gamma curve during the first period of the first frame, where the first and second gamma curves are different; a gate driver configured to transmit a gate signal to the display panel; and a data driver configured to transmit a first data voltage based on the first gamma curve and a second data voltage based on the second gamma curve to the pixel, in which the pixel includes a voltage changing member which changes luminance of at least one of the first image and the second image during a second period of the first frame.

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film. transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.