Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film. transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Abstract: In one embodiment, a display panel includes a substrate and a gate driver disposed on the substrate. The gate driver comprises a wiring unit which receives signals and a circuit unit which outputs driving signals in response to the signals received from the wiring unit. The circuit unit comprises a shift register and a shift register wiring connected to the shift register. The wiring unit comprises first through n-th signal lines (n is a natural number greater than two) arranged sequentially adjacent to the shift register. The first line is located farthest from the shift register and the n-th signal line is closest from the shift register. Further, the first signal line is electrically connected to the shift register by a first connection line that comprises a first contact portion connected to the first signal line and a second contact portion connected to the shift resistor wiring.

Abstract: A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.

Abstract: Disclosed is a thin film transistor array panel including: a substrate including a display area and a peripheral area; a second semiconductor layer disposed on the substrate, and disposed on a first semiconductor layer disposed in the display area and the peripheral area; and a passivation layer disposed on the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer include an oxide semiconductor, and a thickness of the first semiconductor layer is different from that of the second semiconductor layer.

Abstract: A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.

Abstract: A thin film transistor array panel includes: a gate conductor disposed on a substrate and including a gate line and a gate electrode, a semiconductor layer overlapping the gate electrode and including an oxide semiconductor, a data conductor including a data line intersecting the gate line, a source electrode connected to the data line, and a drain electrode facing the source electrode, a sidewall covering side surface parts of the drain electrode and the source electrode adjacent to a channel region of the semiconductor layer, and a passivation layer covering the source electrode, the drain electrode, and the sidewall.

Abstract: A display panel includes a first substrate, a second substrate and a spacer disposed there between. The second substrate includes a black matrix pattern, a color filter, a dummy color filter and a common electrode. The black matrix pattern is formed with an opening portion which is filled by the color filter. The dummy color filter is made of same material as the color filter and extends in a vertical direction along which the spacer also extends. The spacer is formed between the first substrate and the second substrate in correspondence with location of the dummy color filter so that the effective spaced apart distance that the spacer provides between the first and second substrates is a function of a thickness of the dummy color filter.

Abstract: The invention discloses a press die for electrically assisted manufacturing performing plastic working at a relatively lower temperature than hot working by using an electroplasticity effect that a flow stress inside a material is reduced when a current is applied to the material, the press die for electrically assisted manufacturing comprising: an upper die and a lower die configured to be disposed at upper and lower portions, having the material disposed therebetween; and at least one electrode pair configured to be disposed in the upper die or the lower die, wherein the electrode pair is configured so that electrodes having different polarities in a width direction of the material face each other.

Abstract: A liquid crystal display includes a first substrate, a first gate line disposed on the first substrate, a second gate line disposed on the first substrate, a data line disposed on the first substrate, a reference voltage line disposed on the first substrate and extending substantially to be parallel to the data line, a first subpixel electrode disposed in a pixel area on the first substrate, a second subpixel electrode disposed in the pixel area on the first substrate, a first switching element connected to the first gate line, the data line and the first subpixel electrode, a second switching element connected to the first gate line, the data line and the second subpixel electrode, and a third switching element connected to the first subpixel electrode and the reference voltage line.

Abstract: A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.

Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film. transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Abstract: In one embodiment, a display panel includes a substrate and a gate driver disposed on the substrate. The gate driver comprises a wiring unit which receives signals and a circuit unit which outputs driving signals in response to the signals received from the wiring unit. The circuit unit comprises a shift register and a shift register wiring connected to the shift register. The wiring unit comprises first through n-th signal lines (n is a natural number greater than two) arranged sequentially adjacent to the shift register. The first line is located farthest from the shift register and the n-th signal line is closest from the shift register. Further, the first signal line is electrically connected to the shift register by a first connection line that comprises a first contact portion connected to the first signal line and a second contact portion connected to the shift resistor wiring.

Abstract: Exemplary embodiments of the present invention disclose a liquid crystal display (LCD) and a method of manufacturing the same. The LCD may have a display area and a peripheral area. An organic layer of the peripheral area may be patterned using a half-tone mask, and a protrusion member may be formed in the peripheral area. Accordingly, the thin film transistor array panel and the corresponding substrate may be prevented from being temporary adhered in the peripheral area such that the density of the liquid crystal molecules filled in the peripheral area may be uniformly maintained and the display quality of the liquid crystal display may be improved.

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Abstract: A method of assembling a sub-frame of a vehicle with the front side member of the vehicle includes integrally forming a supporting end of a mounting nut that protrudes in a radial direction in a center of an external circumference of the mounting nut, forming a through hole in a lower surface of the front side member, forming a seat as a groove in an internal surface of the through hole, inserting a lower end of the mounting nut into the through hole so that the supporting end is supported by a circumference of the through hole, settling a head of the mounting nut in the seat, and welding the supporting end and the head along the circumference of the through hole and a side of the seat to assemble the sub-frame to the front side member.

Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

Abstract: A mother substrate for a display device includes: a first mother substrate and a second mother substrate including a plurality of panel regions and facing each other; a first contact electrode and a second contact electrode on the first mother substrate; a common electrode, a first voltage application electrode and a second voltage application electrode separated from each other and on the second mother substrate; and a liquid crystal layer between the first mother substrate and the second mother substrate. The first voltage application electrode is connected to the first contact electrode, and the second voltage application electrode is connected to the second contact electrode. The first voltage application electrode is applied with a first voltage, and the second voltage application electrode is applied with a second voltage different from the first voltage.

Abstract: A display device includes: a display panel including a pixel that includes a first subpixel and a second subpixel, the first subpixel displaying a first image based on a first gamma curve during a first period of a first frame and the second subpixel displaying a second image based on a second gamma curve during the first period of the first frame, where the first and second gamma curves are different; a gate driver configured to transmit a gate signal to the display panel; and a data driver configured to transmit a first data voltage based on the first gamma curve and a second data voltage based on the second gamma curve to the pixel, in which the pixel includes a voltage changing member which changes luminance of at least one of the first image and the second image during a second period of the first frame.

Abstract: The present invention relates to a liquid crystal display. The liquid crystal display has a lower panel including a first pixel area having a first pixel electrode and a first light leakage preventing member, a final pixel area having a second pixel electrode and a second light leakage preventing member, and middle pixel areas disposed between the first pixel area and the final pixel area, each of the middle pixel areas including a first middle pixel electrode and a second middle pixel electrode. Accordingly, light leakage may be effectively prevented at the first pixel area and the final pixel area that are disposed on the edge.