Abstract: A thin film transistor (TFT) array substrate is provided. The thin film transistor (TFT) array substrate includes an insulating substrate, an oxide semiconductor layer formed on the insulating substrate and including an additive element, a gate electrode overlapping the oxide semiconductor layer, and a gate insulating layer interposed between the oxide semiconductor layer and the gate electrode, wherein the oxygen bond energy of the additive element is greater than that of a base element of the oxide semiconductor layer.

Abstract: A TFT substrate includes a base substrate, a gate wiring formed on the base substrate, a gate insulation layer, an activation layer, an oxidation-blocking layer, a data wiring, a protection layer and a pixel electrode. The gate wiring includes a gate line and a gate electrode. The gate insulation layer is formed on the base substrate to cover the gate wiring. The activation layer is formed on the gate insulation layer. The oxidation-blocking layer is formed on the activation layer. The data wiring includes a data line, a source electrode and a drain electrode. The source and drain electrodes are disposed on the oxidation-blocking layer therefore lowering the on-current (“Ion”) for turning on the TFT and increasing the off-current (“Ioff”) for turning off the TFT due to the oxidation-blocking layer.

Abstract: A display substrate includes; a base substrate, a deformation preventing layer disposed on a lower surface of the base substrate, wherein the deformation preventing layer applies a force to the base substrate to prevent the base substrate from bending, a gate line disposed on an upper surface of the base substrate, a data line disposed on the base substrate, and a pixel electrode disposed on the base substrate.

Abstract: An apparatus for reducing power consumption of a receiver in a high-speed wireless communication system and a control method thereof are provided. The apparatus for processing a signal in a receiver of a wireless communication system includes a carrier sensor configured to sense a carrier used in the wireless communication system, a decoder configured to decode the detected carrier signal to a signal and data, and a controller configured to control supplying power and a clock only to the carrier sensor during carrier sensing, and supplying power and a clock to an overall receiver when a carrier is sensed.

Abstract: Provided are a receiving apparatus and method for a wireless communication system using multiple antennas. A receiving method for a wireless communication system using multiple paths, the receiving method comprising: receiving signals through a predetermined number of multiple paths; sensing a carrier according to saturation state degrees of the signals, and providing saturation state information; calculating automatic gain components of the received signals by using the received signals and the saturation state information of the received signals; and performing a noise matching process to amplify noises on the predetermined multiple paths according to the automatic gain components during a predetermined period.

Abstract: Provided is a method of manufacturing a ZnO-based thin film transistor (TFT). The method may include forming source and drain electrodes using one or two wet etchings. A tin (Sn) oxide, a fluoride, or a chloride having relatively stable bonding energy against plasma may be included in a channel layer. Because the source and drain electrodes are formed by wet etching, damage to the channel layer and an oxygen vacancy may be prevented or reduced. Because the material having higher bonding energy is distributed in the channel layer, damage to the channel layer occurring when a passivation layer is formed may be prevented or reduced.

Abstract: An oxide or nitride semiconductor layer is formed over a substrate. A first conductive layer including a first element and a second element, and a second conductive layer including the second element are formed over the semiconductor layer. The first element is oxidized or nitrogenized near an interface region between the first conductive layer and the oxide or nitride semiconductor layer by heat treatment or laser irradiation. The Gibbs free energy of oxide formation of the first element is lower than those of the second element or any element in the oxide or nitride semiconductor layer.

Abstract: Provided is a method of manufacturing a ZnO-based thin film transistor (TFT). The method may include forming source and drain electrodes using one or two wet etchings. A tin (Sn) oxide, a fluoride, or a chloride having relatively stable bonding energy against plasma may be included in a channel layer. Because the source and drain electrodes are formed by wet etching, damage to the channel layer and an oxygen vacancy may be prevented or reduced. Because the material having higher bonding energy is distributed in the channel layer, damage to the channel layer occurring when a passivation layer is formed may be prevented or reduced.

Abstract: Disclosed are a method of driving a display panel and a display apparatus using the same, in which a driving voltage is applied to a transistor provided in each pixel of the display to drive the transistor. A voltage level of the driving voltage applied to the transistor is adjusted every predetermined period and the changed driving voltage is applied to the transistor to prevent the operational reliability of the transistor from being lowered by a shift in the threshold voltage of the transistor.

Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.

Abstract: A thin film transistor array substrate having a high charge mobility and that can raise a threshold voltage, and a method of fabricating the thin film transistor array substrate are provided. The thin film transistor array substrate includes: an insulating substrate; a gate electrode formed on the insulating substrate; an oxide semiconductor layer comprising a lower oxide layer formed on the gate electrode and an upper oxide layer formed on the lower oxide layer, such that the oxygen concentration of the upper oxide layer is higher than the oxygen concentration of the lower oxide layer; and a source electrode and a drain electrode formed on the oxide semiconductor layer and separated from each other.

Abstract: A liquid crystal display and a method of manufacturing the same are provided. The liquid crystal display includes an insulating substrate, a gate electrode formed on the insulating substrate, an oxide semiconductor layer formed on the gate electrode, an etch stopper formed on the oxide semiconductor layer in a channel area, a common electrode formed on the insulating substrate, source and drain electrodes separated from each other on the etch stopper and extending to an upper portion of the oxide semiconductor layer, a passivation layer formed on the etch stopper, the common electrode, the source and drain electrodes, and a pixel electrode formed on the passivation layer and connected to the drain electrode.

Abstract: The present invention provides a TFT array panel and a manufacturing method of the same, which has signal lines including a lower layer of an Al containing metal and an upper layer of a molybdenum alloy (Mo-alloy) comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti). Accordingly, undercut, overhang, and mouse bites which may arise in an etching process, are prevented, and TFT array panels that have signal lines having low resistivity and good contact characteristics are provided.

Abstract: The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu).

Abstract: Provided are a wire structure, a method of forming a wire, a thin film transistor (TFT) substrate, and a method of manufacturing the TFT substrate. The wire structure includes a barrier layer disposed on a lower structure, a copper conductive layer comprising copper or copper alloy disposed on the barrier layer, an intermediate layer comprising copper nitride disposed on the copper conductive layer, and a capping layer disposed on the intermediate layer.

Abstract: The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu).

Abstract: A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes.

Abstract: Provided are a wire structure, a method of forming a wire, a thin film transistor (TFT) substrate, and a method of manufacturing the TFT substrate. The wire structure includes a barrier layer disposed on a lower structure, a copper conductive layer comprising copper or copper alloy disposed on the barrier layer, an intermediate layer comprising copper nitride disposed on the copper conductive layer, and a capping layer disposed on the intermediate layer.

Abstract: Disclosed is display part such as a TFT array panel comprising an aluminum layer, and a molybdenum layer formed on the aluminum layer. The thickness of the molybdenum layer may be about 10% to about 40% the thickness of the aluminum layer. As a result, a top surface of the aluminum layer may have a width about equal to a bottom surface of the molybdenum layer. Accordingly, it is an aspect of the present invention to provide a TFT array panel comprising an aluminum wiring on which aluminum protrusion is reduced or eliminated.

Abstract: A thin film transistor array substrate, which can have high mobility of charge and can achieve uniform electrical characteristics for wide display devices, and a method of manufacturing the thin film transistor array substrate, are provided. The thin film transistor array substrate includes an oxide semiconductor layer having a channel and formed on an insulating substrate, a gate electrode overlapping the oxide semiconductor layer, a gate insulating film disposed between the oxide semiconductor layer and the gate electrode, and a passivation film formed on the oxide semiconductor layer and the gate electrode. At least one of the gate insulating film and the passivation film contains fluorine-containing silicon.