Patents by Inventor Je-Hun Lee

Je-Hun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130032798
    Abstract: Disclosed is an oxide for a semiconductor layer of a thin-film transistor, said oxide being excellent in the switching characteristics of a thin-film transistor, specifically enabling favorable characteristics to be stably obtained even in a region of which the ZnO concentration is high and even after forming a passivation layer and after applying stress. The oxide is used in a semiconductor layer of a thin-film transistor, and the aforementioned oxide contains Zn and Sn, and further contains at least one element selected from group X consisting of Al, Hf, Ta, Ti, Nb, Mg, Ga, and the rare-earth elements.
    Type: Application
    Filed: April 18, 2011
    Publication date: February 7, 2013
    Applicants: SAMSUNG DISPLAY CO., LTD., KABUSHIKI KAISHA KOBE SEIKO SHO (KOBE STEEL, LTD.)
    Inventors: Aya Miki, Yumi Iwanari, Toshihiro Kugimiya, Shinya Morita, Yasuaki Terao, Satoshi Yasuno, Jae Woo Park, Je Hun Lee, Byung Du Ahn
  • Publication number: 20130009151
    Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 10, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Ki-Won KIM, Do-Hyun KIM, Woo-Geun LEE, Kap-Soo YOON
  • Publication number: 20130005082
    Abstract: A thin film transistor array substrate having a high charge mobility and that can raise a threshold voltage, and a method of fabricating the thin film transistor array substrate are provided. The thin film transistor array substrate includes: an insulating substrate; a gate electrode formed on the insulating substrate; an oxide semiconductor layer comprising a lower oxide layer formed on the gate electrode and an upper oxide layer formed on the lower oxide layer, such that the oxygen concentration of the upper oxide layer is higher than the oxygen concentration of the lower oxide layer; and a source electrode and a drain electrode formed on the oxide semiconductor layer and separated from each other.
    Type: Application
    Filed: September 10, 2012
    Publication date: January 3, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Do-Hyun KIM, Je-Hun LEE, Pil-Sang YUN, Dong-Hoon LEE, Bong-Kyun KIM
  • Publication number: 20120323542
    Abstract: A method for calculating values of parameters of a TFT includes calculating a set of simulated current-voltage (I-V) values using state-density-functions over an entire energy band in a band gap of an amorphous semiconductor of the TFT. The method further includes comparing the set of simulated I-V values with a set of measured I-V values of the TFT to determine a value of a parameter of the TFT. The method may further include calculating values of an acceptor state-density-function gA using a set of electrostatic capacity-voltage (C-V) values of the TFT measured according to a frequency. The method may further include determining values of a donor state-density-function gD and values of an interface state-density-function Dit over the entire energy band in the band gap.
    Type: Application
    Filed: May 25, 2012
    Publication date: December 20, 2012
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Je-Hun LEE, Byung-Du AHN, Sei-Yong PARK, Jun-Hyun PARK, Jae-Woo PARK, Dae-Hwan KIM, Sung-Chul KIM, Yong-Woo JEON
  • Publication number: 20120315731
    Abstract: A thin film transistor array panel is provided, which includes a plurality of gate line, a plurality of common electrodes, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer, a plurality of drain electrodes formed on the semiconductor layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn is not produced on the surfaces of the common electrode.
    Type: Application
    Filed: June 14, 2012
    Publication date: December 13, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Sung-Jin KIM, Hee-Joon KIM, Chang-Oh JEONG
  • Patent number: 8330916
    Abstract: A liquid crystal display (LCD) includes thin film transistors (TFTs) each having spaced apart source/drain electrodes and an oxide-type semiconductive film disposed over and between the source/drain electrodes to define an active layer. Each of the source/drain electrodes includes a portion of a subdivided transparent conductive layer where one subdivision of the transparent conductive layer continues from within its one of the source/drain electrodes to define an optically exposed pixel-electrode that is reliably connected integrally to the one source/drain electrode. Mass production costs can be reduced and production reliability increased because a fewer number of photolithographic masks can be used to form the TFTs.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: December 11, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Je-Hun Lee, Do-Hyun Kim, Tae-Sang Kim, Kyung-Seok Son, Chang-Oh Jeong
  • Patent number: 8288766
    Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: October 16, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Ki-Won Kim, Do-Hyun Kim, Woo-Geun Lee, Kap-Soo Yoon
  • Patent number: 8288771
    Abstract: A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: October 16, 2012
    Assignee: Samsung Electonics Co., Ltd.
    Inventors: Je-Hun Lee, Sung-Jin Kim, Hee-Joon Kim, Chang-Oh Jeong
  • Patent number: 8283666
    Abstract: A thin film transistor array substrate having a high charge mobility and that can raise a threshold voltage, and a method of fabricating the thin film transistor array substrate are provided. The thin film transistor array substrate includes: an insulating substrate; a gate electrode formed on the insulating substrate; an oxide semiconductor layer comprising a lower oxide layer formed on the gate electrode and an upper oxide layer formed on the lower oxide layer, such that the oxygen concentration of the upper oxide layer is higher than the oxygen concentration of the lower oxide layer; and a source electrode and a drain electrode formed on the oxide semiconductor layer and separated from each other.
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: October 9, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do-Hyun Kim, Je-Hun Lee, Pil-Sang Yun, Dong-Hoon Lee, Bong-Kyun Kim
  • Patent number: 8268194
    Abstract: A method of forming an oxide semiconductor layer includes: mounting an oxide semiconductor target in a chamber; loading a substrate into the chamber; vacuuming the chamber; applying a direct current power to the oxide semiconductor target while injecting oxygen and a sputtering gas into the chamber; and forming an oxide semiconductor layer on a surface of the substrate by applying plasma of the sputtering gas onto the oxide semiconductor target. Here, the oxide semiconductor target has a resistance of 1 k? or less.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: September 18, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-jung Kim, Je-hun Lee
  • Patent number: 8252639
    Abstract: The present invention provides a thin film transistor array panel comprising: an insulating substrate; a gate line formed on the insulating substrate and having a gate electrode; a gate insulating layer formed on the gate line; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; diffusion barriers formed on the semiconductor and containing nitrogen; a data line crossing the gate line and having a source electrode partially contacting the diffusion barriers; a drain electrode partially contacting the diffusion barriers and facing the source electrode on the gate electrode; and a pixel electrode electrically connected to the drain electrode.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: August 28, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Beom-Seok Cho, Chang-Oh Jeong, Joo-Han Kim
  • Publication number: 20120211753
    Abstract: In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.
    Type: Application
    Filed: December 16, 2011
    Publication date: August 23, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-Won KIM, Je-Hun LEE, Sung-Haeng CHO, Woo-Geun LEE, Kap-Soo YOON, Do-Hyun KIM, Seung-Ha CHOI
  • Publication number: 20120205651
    Abstract: A liquid crystal display and a method of manufacturing the same are provided. The liquid crystal display includes an insulating substrate, a gate electrode formed on the insulating substrate, an oxide semiconductor layer formed on the gate electrode, an etch stopper formed on the oxide semiconductor layer in a channel area, a common electrode formed on the insulating substrate, source and drain electrodes separated from each other on the etch stopper and extending to an upper portion of the oxide semiconductor layer, a passivation layer formed on the etch stopper, the common electrode, the source and drain electrodes, and a pixel electrode formed on the passivation layer and connected to the drain electrode.
    Type: Application
    Filed: April 20, 2012
    Publication date: August 16, 2012
    Inventors: Je-Hun Lee, Do-Hyun Kim
  • Patent number: 8241936
    Abstract: An improved display substrate is provided to reduce surface defects on insulating layers of organic thin film transistors. Related methods of manufacture are also provided. In one example, a display substrate includes a base, a plurality of data lines, a plurality of gate lines, a pixel defined by the data lines and the gate lines, an organic thin film transistor, and a pixel electrode. The data lines are on the base and are oriented in a first direction. The gate lines are oriented in a second direction that crosses the first direction. The organic thin film transistor includes a source electrode electrically connected to one of the data lines, a gate electrode electrically connected to one of the gate lines, and an organic semiconductor layer. The pixel electrode is disposed in the pixel and electrically connected to the organic thin film transistor. The pixel electrode comprises a transparent oxynitride.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: August 14, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Young-Min Kim, Bo-Sung Kim, Jun-Young Lee, Sung-Wook Kang
  • Publication number: 20120181533
    Abstract: A thin film transistor array panel includes: an substrate; a gate line positioned on the substrate; a data line intersecting the gate line; a thin film transistor connected to the gate line and the data line; a gate insulating layer between the gate electrode of the thin film transistor and the semiconductor of the thin film transistor; a pixel electrode connected to the thin film transistor; and a passivation layer positioned between the pixel electrode and the thin film transistor, wherein at least one of the gate insulating layer and the passivation layer includes a silicon nitride layer, and the silicon nitride layer includes hydrogen content at less than 2×1022 cm3 or 4 atomic %.
    Type: Application
    Filed: September 23, 2011
    Publication date: July 19, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyeong Suk YOO, Joo-Han KIM, Je Hun LEE, Seong-Hun KIM, Jung Kyu LEE, Chang Oh JEONG
  • Patent number: 8207534
    Abstract: A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: June 26, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Sung-Jin Kim, Hee-Joon Kim, Chang-Oh Jeong
  • Publication number: 20120155308
    Abstract: Disclosed is a method for controlling a plurality of access points by a monitoring station in a communication system, including: receiving access point status report policy information from a control server; receiving a basic service set load information element from the plurality of access points; generating access point status information by using the basic service set load information element; transmitting the access point status information to the control server by a method specified in the access point status report policy information; receiving an access point control command from the control server; and transmitting the access point control command to the plurality of access points.
    Type: Application
    Filed: December 19, 2011
    Publication date: June 21, 2012
    Applicant: Electronics and Telecomcunications Research Institute
    Inventors: Je-Hun LEE, Sok-Kyu Lee
  • Publication number: 20120112181
    Abstract: An oxide semiconductor including: (A) at least one element of zinc (Zn) and tin (Sn); and (B) at least one element of arsenic (As), antimony (Sb), chromium (Cr), cerium (Ce), tantalum (Ta), neodymium (Nd), niobium (Nb), scandium (Sc), yttrium (Y), and hafnium (Hf), is provided.
    Type: Application
    Filed: May 9, 2011
    Publication date: May 10, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Joo-Han KIM, Byung-Du AHN, Sang Wook KIM, Jae Woo PARK, Chang Jung KIM
  • Patent number: 8173492
    Abstract: Provided are a wire structure, a method of forming a wire, a thin film transistor (TFT) substrate, and a method of manufacturing the TFT substrate. The wire structure includes a barrier layer disposed on a lower structure, a copper conductive layer comprising copper or copper alloy disposed on the barrier layer, an intermediate layer comprising copper nitride disposed on the copper conductive layer, and a capping layer disposed on the intermediate layer.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: May 8, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-hun Lee, Chang-oh Jeong, Beom-seok Cho, Yang-ho Bae
  • Patent number: 8164152
    Abstract: A liquid crystal display and a method of manufacturing the same are provided. The liquid crystal display includes an insulating substrate, a gate electrode formed on the insulating substrate, an oxide semiconductor layer formed on the gate electrode, an etch stopper formed on the oxide semiconductor layer in a channel area, a common electrode formed on the insulating substrate, source and drain electrodes separated from each other on the etch stopper and extending to an upper portion of the oxide semiconductor layer, a passivation layer formed on the etch stopper, the common electrode, the source and drain electrodes, and a pixel electrode formed on the passivation layer and connected to the drain electrode.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: April 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Do-Hyun Kim