Patents by Inventor Je-Hun Lee

Je-Hun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8158499
    Abstract: Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate, and a method for fabricating a TFT substrate.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: April 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-hun Lee, Chang-oh Jeong, Beom-seok Cho, Yang-ho Bae
  • Publication number: 20120003796
    Abstract: An improved display substrate is provided to reduce surface defects on insulating layers of organic thin film transistors. Related methods of manufacture are also provided. In one example, a display substrate includes a base, a plurality of data lines, a plurality of gate lines, a pixel defined by the data lines and the gate lines, an organic thin film transistor, and a pixel electrode. The data lines are on the base and are oriented in a first direction. The gate lines are oriented in a second direction that crosses the first direction. The organic thin film transistor includes a source electrode electrically connected to one of the data lines, a gate electrode electrically connected to one of the gate lines, and an organic semiconductor layer. The pixel electrode is disposed in the pixel and electrically connected to the organic thin film transistor. The pixel electrode comprises a transparent oxynitride.
    Type: Application
    Filed: September 12, 2011
    Publication date: January 5, 2012
    Inventors: Je-Hun LEE, Young-Min KIM, Bo-Sung KIM, Jun-Young LEE, Sung-Wook KANG
  • Publication number: 20110309510
    Abstract: An array substrate includes a switching element, a signal transmission line, a passivation layer and a pixel electrode. The switching element is disposed on an insulating substrate. The signal transmission line is connected to the switching element and includes a barrier layer, a conductive line, and a copper nitride layer. The barrier layer is disposed on the insulating substrate. The conductive line is disposed on the barrier layer and includes copper or copper alloy. The copper nitride layer covers the conductive line. The passivation layer covers the switching element and the signal transmission line and has a contact hole through which a drain electrode of the switching element is partially exposed. The pixel electrode is disposed on the insulating substrate, and is connected to the drain electrode of the switching element through the contact hole.
    Type: Application
    Filed: August 31, 2011
    Publication date: December 22, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Do-Hyun KIM, Eun-Guk LEE, Chang-Oh JEONG
  • Patent number: 8077268
    Abstract: A thin film transistor array substrate comprising a base substrate, a first wire on the base substrate, a first insulating layer on the base substrate to cover the first wire, a semiconductor layer on the first insulating layer, a second insulating layer on the first insulating layer on which the semiconductor layer is formed, and a second wire on the second insulating layer on the second insulating layer is provided, and a portion of the second wire makes contact with the semiconductor layer through the contact hole.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: December 13, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Guk Lee, Chang-Oh Jeong, Je-Hun Lee, Do-Hyun Kim, Soon-Kwon Lim
  • Patent number: 8067276
    Abstract: An oxide or nitride semiconductor layer is formed over a substrate. A first conductive layer including a first element and a second element, and a second conductive layer including the second element are formed over the semiconductor layer. The first element is oxidized or nitrogenized near an interface region between the first conductive layer and the oxide or nitride semiconductor layer by heat treatment or laser irradiation. The Gibbs free energy of oxide formation of the first element is lower than those of the second element or any element in the oxide or nitride semiconductor layer.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: November 29, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Do-Hyun Kim, Tae-Hyung Ihn
  • Publication number: 20110284857
    Abstract: A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes.
    Type: Application
    Filed: August 5, 2011
    Publication date: November 24, 2011
    Inventors: Je-Hun LEE, Sung-Jin Kim, Hee-Joon Kim, Chang-Oh Jeong
  • Publication number: 20110284836
    Abstract: A thin-film transistor includes a gate electrode, a source electrode, a drain electrode, a gate insulation layer and an oxide semiconductor pattern. The source and drain electrodes include a first metal element with a first oxide formation free energy. The oxide semiconductor pattern has a first surface making contact with the gate insulation layer and a second surface making contact with the source and drain electrodes to be positioned at an opposite side of the first surface. The oxide semiconductor pattern includes an added element having a second oxide formation free energy having an absolute value greater than or equal to an absolute value of the first oxide formation free energy, wherein an amount of the added element included in a portion near the first surface is zero or smaller than an amount of the added element included in a portion near the second surface.
    Type: Application
    Filed: April 5, 2011
    Publication date: November 24, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Jae-Woo PARK, Byung-Du AHN, Sei-Yong PARK, Jun-Hyun PARK
  • Publication number: 20110266538
    Abstract: An oxide or nitride semiconductor layer is formed over a substrate. A first conductive layer including a first element and a second element, and a second conductive layer including the second element are formed over the semiconductor layer. The first element is oxidized or nitrogenized near an interface region between the first conductive layer and the oxide or nitride semiconductor layer by heat treatment or laser irradiation. The Gibbs free energy of oxide formation of the first element is lower than those of the second element or any element in the oxide or nitride semiconductor layer.
    Type: Application
    Filed: July 15, 2011
    Publication date: November 3, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Do-Hyun KIM, Tae-Hyung IHN
  • Patent number: 8044398
    Abstract: A display substrate includes an insulating substrate, a thin-film transistor (TFT), a pixel electrode, a signal line and a pad part. The insulating substrate has a display region and a peripheral region surrounding the display region. The TFT is in the display region of the insulating substrate. The pixel electrode is in the display region of the insulating substrate and electrically connected to the TFT. The signal line is on the insulating substrate and extends from the peripheral region toward the display region. The pad part is in the peripheral region and electrically connects to the signal line. The pad part is formed in a trench of the insulating substrate and includes a region that extends into the insulating substrate. Therefore, the signal line may be securely attached to the insulating substrate.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: October 25, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Long Ning, Chang-Oh Jeong, Je-Hun Lee, Yang-Ho Bae, Pil-Sang Yun, Hong-Sick Park, Joo-Ae Youn, Byeong-Beom Kim, Byeong-Jin Lee
  • Patent number: 8035102
    Abstract: An improved display substrate is provided to reduce surface defects on insulating layers of organic thin film transistors. Related methods of manufacture are also provided. In one example, a display substrate includes a base, a plurality of data lines, a plurality of gate lines, a pixel defined by the data lines and the gate lines, an organic thin film transistor, and a pixel electrode. The data lines are on the base and are oriented in a first direction. The gate lines are oriented in a second direction that crosses the first direction. The organic thin film transistor includes a source electrode electrically connected to one of the data lines, a gate electrode electrically connected to one of the gate lines, and an organic semiconductor layer. The pixel electrode is disposed in the pixel and electrically connected to the organic thin film transistor. The pixel electrode comprises a transparent oxynitride.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: October 11, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Young-Min Kim, Bo-Sung Kim, Jun-Young Lee, Sung-Wook Kang
  • Publication number: 20110240987
    Abstract: A thin film transistor and a method of manufacturing the same are provided. The thin film transistor includes a first gate electrode and an active layer including a crystalline oxide semiconductor which is insulated from the first gate electrode by a first insulating layer and the active layer is arranged to overlap the first gate electrode. A source electrode is formed including at least a portion overlaps the active layer, and a drain electrode is arranged being spaced apart from the source electrode and at least a portion of the drain electrode overlaps the active layer, wherein the source electrode and the drain electrode are insulated from the first gate electrode by the first insulating layer.
    Type: Application
    Filed: March 16, 2011
    Publication date: October 6, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Joo-Han KIM
  • Publication number: 20110215322
    Abstract: A thin film transistor includes a gate electrode formed on a substrate, a semiconductor pattern overlapped with the gate electrode, a source electrode overlapped with a first end of the semiconductor pattern and a drain electrode overlapped with a second end of the semiconductor pattern and spaced apart from the source electrode. The semiconductor pattern includes an amorphous multi-elements compound including a II B element and a VI A element or including a III A element and a V A element and having an electron mobility no less than 1.0 cm2/Vs and an amorphous phase, wherein the VI A element excludes oxygen. Thus, a driving characteristic of the thin film transistor may be improved.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 8, 2011
    Inventors: Jae-Woo Park, Je-Hun Lee, Seong-Jin Yeon, Yeon-Hong Kim
  • Patent number: 7998786
    Abstract: Multi-layered wiring for a larger flat panel display is formed by depositing molybdenum on a substrate in presence of a precursor gas containing at least one oxygen, nitrogen and carbon to form a molybdenum layer. An aluminum layer is deposited on the molybdenum layer. Another metal layer may be formed on the aluminum layer. The molybdenum layer has a face-centered cubic (FCC) lattice structure with a preferred orientation of (111).
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: August 16, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Jae-Kyeong Lee, Chang-Oh Jeong, Beom-Seok Cho
  • Publication number: 20110193076
    Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
    Type: Application
    Filed: December 1, 2010
    Publication date: August 11, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-Sang YUN, Ki-Won KIM, Hye-Young RYU, Woo-Geun LEE, Seung-Ha CHOI, Jae-Hyoung YOUN, Kyoung-Jae CHUNG, Young-Wook LEE, Je-Hun LEE, Kap-Soo YOON, Do-Hyun KIM, Dong-Ju YANG, Young-Joo CHOI
  • Publication number: 20110169060
    Abstract: Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including a copper layer and a copper solid solution layer.
    Type: Application
    Filed: March 18, 2011
    Publication date: July 14, 2011
    Inventors: Je-Hun LEE, Chang-Oh Jeong, Eun-Guk Lee, Do-Hyun Kim
  • Publication number: 20110149820
    Abstract: A method for adaptively performing power saving in a station of a wireless communication system includes: receiving first power-save capability information from an AP, the first power-save capability information containing information on power-save schemes supported by a MAC layer of the AP; transmitting second power-save capability information to the AP in response to the first power-save capability information, the second power-save capability information containing information on power-save schemes supported by a MAC layer of the station; transmitting power-save policy information, into which properties of traffics used in the station are reflected, to the AP; and performing a power-save function while interworking with the MAC layer of the station, according to the power-save policy information based on a predetermined power-save scheme.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 23, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Je-Hun Lee, Sok-Kyu Lee
  • Publication number: 20110140103
    Abstract: A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.
    Type: Application
    Filed: February 18, 2011
    Publication date: June 16, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Do-Hyun KIM, Eun-Guk LEE, Chang-OH JEONG
  • Patent number: 7960730
    Abstract: Provided is a method of fabricating a semiconductive oxide thin-film transistor (TFT) substrate. The method includes forming gate wiring on an insulation substrate; and forming a structure in which a semiconductive oxide film pattern and data wiring are stacked on the gate wiring, wherein the semiconductive oxide film pattern is selectively patterned to have channel regions of first thickness and source/drain regions of greater second thickness and where image data is coupled to the source regions by data wiring formed on the source regions. According to a 4-mask embodiment, the data wiring and semiconductive oxide film pattern are defined by a shared etch mask.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: June 14, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-hun Lee, Dong-ju Yang, Tae-hyung Ihn, Do-hyun Kim, Sun-young Hong, Seung-jae Jung, Chang-oh Jeong, Eun-guk Lee
  • Patent number: 7956950
    Abstract: In a liquid crystal display, an adhesion layer is provided between an insulating substrate and a wiring feature having very low resistance (e.g. a copper gate line). The adhesion layer may have a thickness of 190 to 210 nm. Good adhesion and high light transmittance can be obtained.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: June 7, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-guk Lee, Je-hun Lee, Do-hyun Kim, Chang-oh Jeong
  • Patent number: 7956947
    Abstract: A thin film transistor array substrate, which can have high mobility of charge and can achieve uniform electrical characteristics for wide display devices, and a method of manufacturing the thin film transistor array substrate, are provided. The thin film transistor array substrate includes an oxide semiconductor layer having a channel and formed on an insulating substrate, a gate electrode overlapping the oxide semiconductor layer, a gate insulating film disposed between the oxide semiconductor layer and the gate electrode, and a passivation film formed on the oxide semiconductor layer and the gate electrode. At least one of the gate insulating film and the passivation film contains fluorine-containing silicon.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: June 7, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Kap-Soo Yoon, Kyung-Seok Son, Do-Hyun Kim, Chang-Oh Jeong