Patents by Inventor Jean-Michel Riviere
Jean-Michel Riviere has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11211772Abstract: The disclosure concerns a housing for a light source mounted on a substrate, the housing comprising: a barrel comprising a mounting for a diffuser; and a diffuser positioned in the mounting, wherein the barrel comprises first and second conducting columns and a fuse or conductive wire electrically coupling the first and second conducting columns. A portion of the fuse is mechanically fixed to the diffuser and/or the fuse being arranged to trap the diffuser in said mounting.Type: GrantFiled: June 5, 2019Date of Patent: December 28, 2021Assignee: STMICROELECTRONICS (GRENOBLE 2) SASInventors: Romain Coffy, Jean-Michel Riviere
-
Publication number: 20210398919Abstract: A first integrated circuit chip is assembled to a second integrated circuit chip with a back-to-back surface relationship. The back surfaces of the integrated circuit chips are attached to each other using one or more of an adhesive, solder or molecular bonding. The back surface of at least one the integrated circuit chips is processed to include at least one of a trench, a cavity or a saw cut.Type: ApplicationFiled: September 3, 2021Publication date: December 23, 2021Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Rousset) SASInventors: Denis FARISON, Romain COFFY, Jean-Michel RIVIERE
-
Publication number: 20210328403Abstract: Electronic device comprising a support substrate having a mounting face and an electronic chip having a rear face bonded on the mounting face by a volume of adhesive, wherein the support substrate comprises a plurality of wedging elements projecting from the mounting face so as to hold the chip bearing on contact areas of the wedging elements in a position substantially parallel to the mounting face of the support substrate.Type: ApplicationFiled: April 13, 2021Publication date: October 21, 2021Applicant: STMICROELECTRONICS (GRENOBLE 2) SASInventors: Fabien QUERCIA, Jean-Michel RIVIERE
-
Publication number: 20210320473Abstract: An electronic device includes a base substrate having a mounting face. An electronic chip is fastened onto the mounting face of the base substrate. A transparent encapsulation structure is bonded onto the base substrate. The transparent encapsulation structure includes a housing with an internal cavity defining a chamber housing the electronic chip. The encapsulation structure has an external face that supports a light-filtering optical wafer located facing an optical element of the electronic chip. An opaque cover covers the transparent encapsulation structure and includes a local opening facing the light-filtering optical wafer.Type: ApplicationFiled: April 6, 2021Publication date: October 14, 2021Applicant: STMicroelectronics (Grenoble 2) SASInventors: Fabien QUERCIA, Jean-Michel RIVIERE
-
Patent number: 11139255Abstract: A first integrated circuit chip is assembled to a second integrated circuit chip with a back-to-back surface relationship. The back surfaces of the integrated circuit chips are attached to each other using one or more of an adhesive, solder or molecular bonding. The back surface of at least one the integrated circuit chips is processed to include at least one of a trench, a cavity or a saw cut.Type: GrantFiled: May 14, 2019Date of Patent: October 5, 2021Assignees: STMicroelectronics (Rousset) SAS, STMicroelectronics (Grenoble 2) SASInventors: Denis Farison, Romain Coffy, Jean-Michel Riviere
-
Publication number: 20210202781Abstract: A device includes a substrate and an optoelectronic chip buried in the substrate. The substrate may include an opening above a first optical transduction region of the first optoelectronic chip and above a second optical transduction region of a second optoelectronic chip.Type: ApplicationFiled: March 11, 2021Publication date: July 1, 2021Applicant: STMICROELECTRONICS (GRENOBLE 2) SASInventors: Alexandre COULLOMB, Romain COFFY, Jean-Michel RIVIERE
-
Patent number: 11038595Abstract: An optoelectronic device includes a substrate and a first optoelectronic chip flush with a surface of the substrate. The device includes a cover that covers the substrate and the first optoelectronic chip. The cover comprises a cavity above a first optical transduction region of the first optoelectronic chip. The device also includes a second optoelectronic chip having a second optical transduction region spaced apart from the first optical transduction region and the cavity continues above the second optical transduction region.Type: GrantFiled: May 10, 2019Date of Patent: June 15, 2021Assignee: STMicroelectronics (Grenoble 2) SASInventors: Alexandre Coullomb, Romain Coffy, Jean-Michel Riviere
-
Publication number: 20210159985Abstract: A cover for an electronic circuit package, including: a body having an opening extending therethrough; a first element located in the opening and having a surface continuing planar or rounded shapes of a surface of the cover; and a second element of connection of the first element to the body.Type: ApplicationFiled: February 5, 2021Publication date: May 27, 2021Inventors: Jean-Michel RIVIERE, Romain COFFY, Karine SAXOD
-
Publication number: 20210135069Abstract: An optoelectronic device includes an emitter of light rays and a receiver of light rays. The emitter is encapsulated within a first encapsulation layer, and the receiver is encapsulated within a second encapsulation layer. An opaque layer covers the first encapsulation layer (encapsulating the receiver) and covers the second encapsulation layer (encapsulating the emitter). The first and second encapsulation layers are separated by a region of opaque material. This opaque material may be provided by the opaque layer or an opaque fill.Type: ApplicationFiled: October 15, 2020Publication date: May 6, 2021Applicant: STMicroelectronics (Grenoble 2) SASInventors: Romain COFFY, Remi BRECHIGNAC, Jean-Michel RIVIERE
-
Publication number: 20210135038Abstract: An optoelectronic device includes an emitter of light rays and a receiver of light rays. The emitter is encapsulated in a transparent block. An opaque conductive layer is applied to a top surface and a side surface of the transparent block. The receiver is mounted to the opaque conductive layer at the top surface. An electrical connection is made between the receiver and the opaque conductive layer. A conductive strip is also mounted to the side surface of the transparent block and isolated from the opaque conductive layer. A further electrical connection is made between the receiver and the conductive strip.Type: ApplicationFiled: October 15, 2020Publication date: May 6, 2021Applicant: STMicroelectronics (Grenoble 2) SASInventors: Romain COFFY, Remi BRECHIGNAC, Jean-Michel RIVIERE
-
Patent number: 10996412Abstract: A carrier substrate includes a first network of electrical connections and recess. An electronic chip is mounted to the carrier substrate within the recess. The electronic chip includes an integrated guide of optical waves and a second network of electrical connections. A end section of an elongate optical cable is mounted on one side of the electronic chip with a longitudinal guide of optical waves optically coupled to the integrated guide of optical waves. Electrical connection elements are interposed between a face of the electronic chip and a bottom wall of the recess, such that first connect pads of the first electrical connection network are connected to second connect pads of the second electrical connection network through the electrical connection elements.Type: GrantFiled: December 3, 2019Date of Patent: May 4, 2021Assignee: STMicroelectronics (Grenoble 2) SASInventors: Florian Perminjat, Romain Coffy, Jean-Michel Riviere
-
Patent number: 10998470Abstract: A cover for an electronic circuit package, including an element having peripheral portions housed in an inner groove of a through opening.Type: GrantFiled: December 13, 2018Date of Patent: May 4, 2021Assignee: STMICROELECTRONICS (GRENOBLE 2) SASInventors: Jean-Michel Riviere, Romain Coffy, Karine Saxod
-
Patent number: 10978607Abstract: A device includes a substrate and an optoelectronic chip buried in the substrate. The substrate may include an opening above a first optical transduction region of the first optoelectronic chip and above a second optical transduction region of a second optoelectronic chip.Type: GrantFiled: May 10, 2019Date of Patent: April 13, 2021Assignee: STMICROELECTRONICS (GRENOBLE 2) SASInventors: Alexandre Coullomb, Romain Coffy, Jean-Michel Riviere
-
Patent number: 10965376Abstract: A cover for an electronic circuit package, including: a body having an opening extending therethrough; a first element located in the opening and having a surface continuing planar or rounded shapes of a surface of the cover; and a second element of connection of the first element to the body.Type: GrantFiled: December 13, 2018Date of Patent: March 30, 2021Assignee: STMICROELECTRONICS (GRENOBLE 2) SASInventors: Jean-Michel Riviere, Romain Coffy, Karine Saxod
-
Patent number: 10941921Abstract: The present disclosure relates to a light-emitting device comprising: a light source mounted on a substrate; a wire for providing a supply voltage or activation signal to the light source, a cap covering the light source and having a diffuser adapted to diffuse light generated by the light source; and either: a volume of glue fixing an intermediate section of the wire to the cap; or an arm fixed to the cap and extending between the intermediate section of the wire and the substrate.Type: GrantFiled: August 27, 2019Date of Patent: March 9, 2021Assignee: STMICROELECTRONICS (GRENOBLE 2) SASInventors: Romain Coffy, Jean-Michel Riviere
-
Publication number: 20210066554Abstract: An electronic device includes a first electronic component and a second electronic. Each electronic component includes a carrier substrate having a back side and a front side, an electronic chip including an integrated optical element, an overmolded transparent block encapsulating the electronic chip above the carrier substrate, and electrical connections between the electronic chip and electrical contacts of the carrier substrate. An overmolded grid encapsulates and holds the first and second electronic components. The grid is configured so that sides of the first and second electronic components are at least partially exposed.Type: ApplicationFiled: August 28, 2020Publication date: March 4, 2021Applicant: STMicroelectronics (Grenoble 2) SASInventors: Romain COFFY, Remi BRECHIGNAC, Jean-Michel RIVIERE
-
Publication number: 20210066271Abstract: An opaque dielectric carrier and confinement substrate is formed by a stack of layers laminated on each other. The stack includes a solid back layer and a front frame having a peripheral wall and an intermediate partition which delimits two cavities located on top of the solid back layer and on either side of the intermediate partition. Electronic integrated circuit (IC) chips are located inside the cavities and mounted on top of the solid back layer. Each IC chip includes an integrated optical element. Electrical connections are provided between the IC chips and back electrical contacts of the solid back layer. Transparent encapsulation blocks are molded in the cavities to embed the IC chips.Type: ApplicationFiled: August 28, 2020Publication date: March 4, 2021Applicant: STMicroelectronics (Grenoble 2) SASInventors: Romain COFFY, Remi BRECHIGNAC, Jean-Michel RIVIERE
-
Patent number: 10903388Abstract: A main carrier wafer includes a first integrated network of electronic connections between front and back faces. A first electronic chip is mounted to the front face of the main carrier wafer and connected to the network of electronic connections of the main carrier wafer. A secondary carrier wafer includes a platform that extends over the first chip and a base the protrudes backwards with respect to the platform to a back end face facing the main wafer. A second integrated network of electronic connections is provided within the secondary carrier wafer. A second electronic chip is mounted on top of the platform and connected to the second integrated network. The second integrated network is further connected to the main carrier wafer at the back end face.Type: GrantFiled: April 8, 2019Date of Patent: January 26, 2021Assignee: STMicroelectronics (Grenoble 2) SASInventor: Jean-Michel Riviere
-
Patent number: 10865962Abstract: The disclosure concerns a housing for a light source mounted on a substrate, the housing comprising: a barrel having first and second conducting columns; and a diffuser having one or more conductive paths arranged to electrically connect the first and second conducting columns when the diffuser is mounted on the barrel.Type: GrantFiled: June 5, 2019Date of Patent: December 15, 2020Assignee: STMICROELECTRONICS (GRENOBLE 2) SASInventors: Romain Coffy, Jean-Michel Riviere
-
Publication number: 20200303565Abstract: An encapsulation cover for an electronic package includes a frontal wall with a through-passage extending between faces. The frontal wall includes an optical element that allows light to pass through the through-passage. A cover body and a metal insert that is embedded in the cover body, with the cover body being overmolded over the metal insert, defines at least part of the frontal wall.Type: ApplicationFiled: June 9, 2020Publication date: September 24, 2020Applicant: STMicroelectronics (Grenoble 2) SASInventors: Karine SAXOD, Veronique FERRE, Agnes BAFFERT, Jean-Michel RIVIERE