Patents by Inventor Jee-Yong Kim

Jee-Yong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190043880
    Abstract: A three-dimensional semiconductor device includes gate electrodes including pad regions sequentially lowered by a first step portion in a first direction and sequentially lowered by a second step portion in a second direction perpendicular to the first direction, the second step portion being lower than the first step portion, wherein a length of a single pad region among pad regions sequentially lowered by the second step portion in the second direction is less than a length of a remainder of the pad regions in the second direction.
    Type: Application
    Filed: March 22, 2018
    Publication date: February 7, 2019
    Inventors: Jung Hwan LEE, Jee Yong KIM, Seok Jung YUN, Ji Hyeon LEE
  • Publication number: 20180245812
    Abstract: A component used in an air conditioner includes a substrate and a nano-coating formed on a surface of the substrate, wherein the nano-coating includes a lower coating formed on the surface of the substrate; and an upper coating formed on the upper surface of the lower coating, a coating composition of the upper coating includes nanoparticles having a diameter of 10 nm to 30 nm, and an interval between adjacent nanoparticles among the plurality of nanoparticles located on a surface of the upper coating is 10 nm to 30 nm.
    Type: Application
    Filed: August 23, 2016
    Publication date: August 30, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jee-yong KIM, Jae-hyoun KIM, Jin-o KIM, Sin-young LEE
  • Publication number: 20180207311
    Abstract: An electronic apparatus capable of controlling the air purification performance of a photocatalytic filter according to an air volume of a blowing fan and a concentration of a specific gas. An electronic apparatus having a deodorizing performance recovery function of a photocatalytic filter. The electronic apparatus includes a blowing fan, a filter apparatus configured to purify air introduced by the blowing fan and a controller configured to adjust a current applied to the filter apparatus, wherein the filter apparatus comprises a light emitting module to which a plurality of light emitting portions configured to output ultraviolet light is mounted, a photocatalytic filter provided to face the light emitting portion and a support frame configured to support the light emitting module and the photocatalytic filter to be apart from each other by a predetermined distance.
    Type: Application
    Filed: January 23, 2018
    Publication date: July 26, 2018
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong Kwan CHO, Jee Yong KIM, Ah Hyun BAE, Myung Ju SHIN, Il Yong CHO
  • Patent number: 10026746
    Abstract: A memory device may include a gate structure including a plurality of gate electrode layers and a plurality of insulating layers alternately stacked on a substrate, a plurality of etching stop layers, extending from the insulating layers respectively, being on respective lower portions of the gate electrode layers; and a plurality of contacts connected to the gate electrode layers above upper portions of the etching stop layers, respectively, wherein respective ones of the etching stop layers include an air gap therein.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: July 17, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong Gil Lee, Jee Yong Kim, Jung Hwan Lee, Dae Seok Byeon, Hyun Seok Lim
  • Patent number: 9997537
    Abstract: Semiconductor devices are provided. A semiconductor device includes a stack of alternating insulation layers and gate electrodes. The semiconductor device includes a channel material in a channel recess in the stack. The semiconductor device includes a charge storage structure on the channel material, in the channel recess. Moreover, the semiconductor device includes a gate insulation layer on the channel material. The gate insulation layer undercuts a portion of the channel material. Related methods of forming semiconductor devices are also provided.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: June 12, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Lee, Jee-Yong Kim, Dae-Seok Byeon
  • Publication number: 20180108664
    Abstract: A memory device may include a gate structure including a plurality of gate electrode layers and a plurality of insulating layers alternately stacked on a substrate, a plurality of etching stop layers, extending from the insulating layers respectively, being on respective lower portions of the gate electrode layers; and a plurality of contacts connected to the gate electrode layers above upper portions of the etching stop layers, respectively, wherein respective ones of the etching stop layers include an air gap therein.
    Type: Application
    Filed: May 24, 2017
    Publication date: April 19, 2018
    Inventors: Jeong Gil Lee, Jee Yong Kim, Jung Hwan Lee, Dae Seok Byeon, Hyun Seok Lim
  • Publication number: 20180054860
    Abstract: A cooking appliance having an improved structure capable of improving visibility to enable a user to clearly look at the inside of the cooking chamber during cooking includes a main body having the cooking chamber and a door disposed at the main chamber to open or close the cooking chamber, the door including a shielding member woven with conductive wires and a fixing member to electrically connect the shielding member with a door frame of the door. Electromagnetic waves generated in the cooking chamber can be prevented from leaking to the outside.
    Type: Application
    Filed: July 27, 2017
    Publication date: February 22, 2018
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jee Yong KIM, Jin O KIM, Ki Du KIM, Kyung Sun MIN, Myung Ju SHIN, Ah Hyun BAE
  • Patent number: 9899394
    Abstract: A vertical memory device includes a plurality of gate electrodes at a plurality of levels, respectively, spaced apart from each other in a vertical direction substantially perpendicular to a top surface of a substrate, a channel extending in the vertical direction on the substrate and penetrating through the gate electrodes, and a plurality of contact plugs extending in the vertical direction and contacting the gate electrodes, respectively. At least one second contact plug is formed on a first gate electrode among the plurality of gate electrodes, and extends in the vertical direction.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: February 20, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Min Hwang, Jee-Yong Kim, Dae-Seok Byeon
  • Patent number: 9859297
    Abstract: A semiconductor device includes a substrate including cell and dummy regions, first channel structures on the cell region and extending in a first direction vertical with respect to the substrate, gate lines surrounding outer sidewalls of the first channel structures and extending in a second direction parallel to the substrate, the gate lines being spaced apart from each other along the first direction, cutting lines between the gate lines on the cell region and extending in the second direction, dummy patterns spaced apart from each other along the first direction on the dummy region, the dummy patterns having a stepped shape along a third direction parallel to the top surface of the substrate and perpendicular to the second direction, at least a portion of the dummy patterns including a same conductive material as that in the gate lines, and dummy lines through the dummy patterns.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: January 2, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-Hyun Park, Jee-Yong Kim, Dae-Seok Byeon
  • Patent number: 9816725
    Abstract: A heat exchanger usable with a ventilator, the heat exchanger having an improved structure so that air passing through the heat exchanger may be prevented from leaking. The heat exchanger of the general inventive concept includes a heat-exchanging element having a plurality of liners stacked in a uniformly spaced state and a plurality of spacers disposed between the liners to define air passages, and corner guides respectively coupled to corners of the heat-exchanging element. Each of the corner guides includes a guide channel forming a space to receive the corner of the heat-exchanging element so that the corner guides securely come into close contact with the heat-exchanging element, and to minimize a loosening of the corner guide due to an adhesive applied between the heat-exchanging element and the corner guide.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: November 14, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Chul Kwon, Sung Woo Kim, Euy Sung Chu, Jee Yong Kim
  • Publication number: 20170245680
    Abstract: Disclosed herein are a cooking apparatus including a main body including a cooking compartment configured to cook food using microwaves, and a door configured to open or close the cooking compartment, wherein the door includes a door frame in which an opening is formed so that the cooking compartment is visible therethrough, and a shielding plate including a substrate and a multi-shielding layer, with which the substrate is coated to prevent microwaves in the cooking compartment from leaking to an outside, and coupled at the opening. The door of the cooking apparatus allows an inside of the cooking compartment to be better seen from the outside.
    Type: Application
    Filed: February 28, 2017
    Publication date: August 31, 2017
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin O KIM, Jee Yong KIM, Min-Gyu JUNG, Ki Du KIM, Ah Hyun BAE
  • Publication number: 20170092657
    Abstract: Semiconductor devices are provided. A semiconductor device includes a stack of alternating insulation layers and gate electrodes. The semiconductor device includes a channel material in a channel recess in the stack. The semiconductor device includes a charge storage structure on the channel material, in the channel recess. Moreover, the semiconductor device includes a gate insulation layer on the channel material. The gate insulation layer undercuts a portion of the channel material. Related methods of forming semiconductor devices are also provided.
    Type: Application
    Filed: December 12, 2016
    Publication date: March 30, 2017
    Inventors: Jung-Hwan LEE, Jee-Yong KIM, Dae-Seok BYEON
  • Publication number: 20170062473
    Abstract: A vertical memory device includes a substrate, gate lines, channels, contacts and contact spacers. The gate lines are stacked on top of each other on the substrate. The gate lines are spaced apart from each other in a vertical direction with respect to a top surface of the substrate. The gate lines include step portions that extend in a parallel direction with respect to the top surface of the substrate. The channels extend through the gate lines in the vertical direction. The contacts are on the step portions of the gate lines. The contact spacers are selectively formed along sidewalls of a portion of the contacts.
    Type: Application
    Filed: November 11, 2016
    Publication date: March 2, 2017
    Inventors: Byung-Jin LEE, Jee-Yong Kim, Dae-Seok Byeon
  • Patent number: 9553105
    Abstract: Semiconductor devices are provided. A semiconductor device includes a stack of alternating insulation layers and gate electrodes. The semiconductor device includes a channel material in a channel recess in the stack. The semiconductor device includes a charge storage structure on the channel material, in the channel recess. Moreover, the semiconductor device includes a gate insulation layer on the channel material. The gate insulation layer undercuts a portion of the channel material. Related methods of forming semiconductor devices are also provided.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: January 24, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Hwan Lee, Jee-Yong Kim, Dae-Seok Byeon
  • Patent number: 9524983
    Abstract: A vertical memory device includes a substrate, gate lines, channels, contacts and contact spacers. The gate lines are stacked on top of each other on the substrate. The gate lines are spaced apart from each other in a vertical direction with respect to a top surface of the substrate. The gate lines include step portions that extend in a parallel direction with respect to the top surface of the substrate. The channels extend through the gate lines in the vertical direction. The contacts are on the step portions of the gate lines. The contact spacers are selectively formed along sidewalls of a portion of the contacts.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: December 20, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Jin Lee, Jee-Yong Kim, Dae-Seok Byeon
  • Patent number: 9462929
    Abstract: A dish washer with an improved flow channel of air passing through an adsorbent includes a tub to wash dishes, a drying device to supply air into the tub to dry the dishes, and an adsorbent case provided in the drying device. The adsorbent case includes an inner space in which an adsorbent to adsorb moisture contained in air in the tub is provided, and at least one mesh unit located in the inner space to form a flow channel of air passing through the adsorbent. The flow channel is formed in the adsorbent using the mesh unit to reduce flow resistance of air flowing through the adsorbent. Air rapidly passes through the flow channel, thereby reducing drying time.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: October 11, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang Hyun Park, Dong Ho Park, Jung Yoon Hahm, Jee Yong Kim
  • Publication number: 20160268287
    Abstract: A semiconductor device includes a substrate including cell and dummy regions, first channel structures on the cell region and extending in a first direction vertical with respect to the substrate, gate lines surrounding outer sidewalls of the first channel structures and extending in a second direction parallel to the substrate, the gate lines being spaced apart from each other along the first direction, cutting lines between the gate lines on the cell region and extending in the second direction, dummy patterns spaced apart from each other along the first direction on the dummy region, the dummy patterns having a stepped shape along a third direction parallel to the top surface of the substrate and perpendicular to the second direction, at least a portion of the dummy patterns including a same conductive material as that in the gate lines, and dummy lines through the dummy patterns.
    Type: Application
    Filed: February 19, 2016
    Publication date: September 15, 2016
    Inventors: Jong-Hyun PARK, Jee-Yong KIM, Dae-Seok BYEON
  • Publication number: 20160268302
    Abstract: Semiconductor devices are provided. A semiconductor device includes a stack of alternating insulation layers and gate electrodes. The semiconductor device includes a channel material in a channel recess in the stack. The semiconductor device includes a charge storage structure on the channel material, in the channel recess. Moreover, the semiconductor device includes a gate insulation layer on the channel material. The gate insulation layer undercuts a portion of the channel material. Related methods of forming semiconductor devices are also provided.
    Type: Application
    Filed: January 14, 2016
    Publication date: September 15, 2016
    Inventors: Jung-Hwan Lee, Jee-Yong Kim, Dae-Seok Byeon
  • Publication number: 20160268264
    Abstract: A vertical memory device includes a plurality of gate electrodes at a plurality of levels, respectively, spaced apart from each other in a vertical direction substantially perpendicular to a top surface of a substrate, a channel extending in the vertical direction on the substrate and penetrating through the gate electrodes, and a plurality of contact plugs extending in the vertical direction and contacting the gate electrodes, respectively. At least one second contact plug is formed on a first gate electrode among the plurality of gate electrodes, and extends in the vertical direction.
    Type: Application
    Filed: January 20, 2016
    Publication date: September 15, 2016
    Inventors: Sung-Min Hwang, Jee-Yong Kim, Dae-Seok Byeon
  • Publication number: 20160268301
    Abstract: A vertical memory device includes a substrate, gate lines, channels, contacts and contact spacers. The gate lines are stacked on top of each other on the substrate. The gate lines are spaced apart from each other in a vertical direction with respect to a top surface of the substrate. The gate lines include step portions that extend in a parallel direction with respect to the top surface of the substrate. The channels extend through the gate lines in the vertical direction. The contacts are on the step portions of the gate lines. The contact spacers are selectively formed along sidewalls of a portion of the contacts.
    Type: Application
    Filed: January 5, 2016
    Publication date: September 15, 2016
    Inventors: Byung-Jin Lee, Jee-Yong Kim, Dae-Seok Byeon