Patents by Inventor Jeffrey Babcock

Jeffrey Babcock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bipolar junction transistor
    Publication number: 20020041008
    Abstract: An improved BJT is described that maximizes both Bvceo and Ft/Fmax for optimum performance. Scattering centers are introduced in the collector region (80) of the BJT to improve Bvceo. The inclusion of the scattering centers allows the width of the collector region WCD (90) to be reduced leading to an improvement in Ft/Fmax.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 11, 2002
    Inventors: Gregory E. Howard, Jeffrey A. Babcock, Angelo Pinto, Scott Balster
  • Advanced CMOS using super steep retrograde wells
    Publication number: 20020033511
    Abstract: The present invention is a method for forming super steep doping profiles in MOS transistor structures. The method comprises forming a carbon containing layer (110) beneath the gate dielectric (50) and source and drain regions (80) of a MOS transistor. The carbon containing layer (110) will prevent the diffusion of dopants into the region (40) directly beneath the gate dielectric layer (50).
    Type: Application
    Filed: September 7, 2001
    Publication date: March 21, 2002
    Inventors: Jeffrey A. Babcock, Angelo Pinto, Scott Balster, Alfred Haeusler, Gregory E. Howard
  • On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits
    Publication number: 20020033519
    Abstract: An integrated circuit programmable structure (60) is formed for use a trim resistor and/or a programmable fuse. The programmable structure comprises placing heating elements (70) in close proximity to the programmable structure (60) to heat the programmable structure (60) during programming.
    Type: Application
    Filed: September 7, 2001
    Publication date: March 21, 2002
    Inventors: Jeffrey A. Babcock, Angelo Pinto, Gregory E. Howard, Philipp Steinmann, Scott Balster
  • RF voltage controlled capacitor on thick-film SOI
    Publication number: 20020008268
    Abstract: A voltage controlled capacitor sandwiched between a buried oxide and a shallow trench insulator to form a near ideal P+ to n-well diode with minimal parasitic capacitance and resistance.
    Type: Application
    Filed: May 21, 2001
    Publication date: January 24, 2002
    Inventors: Jeffrey A. Babcock, Gregory E. Howard, Angelo Pinto