Abstract: A method for forming a self aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material having an affinity for portions of the existing pattern; and allowing at least a portion of the masking material to preferentially assemble to the portions of the existing pattern. The pattern may be comprised of a first set of regions of the substrate having a first atomic composition and a second set of regions of the substrate having a second atomic composition different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. The first and second regions may be treated to have different surface properties. Structures made in accordance with the method. Compositions useful for practicing the method.

Abstract: A dielectric material layer is formed on a front surface of a photovoltaic device. A patterned PMMA-type-material-including layer is formed on the dielectric material layer, and the pattern is transferred into the top portion of the photovoltaic device to form trenches in which contact structures can be formed. In one embodiment, a blanket PMMA-type-material-including layer is deposited on the dielectric material layer, and is patterned by laser ablation that removes ablated portions of PMMA-type-material. The PMMA-type-material-including layer may also include a dye to enhance absorption of the laser beam. In another embodiment, a blanket PMMA-type-material-including layer may be deposited on the dielectric material layer and mechanically patterned to form channels therein. In yet another embodiment, a patterned PMMA-type-material-including layer is stamped on top of the dielectric material layer.

Abstract: A dielectric material layer is formed on a front surface of a photovoltaic device. A patterned PMMA-type-material-including layer is formed on the dielectric material layer, and the pattern is transferred into the top portion of the photovoltaic device to form trenches in which contact structures can be formed. In one embodiment, a blanket PMMA-type-material-including layer is deposited on the dielectric material layer, and is patterned by laser ablation that removes ablated portions of PMMA-type-material. The PMMA-type-material-including layer may also include a dye to enhance absorption of the laser beam. In another embodiment, a blanket PMMA-type-material-including layer may be deposited on the dielectric material layer and mechanically patterned to form channels therein. In yet another embodiment, a patterned PMMA-type-material-including layer is stamped on top of the dielectric material layer.

Abstract: Structures having low-k multilayered dielectric diffusion barrier layer having at least one low-k sublayer and at least one air barrier sublayer are described herein. The multilayered dielectric diffusion barrier layer are diffusion barriers to metal and barriers to air permeation. Methods and compositions relating to the generation of the structures are also described. The advantages of utilizing these low-k multilayered dielectric diffusion barrier layer is a gain in chip performance through a reduction in capacitance between conducting metal features and an increase in reliability as the multilayered dielectric diffusion barrier layer are impermeable to air and prevent metal diffusion.

Abstract: Structures having low-k multilayered dielectric diffusion barrier layer having at least one low-k sublayer and at least one air barrier sublayer are described herein. The multilayered dielectric diffusion barrier layer are diffusion barriers to metal and barriers to air permeation. Methods and compositions relating to the generation of the structures are also described. The advantages of utilizing these low-k multilayered dielectric diffusion barrier layer is a gain in chip performance through a reduction in capacitance between conducting metal features and an increase in reliability as the multilayered dielectric diffusion barrier layer are impermeable to air and prevent metal diffusion.

Abstract: A method for forming a self aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material having an affinity for portions of the existing pattern; and allowing at least a portion of the masking material to preferentially assemble to the portions of the existing pattern. The pattern may be comprised of a first set of regions of the substrate having a first atomic composition and a second set of regions of the substrate having a second atomic composition different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. The first and second regions may be treated to have different surface properties. Structures made in accordance with the method. Compositions useful for practicing the method.

Abstract: A method for forming a self aligned pattern on an existing pattern on a substrate comprising applying a coating of the masking material to the substrate; and allowing at least a portion of the masking material to preferentially attach to portions of the existing pattern. The pattern is comprised of a first set of regions of the substrate having a first atomic composition and a second set of regions of the substrate having a second atomic composition different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. The masking material may comprise a polymer containing a reactive grafting site that selectively binds to the portions of the pattern.

Abstract: A method of fabricating a structure including a low-k multilayered dielectric diffusion barrier layer having at least one low-k sublayer and at least one air barrier sublayer is described herein. The method includes applying a coating of a polymeric preceramic precursor, converting the polymeric preceramic precursor into a low-k sublayer, applying a coating of an air barrier sublayer and exposing the air barrier sublayer to a reactive plasma.

Abstract: A method for forming a self aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material having an affinity for portions of the existing pattern; and allowing at least a portion of the masking material to preferentially assemble to the portions of the existing pattern. The pattern may be comprised of a first set of regions of the substrate having a first atomic composition and a second set of regions of the substrate having a second atomic composition different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. The first and second regions may be treated to have different surface properties. Structures made in accordance with the method. Compositions useful for practicing the method.

Abstract: A method for forming a self aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material having an affinity for portions of the existing pattern; and allowing at least a portion of the masking material to preferentially assemble to the portions of the existing pattern. The pattern may be comprised of a first set of regions of the substrate having a first atomic composition and a second set of regions of the substrate having a second atomic composition different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. The first and second regions may be treated to have different surface properties. Structures made in accordance with the method. Compositions useful for practicing the method.

Abstract: Structures having low-k multilayered dielectric diffusion barrier layer having at least one low-k sublayer and at least one air barrier sublayer are described herein. The multilayered dielectric diffusion barrier layer are diffusion barriers to metal and barriers to air permeation. Methods and compositions relating to the generation of the structures are also described. The advantages of utilizing these low-k multilayered dielectric diffusion barrier layer is a gain in chip performance through a reduction in capacitance between conducting metal features and an increase in reliability as the multilayered dielectric diffusion barrier layer are impermeable to air and prevent metal diffusion.

Abstract: The present invention comprises an interconnect structure including a metal, interlayer dielectric and a ceramic diffusion barrier formed therebetween, where the ceramic diffusion barrier has a composition SivNwCxOyHz, where 0.1?v?0.9, 0?w?0.5, 0.01?x?0.9, 0?y?0.7, 0.01?z?0.8 for v+w+x+y+z=1. The ceramic diffusion barrier acts as a diffusion barrier to metals, i.e., copper. The present invention also comprises a method for forming the inventive ceramic diffusion barrier including the steps depositing a polymeric preceramic having a composition SivNwCxOyHz, where 0.1<v<0.8, 0<w<0.8, 0.05<x<0.8, 0<y<0.3, 0.05<z<0.8 for v+w+x+y+z=1 and then converting the polymeric preceramic layer into a ceramic diffusion barrier by thermal methods.

Abstract: Structures having low-k multilayered dielectric diffusion barrier layer having at least one low-k sublayer and at least one air barrier sublayer are described herein. The multilayered dielectric diffusion barrier layer are diffusion barriers to metal and barriers to air permeation. Methods and compositions relating to the generation of the structures are also described. The advantages of utilizing these low-k multilayered dielectric diffusion barrier layer is a gain in chip performance through a reduction in capacitance between conducting metal features and an increase in reliability as the multilayered dielectric diffusion barrier layer are impermeable to air and prevent metal diffusion.

Abstract: The present invention comprises an interconnect structure including a metal, interlayer dielectric and a ceramic diffusion barrier formed therebetween, where the ceramic diffusion barrier has a composition SivNwCxOyHz, where 0.1?v?0.9, 0?w?0.5, 0.01?0.5, 0.01?x?0.9,0?y?0.7,0.01?z?0.8 for v+w+x+y+z=1. The ceramic diffusion barrier acts as a diffusion barrier to metals, i.e., copper. The present invention also comprises a method for forming the inventive ceramic diffusion barrier including the steps depositing a polymeric preceramic having a composition SivNwCxOyHz, where 0.1<v<0.8, 0<w<0.8, 0.05<x<0.8, 0<y<0.3, 0.05<z<0.8 for v+w+x+y+z=1 and then converting the polymeric preceramic layer into a ceramic diffusion barrier by thermal methods.

Abstract: An electrical interconnect structure on a substrate, includes a first porous dielectric layer with surface region from which a porogen has been removed; and an etch stop layer disposed upon the first porous dielectric layer so that the etch stop layer extends to partially fill pores in the surface region of the first porous dielectric layer from which the porogen has been removed, thus improving adhesion during subsequent processing. The porogen may be removed from the surface region by heating, and in particular by hot plate baking. A second porous dielectric layer, which may have the same composition as the first porous dielectric layer, may be formed over the etch stop layer. Electrical vias and lines may be formed in the first and second porous dielectric layer, respectively. The layers may be part of a multilayer stack, wherein all of the layers are cured simultaneously in a spin application tool porous dielectric layer.

Abstract: The present invention comprises a method for forming a hardmask including the steps of depositing a polymeric preceramic precursor film atop a substrate; converting the polymeric preceramic precursor film into at least one ceramic layer, where the ceramic layer has a composition of SivNwCxOyHz where 0.1?v?0.9, 0?w?0.5, 0.05?x?0.9, 0?y?0.5, 0.05?z?0.8 for v+w+x+y+z=1; forming a patterned photoresist atop the ceramic layer; patterning the ceramic layer to expose regions of the underlying substrate, where a remaining region of the underlying substrate is protected by the patterned ceramic layer; and etching the exposed region of the underlying substrate. Another aspect of the present invention is a buried etch stop layer having a composition of SivNwCxOyHz where 0.05<v<0.8, 0<w<0.9, 0.05<x<0.8, 0<y<0.8, 0.05<z<0.8 for v+w+x+y+z=1.

Abstract: A method for forming a self aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material having an affinity for portions of the existing pattern; and allowing at least a portion of the masking material to preferentially assemble to the portions of the existing pattern. The pattern may be comprised of a first set of regions of the substrate having a first atomic composition and a second set of regions of the substrate having a second atomic composition different from the first composition. The first set of regions may include one or more metal elements and the second set of regions may include a dielectric. The first and second regions may be treated to have different surface properties. Structures made in accordance with the method. Compositions useful for practicing the method.

Abstract: A method for removing a dielectric layer formed upon a semiconductor substrate is disclosed. In an exemplary embodiment of the invention, the method includes subjecting the dielectric layer to a dry etch process and subjecting an adhesion promoter layer underneath the dielectric layer to a wet etch process.

Abstract: An electrical interconnect structure on a substrate, includes a first porous dielectric layer with surface region from which a porogen has been removed; and an etch stop layer disposed upon the first porous dielectric layer so that the etch stop layer extends to partially fill pores in the surface region of the first porous dielectric layer from which the porogen has been removed, thus improving adhesion during subsequent processing. The porogen may be removed from the surface region by heating, and in particular by hot plate baking. A second porous dielectric layer, which may have the same composition as the first porous dielectric layer, may be formed over the etch stop layer. Electrical vias and lines may be formed in the first and second porous dielectric layer, respectively. The layers may be part of a multilayer stack, wherein all of the layers are cured simultaneously in a spin application tool porous dielectric layer.

Abstract: A structure useful for electrical interconnection comprises a substrate; a plurality of porous dielectric layers disposed on the substrate; an etch stop layer disposed between a first of the dielectric layers and a second of the dielectric layers; and at least one thin, tough, non-porous dielectric layer disposed between at least one of the porous dielectric layers and the etch stop layer. A method for forming the structure comprising forming a multilayer stack of porous dielectric layers on the substrate, the stack including the plurality of porous dielectric layers, and forming a plurality of patterned metal conductors within the multilayer stack. Curing of the multilayer dielectric stack may be in a single cure step in a furnace. The application and hot plate baking of the individual layers of the multi layer dielectric stack may be accomplished in a single spin-coat tool, without being removed, to fully cure the stack until all dielectric layers have been deposited.