Patents by Inventor Jeffrey Smith

Jeffrey Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210028169
    Abstract: Aspects of the disclosure provide a method for forming a semiconductor apparatus. The method includes forming a first field-effect transistor (FET) that includes a first gate on a substrate of the semiconductor apparatus. The method includes forming a second FET that is stacked on the first FET along a direction substantially perpendicular to the substrate and includes a second gate. The method includes forming a first routing track and a second routing track that is electrically isolated from the first routing track. Each of the first and second routing tracks is provided on a routing plane stacked on the second FET along the direction. A first conductive trace configured to conductively couple the first gate of the first FET to the first routing track can be formed. A second conductive trace configured to conductively couple the second gate of the second FET to the second routing track can be formed.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 28, 2021
    Applicant: Tokyo Electron Limited
    Inventors: Jeffrey Smith, Anton J. deVilliers, Kandabara N. TAPILY, Subhadeep KAL, Gerrit J. LEUSINK
  • Publication number: 20210013111
    Abstract: A method for microfabrication of a three dimensional transistor stack having gate-all-around field-effect transistor devices. The channels hang between source/drain regions. Each channel is selectively deposited with layers of materials designed for adjusting the threshold voltage of the channel. The layers may be oxides, high-k materials, work function materials and metallization. The three dimensional transistor stack forms an array of high threshold voltage devices and low threshold voltage devices in a single package.
    Type: Application
    Filed: July 9, 2020
    Publication date: January 14, 2021
    Applicant: Tokyo Electron Limited
    Inventors: Jeffrey SMITH, Kandabara TAPILY, Lars LIEBMANN, Daniel CHANEMOUGAME, Mark GARDNER, H. Jim FULFORD, Anton J. DEVILLIERS
  • Publication number: 20200385162
    Abstract: A shipping container comprising first and second side panels, and first and second end panels connecting the first and second side panels. A pair of major upper flaps are foldably connected to respective side panels, the major upper flaps each forming half of a top panel. A pair of minor upper flaps are foldably connected to respective end panels, each of the minor upper flaps including a central tuck flap panel and a pair of gusset panels foldably connected to and overlapping the central tuck flap panel to form a tuck flap structure. Each tuck flap structure extending along an outer side of a respective end panel and including an end portion extending into an access port formed on the respective end panel.
    Type: Application
    Filed: June 4, 2019
    Publication date: December 10, 2020
    Inventors: JEFFREY A. SMITH, JACK LAWRENCE LANE, JOEL GREGORY WISEHART PHILLIPS
  • Publication number: 20200375599
    Abstract: An apparatus and its method of use in delivering surgical tissue connectors into an area of the body and removing the surgical tissue connectors from the body area. The tissue connectors are connected to a base which allows for easy adjustment of the tissue connectors along a cord. The base includes a locking mechanism which impinges a sliding knot in the cord, and, in alternate configurations of the locking mechanism and knot, impinges on the sliding knot to prevent sliding in a loosening direction but allow sliding in a tightening direction, or allows sliding in a loosening direction.
    Type: Application
    Filed: August 18, 2020
    Publication date: December 3, 2020
    Applicant: Freehold Surgical, LLC
    Inventors: Jeffrey Smith, Darren R. Sherman
  • Publication number: 20200378104
    Abstract: A urinal screen can include a frame having: a first face; a second face opposite the first face; and a plurality of apertures extending through the first and second faces. The urinal screen can include a plurality of first posts extending from the first face of the frame and configured to at least partially dissipate splashing of urine that impacts the urinal screen; and a plurality of second posts extending from the second face of the frame and configured to at least partially dissipate splashing of urine that impacts the urinal screen; wherein: at least ? majority of the plurality of first and second posts are parallel to each other; at least ? of the plurality of second posts are parallel to each other; and the at least ? majority of the plurality of firsts posts extend at a non-perpendicular angle from with respect to the first face of the frame.
    Type: Application
    Filed: December 18, 2018
    Publication date: December 3, 2020
    Inventors: Douglas S. BROWN, Jeffrey A. SMITH
  • Publication number: 20200381430
    Abstract: A 3D IC includes a substrate having a substrate surface, a first stack of semiconductor devices stacked along a thickness direction of the substrate, and a second stack of semiconductor devices stacked along the thickness direction of the substrate and provided adjacent to the first stack in a direction along the substrate surface. Each semiconductor device of the first and second stack includes a gate and a pair of source-drain regions provided on opposite sides of the respective gate, and each gate of the first and second stack is a split gate. A gate contact is physically connected to a first split gate of a first one of the semiconductor devices. The gate contact forms at least part of a local interconnect structure that electrically connects the first semiconductor device to a second semiconductor device in the 3D IC.
    Type: Application
    Filed: April 15, 2020
    Publication date: December 3, 2020
    Applicant: Tokyo Electron Limited
    Inventors: Lars Liebmann, Jeffrey Smith, Anton deVilliers, Daniel Chanemougame
  • Publication number: 20200373203
    Abstract: A semiconductor device includes dielectric layers and local interconnects that are stacked over a substrate alternatively, and extend along a top surface of the substrate laterally. Sidewalls of the dielectric layers and sidewalls of the local interconnects have a staircase configuration. The local interconnects are spaced apart from each other by dielectric layers and have uncovered portions by the dielectric layers. The semiconductor device also includes conductive layers selectively positioned over the uncovered portions of the local interconnects, where sidewalls of the conductive layers and sidewalls of the local interconnects are coplanar. The semiconductor device further includes isolation caps that extend from the dielectric layers. The isolation caps are positioned along sidewalls of the conductive layers and sidewalls of the local interconnects so as to separate the conductive layers from one another.
    Type: Application
    Filed: December 19, 2019
    Publication date: November 26, 2020
    Applicant: Tokyo Electron Limited
    Inventors: Lars Liebmann, Jeffrey Smith, Anton J. deVilliers, Kandabara Tapily
  • Publication number: 20200373330
    Abstract: A semiconductor device includes a coaxial contact that has conductive layers extending from local interconnects and being coupled to metal layers. The local interconnects are stacked over a substrate and extend laterally along a top surface of the substrate. The metal layers are stacked over the local interconnects and extend laterally along the top surface of the substrate. The conductive layers are close-shaped and concentrically arranged, where each of the local interconnects is coupled to a corresponding conductive layer, and each of the conductive layers is coupled to a corresponding metal layer. The semiconductor device also includes insulating layers that are close-shaped, concentrically arranged, and positioned alternately with respect to the conductive layers so that the conductive layers are spaced apart from one another by the insulating layers.
    Type: Application
    Filed: December 17, 2019
    Publication date: November 26, 2020
    Inventors: Lars Liebmann, Jeffrey Smith, Anton J. deVilliers, Kandabara Tapily
  • Patent number: 10847424
    Abstract: A method of forming a nanowire device includes providing a substrate containing nanowires between vertical spacers, selectively depositing a high-k film on the nanowires relative to the vertical spacers, and selectively depositing a metal-containing gate electrode layer on the high-k film relative to the vertical spacers. The method can further include selectively depositing a dielectric material on the vertical spacers prior to selectively depositing the high-k film, where the dielectric material has a lower dielectric constant than the high-k film.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: November 24, 2020
    Assignee: Tokyo Electron Limited
    Inventors: Kandabara Tapily, Jeffrey Smith, Gerrit Leusink
  • Publication number: 20200363424
    Abstract: Provided are methods for detecting protein interactions in a sample, the methods comprising: (a) detecting two or more polypeptides that when associated emit a first detectable signal in a first light emission spectrum; (b) contacting the two or more polypeptides with a third polypeptide conjugated to a dipole acceptor moiety that has a second light emission spectrum when excited within a light excitation spectrum, wherein the light excitation spectrum overlaps with the first light emission spectrum; and (c) detecting a second detectable signal emitted in the second light emission spectrum by the dipole acceptor moiety. Also provided are bioluminescent complexes comprising: (a) a first polypeptide conjugated to a dipole acceptor moiety, wherein the emits a first detectable signal in a first light emission spectrum.
    Type: Application
    Filed: May 18, 2020
    Publication date: November 19, 2020
    Applicant: DUKE UNIVERSITY
    Inventors: THOMAS PACK, JEFFREY SMITH, SUDARSHAN RAJAGOPAL, MARC CARON
  • Patent number: 10835219
    Abstract: A specimen retrieval system for easier tissue removal during endoscopic surgery. The devices include a specimen tube with a main tube, and a mechanism for pulling and everting the distal end of the tube into the tube, or a side channel provided within the tube. The mechanism may include a tether fixed to the distal edge of the tube, or a grasper operable to grasp the distal edge of the tube.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: November 17, 2020
    Assignee: Freehold Surgical, LLC
    Inventors: Darren R. Sherman, Jeffrey Smith
  • Publication number: 20200354351
    Abstract: Provided are compounds that enhance the efficacy of viruses by increasing spread of the virus in cells, increasing the titer of virus in cells, or increasing the antigen expression from a virus, gene or trans-gene expression from a virus, or virus protein expression in cells. Other uses, compositions and methods of using same are also provided.
    Type: Application
    Filed: May 18, 2020
    Publication date: November 12, 2020
    Applicants: Ottawa Hospital Research Institute, University of Ottawa
    Inventors: Jean-Simon Diallo, Christopher Noyce Boddy, Mark Dornan, Ramya Krishnan, Rozanne Arulanandam, Fabrice Le Boeuf, Jeffrey Smith, Andrew Macklin
  • Patent number: 10833078
    Abstract: Aspects of the disclosure provide a semiconductor apparatus that comprises a first field-effect transistor (FET) formed on a substrate and comprising a first gate, a second FET stacked on the first FET along a direction substantially perpendicular to the substrate and comprising a second gate. The semiconductor apparatus also comprises a first routing track and a second routing track electrically isolated from the first routing track. Each of the first and second routing tracks is provided on a routing plane stacked on the second FET along said direction. The semiconductor apparatus also comprises a first conductive trace configured to conductively couple the first gate of the first FET to the first routing track, and a second conductive trace configured to conductively couple the second gate of the second FET to the second routing track.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: November 10, 2020
    Assignee: Tokyo Electron Limited
    Inventors: Jeffrey Smith, Anton J. deVilliers, Kandabara N. Tapily, Subhadeep Kal, Gerrit J. Leusink
  • Patent number: 10796251
    Abstract: A system and method for mobile social networking within a target area are provided. The method provides for mobile social networking. The method includes receiving a social networking profile, and a target area. The social networking profile has at least one user preference. The method also includes broadcasting the social networking profile to one or more members of the social network within the target area. The method further includes searching within the target area for the one or more members having a preference that is the same or similar to the at least one user preference. The method additionally includes enabling contact with the one or more members having the same or similar at least one user preference.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: October 6, 2020
    Assignee: CAPITAL ONE SERVICES, LLC
    Inventors: Frederick Joel Mason, Jr., Donald Jeffrey Smith
  • Publication number: 20200303092
    Abstract: A method for reducing frequency dependent energy loss and phase errors from end to end as a function of the frequency of audio-range signals conducted therein including obtaining an electrical wire having a first end and an opposing second end and comprising of an electrically conductive metal with a conductivity between 0 and about 3.2* 106 (ohm-meter)?1 or between 0 and about 5.5% International Annealed Copper Standard (IACS), wherein the electrically conductive metal includes a relative magnetic permeability between 0 and 2, and transmitting audio-range signals from the first end to the second end, wherein the frequency dependent energy loss and phase from the first end to the second end is a function of a frequency of the audio-range signals transmitted therein.
    Type: Application
    Filed: March 22, 2020
    Publication date: September 24, 2020
    Inventor: Jeffrey Smith
  • Publication number: 20200303256
    Abstract: A semiconductor device includes: a substrate having a planar surface; a first gate-all-around field effect transistor (GAA-FET) provided on said substrate and comprising a first channel having an untrimmed volume of first channel material corresponding to a volume of the first channel material within a first stacked fin structure from which the first channel was formed; and a second GAA-FET provided on said substrate and comprising a second channel having a trimmed volume of second channel material which is less than said untrimmed volume of first channel material by a predetermined trim amount corresponding to a delay adjustment of the second GAA-FET relative to the first GAA-FET, wherein said first and second GAA FETs are electrically connected as complementary FETs.
    Type: Application
    Filed: June 10, 2020
    Publication date: September 24, 2020
    Applicant: Tokyo Electron Limited
    Inventors: Jeffrey SMITH, Subhadeep KAL, Anton DEVILLIERS
  • Patent number: 10770762
    Abstract: A battery module having first and second battery cells is provided. The battery module includes a first frame member having a first substantially rectangular ring-shaped outer plastic frame and a first heat exchanger. The first heat exchanger has first and second thermally conductive plates that are coupled together and define a first flow path portion extending therethrough. The first battery cell is disposed on and against a first side of the first thermally conductive plate. The second battery cell is disposed on and against the first side of the first thermally conductive plate. The second battery cell is further disposed proximate to the first battery cell.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: September 8, 2020
    Assignee: LG Chem, Ltd.
    Inventors: Alexander Jeffrey Smith, Robert Merriman, Anthony Arena, Heekook Yang
  • Patent number: 10770479
    Abstract: A semiconductor device includes a plurality of first sources/drains and a plurality of first source/drain (S/D) contacts formed over the first sources/drains. The device also includes a plurality of first dielectric caps. Each of the plurality of first dielectric caps is positioned over a respective first S/D contact to cover a top portion and at least a part of side portions of the respective first S/D contact. The device also includes a plurality of second sources/drains and a plurality of second S/D contacts that are staggered over the plurality of first S/D contacts so as to form a stair-case configuration. A plurality of second dielectric caps are formed over the plurality of second S/D contacts. Each of the plurality of second dielectric caps is positioned over a respective second S/D contact to cover a top portion and at least a part of side portions of the respective second S/D contact.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: September 8, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Jeffrey Smith, Anton deVilliers, Kandabara Tapily, Jodi Grzeskowiak, Kai-Hung Yu
  • Patent number: D896568
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: September 22, 2020
    Inventor: Jeffrey Smith
  • Patent number: D900291
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: October 27, 2020
    Assignee: FRESH PRODUCTS, INC.
    Inventors: Douglas S. Brown, Jeffrey A. Smith