Patents by Inventor Jen-Inn Chyi

Jen-Inn Chyi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120292663
    Abstract: The invention provides two Sb-based n- or p-channel layer structures as a template for MISFET and complementary MISFET development. Four types of MISFET devices and two types of complementary MISFET circuit devices can be developed based on the invented layer structures. Also, the layer structures can accommodate more than one complementary MISFETs and more than one single active MISFETs to be integrated on the same substrate monolithically.
    Type: Application
    Filed: May 19, 2011
    Publication date: November 22, 2012
    Applicant: National Central University
    Inventors: Heng-Kuang LIN, Han-Chieh HO, Pei-Chin CHIU, Jen-Inn CHYI
  • Publication number: 20120281949
    Abstract: A Mach-Zehnder wavelength division multiplexer (WDM) is provided. The WDM has a short length with flat passband and low crosstalk. Since passband is flattened, crosstalk is reduced and length of the WDM is shortened, the WDN can be used for optical communication and optical interconnection in a single chip.
    Type: Application
    Filed: January 6, 2012
    Publication date: November 8, 2012
    Applicant: National Central University
    Inventors: Hung-Chih Lu, Jen-Inn Chyi
  • Publication number: 20120276722
    Abstract: A method for growing a semipolar nitride comprises steps: forming a plurality of parallel discrete trenches on a silicon substrate , each discrete trenches having a first wall and a second wall, wherein a tilt angle is formed between the surface of the silicon substrate and the first wall; forming a buffer layer on the silicon substrate and the trenches, wherein the buffer layer on the first wall has a plurality of growing zones and a plurality of non-growing zones among the growing zones and complementary to the growing zones; forming a cover layer on the buffer layer and revealing the growing zones; and growing a semipolar nitride from the growing zones of the buffer layer and covering the cover layer. Thereby cracks caused by thermal stress between the silicon substrate and semipolar nitride are decreased and the quality of the semipolar nitride film is improved.
    Type: Application
    Filed: July 6, 2011
    Publication date: November 1, 2012
    Inventors: Jen-Inn CHYI, Hsueh-Hsing Liu, Hsien Yu Lin
  • Patent number: 8253167
    Abstract: An integrated circuit structure includes a substrate and a first and a second plurality of III-V semiconductor layers. The first plurality of III-V semiconductor layers includes a first bottom barrier over the substrate; a first channel layer over the first bottom barrier; and a first top barrier over the first channel layer. A first field-effect transistor (FET) includes a first channel region, which includes a portion of the first channel layer. The second plurality of III-V semiconductor layers is over the first plurality of III-V semiconductor layers and includes a second bottom barrier; a second channel layer over the second bottom barrier; and a second top barrier over the second channel layer. A second FET includes a second channel region, which includes a portion of the second channel layer.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: August 28, 2012
    Assignees: Taiwan Semiconductor Manufacturing Company, Ltd., National Central University
    Inventors: Heng-Kuang Lin, Pei-Chin Chiu, Jen-Inn Chyi, Han-Chieh Ho, Clement Hsingjen Wann, Chih-Hsin Ko, Cheng-Hsien Wu
  • Patent number: 8237174
    Abstract: The present invention discloses an LED structure, wherein an N-type current spreading layer is interposed between N-type semiconductor layers to uniformly distribute current flowing through the N-type semiconductor layer. The N-type current spreading layer includes at least three sub-layers stacked in a sequence of from a lower band gap to a higher band gap, wherein the sub-layer having the lower band gap is near the substrate, and the sub-layer having the higher band gap is near the light emitting layer. Each sub-layer of the N-type current spreading layer is expressed by a general formula InxAlyGa(1-x-y)N, wherein 0?x?1, 0?y?1, and 0?x+y?1.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: August 7, 2012
    Assignee: National Central University
    Inventors: Peng-Ren Chen, Hsueh-Hsing Liu, Jen-Inn Chyi
  • Publication number: 20120189240
    Abstract: A wavelength division multiplexing and optical modulation apparatus includes at least two modulation region-added grating-assisted cross-state directional coupler units and a modulation region-added cross-state directional coupler. The modulation region-added grating-assisted cross-state directional coupler units and the modulation region-added cross-state directional coupler unit are connected to one another in serial. Each of the modulation region-added grating-assisted cross-state directional coupler units each includes a modulation region-added cross-state directional coupler, a grating and a modulation region. The modulation region-added cross-state directional coupler unit includes an output waveguide, an input waveguide and a modulation region.
    Type: Application
    Filed: March 2, 2011
    Publication date: July 26, 2012
    Applicant: NATIONAL CENTRAL UNIVERSITY
    Inventors: Hung-Chih Lu, Jen-Inn Chyi
  • Publication number: 20120189249
    Abstract: A single-stage 1×5 grating-assisted wavelength division multiplexer is provided. A grating-assisted asymmetric Mach-Zehnder interferometer, a plurality of grating-assisted cross-state directional couplers and a plurality of novel side-band eliminators are combined to form the multiplexer. Only general gratings are required, not Bragg grating, for 5-channel wavelength division multiplexing in a single stage. A nearly ideal square-like band-pass filtering passband is obtained. The present disclosure can be used as a core device in IC-to-IC optical interconnects for multiplexing and demultiplexing of an optical transceiver. The present disclosure has a small size and good performance.
    Type: Application
    Filed: May 12, 2011
    Publication date: July 26, 2012
    Applicant: NATIONAL CENTRAL UNIVERSITY
    Inventors: Hung-Chih Lu, Jen-Inn Chyi
  • Patent number: 8101447
    Abstract: The present invention discloses a light emitting diode (LED) element and a method for fabricating the same, which can promote light extraction efficiency of LED, wherein a substrate is etched to obtain basins with inclined natural crystal planes, and an LED epitaxial structure is selectively formed inside the basin. Thereby, an LED element having several inclines is obtained. Via the inclines, the probability of total internal reflection is reduced, and the light extraction efficiency of LED is promoted.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: January 24, 2012
    Assignee: Tekcore Co., Ltd.
    Inventors: Hung-Cheng Lin, Chia-Ming Lee, Jen-Inn Chyi
  • Publication number: 20110272719
    Abstract: The present invention discloses an LED structure, wherein an N-type current spreading layer is interposed between N-type semiconductor layers to uniformly distribute current flowing through the N-type semiconductor layer. The N-type current spreading layer includes at least three sub-layers stacked in a sequence of from a lower band gap to a higher band gap, wherein the sub-layer having the lower band gap is near the substrate, and the sub-layer having the higher band gap is near the light emitting layer. Each sub-layer of the N-type current spreading layer is expressed by a general formula InxAlyGa(1-x-y)N, wherein 0?x?1, 0?y?1, and 0?x+y?1.
    Type: Application
    Filed: May 10, 2010
    Publication date: November 10, 2011
    Inventors: Peng-Ren Chen, Hsueh-Hsing Liu, Jen-Inn Chyi
  • Patent number: 8048786
    Abstract: The present invention provides a method for fabricating a single-crystalline substrate containing gallium nitride (GaN) comprising the following steps. First, form a plurality of island containing GaN on a host substrate. Next, use the plurality of islands containing GaN as a mask to etch the substrate and form an uneven host substrate. Then, perform epitaxy on the uneven host substrate to make the islands containing GaN grow in size and merge into a continuous single-crystalline film containing GaN. Finally, separate the single-crystalline film containing GaN from the uneven host substrate to obtain the single-crystalline substrate containing GaN. According to the present invention, process time can be saved and yield can be improved.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: November 1, 2011
    Assignee: National Central University
    Inventors: Jen-Inn Chyi, Guan-Ting Chen, Hsueh-Hsing Liu
  • Publication number: 20110180846
    Abstract: An integrated circuit structure includes a substrate and a first and a second plurality of III-V semiconductor layers. The first plurality of III-V semiconductor layers includes a first bottom barrier over the substrate; a first channel layer over the first bottom barrier; and a first top barrier over the first channel layer. A first field-effect transistor (FET) includes a first channel region, which includes a portion of the first channel layer. The second plurality of III-V semiconductor layers is over the first plurality of III-V semiconductor layers and includes a second bottom barrier; a second channel layer over the second bottom barrier; and a second top barrier over the second channel layer. A second FET includes a second channel region, which includes a portion of the second channel layer.
    Type: Application
    Filed: January 26, 2010
    Publication date: July 28, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Heng-Kuang Lin, Pei-Chin Chiu, Jen-Inn Chyi, Han-Chieh Ho, Clement Hsingjen Wann, Chih-Hsin Ko, Cheng-Hsien Wu
  • Publication number: 20110045658
    Abstract: A method for fabricating a semi-polar nitride semiconductor is disclosed, comprising following steps: firstly, a (001) substrate tilted at 7 degrees and having a plurality of V-like grooves is provided, and tilted surfaces of the V-like groove are a (111) surface at 61.7 degrees and a ( 1 11) surface at 47.7 degrees; next, a surface of said substrate is cleaned by using a deoxidized solution, and then a buffer layer is formed on said substrate to cover said V-like grooves; then, said buffer layer is covered with an oxide layer except for said buffer layer formed on said (111) surface at 61.7 degrees; and finally, said semi-polar nitride semiconductor is formed on said buffer layer having (111) surface at 61.7 degrees to enhance the quality of said semi-polar nitride semiconductor.
    Type: Application
    Filed: December 17, 2009
    Publication date: February 24, 2011
    Inventors: Hsueh-hsing LIU, Jen-inn Chyi, Chin-chi Wu
  • Publication number: 20100295017
    Abstract: The present invention discloses a light emitting diode (LED) element and a method for fabricating the same, which can promote light extraction efficiency of LED, wherein a substrate is etched to obtain basins with inclined natural crystal planes, and an LED epitaxial structure is selectively formed inside the basin. Thereby, an LED element having several inclines is obtained. Via the inclines, the probability of total internal reflection is reduced, and the light extraction efficiency of LED is promoted.
    Type: Application
    Filed: August 6, 2010
    Publication date: November 25, 2010
    Inventors: Hung-Cheng LIN, Chia-Ming Lee, Jen-Inn Chyi
  • Publication number: 20100273331
    Abstract: A method of fabricating a nano/micro structure comprising the following steps is provided. First, a film is provided and then a mixed material comprising a plurality of ball-shape particles and a filler among the ball-shape particles is formed on the film. Next, the ball-shape particles are removed by the etching process, the solvent extraction process or the like, such that a plurality of concaves is formed on the surface of the filler, which serves as a nano/micro structure of the film.
    Type: Application
    Filed: July 7, 2010
    Publication date: October 28, 2010
    Applicant: NATIONAL CENTRAL UNIVERSITY
    Inventors: Chia-Hua Chan, Jen-Inn Chyi, Chang-Chi Pan, Chii-Chang Chen
  • Patent number: 7799593
    Abstract: The present invention discloses a light emitting diode structure and a method for fabricating the same. In the present invention, a substrate is placed in a solution to form a chemical reaction layer. Next, the substrate is etched to form a plurality of concave zones and a plurality of convex zones with the chemical reaction layer overhead. Next, the chemical reaction layer is removed to form an irregular geometry of the concave zones and convex zones on the surface of the substrate. Then, a semiconductor light emitting structure is epitaxially formed on the surface of the substrate. Thereby, the present invention can achieve a light emitting diode structure having improved internal and external quantum efficiencies.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: September 21, 2010
    Assignee: Tekcore Co., Ltd.
    Inventors: Chia-Ming Lee, Hung-Cheng Lin, Jen-Inn Chyi
  • Publication number: 20100140653
    Abstract: The present invention discloses a light emitting diode structure and a method for fabricating the same. In the present invention, a substrate is placed in a solution to form a chemical reaction layer on carved regions; the carved region is selectively etched to form a plurality of concave zones and form a plurality of convex zones; a semiconductor layer structure is epitaxially grown on the element regions and carved regions of the substrate; the semiconductor layer structure on the element regions is fabricated into a LED element with a photolithographic process.
    Type: Application
    Filed: February 19, 2010
    Publication date: June 10, 2010
    Inventors: Hung-Cheng LIN, Chia-Ming LEE, Jen-Inn CHYI
  • Patent number: 7713769
    Abstract: The present invention discloses a light emitting diode structure and a method for fabricating the same. In the present invention, a substrate is placed in a solution to form a chemical reaction layer on carved regions; the carved region is selectively etched to form a plurality of concave zones and form a plurality of convex zones; a semiconductor layer structure is epitaxially grown on the element regions and carved regions of the substrate; the semiconductor layer structure on the element regions is fabricated into a LED element with a photolithographic process.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: May 11, 2010
    Assignee: Tekcore Co., Ltd.
    Inventors: Hung-Cheng Lin, Chia-Ming Lee, Jen-Inn Chyi
  • Patent number: 7705361
    Abstract: A heterojunction bipolar transistor (HBT) has a (In)(Al)GaAsSb/InGaAs base-collector structure. A discontinuous base-collector conduction band forms a built-in electric field to infuse electrons into a collector structure effectively, while a discontinuous base-collector valence band prevents holes from spreading into the collector structure at the same time. Thus, a current density is increased. In addition, the small offset voltage of the base-emitter and base-collector junctions reduce a power consumption.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: April 27, 2010
    Assignee: National Central University
    Inventors: Sheng-Yu Wang, Jen-Inn Chyi, Shu-Han Cheng
  • Publication number: 20100068872
    Abstract: The present invention provides a method for fabricating a single-crystalline substrate containing gallium nitride (GaN) comprising the following steps. First, form a plurality of island containing GaN on a host substrate. Next, use the plurality of islands containing GaN as a mask to etch the substrate and form an uneven host substrate. Then, perform epitaxy on the uneven host substrate to make the islands containing GaN grow in size and merge into a continuous single-crystalline film containing GaN. Finally, separate the single-crystalline film containing GaN from the uneven host substrate to obtain the single-crystalline substrate containing GaN. According to the present invention, process time can be saved and yield can be improved.
    Type: Application
    Filed: November 3, 2008
    Publication date: March 18, 2010
    Inventors: Jen-Inn Chyi, Guan-Ting Chen, Hsueh-Hsing Liu
  • Patent number: 7674642
    Abstract: Green light emitting diodes (LED) of gallium arsenide (GaAs) are series-connected. The series connection has a small transmission attenuation and a wide bandwidth. The GaAs LED has a big forward bias and so neither extra driving current nor complex resonant-cavity epitaxy layer is needed. Hence, the present invention has a high velocity, a high efficiency and a high power while an uneven current distribution is avoided.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: March 9, 2010
    Assignee: National Central University
    Inventors: Jin-Wei Shi, Jinn-Kong Sheu, Mao-Jen Wu, Chun-Kai Wang, Cheng-Hiong Chen, Jen-Inn Chyi