Patents by Inventor Jen-Chun Chen
Jen-Chun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240150656Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, a fourth repeating unit, and a fifth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), the fourth repeating unit has a structure of Formula (IV), and the fifth repeating unit has a structure of Formula (V), a structure of Formula (VI), or a structure of Formula (VII) wherein A1, A2, A3, A4, X1, Z1, R1, R2, R3 and Q are as defined in the specification.Type: ApplicationFiled: September 22, 2023Publication date: May 9, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yu-Lin CHU, Jen-Chun CHIU, Po-Hsien HO, Yu-Min HAN, Meng-Hsin CHEN, Chih-Hsiang LIN
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Publication number: 20240136401Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material and a passivation layer is disposed on the second semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material. A silicide is arranged within the passivation layer and along tops of the first doped region and the second doped region.Type: ApplicationFiled: January 5, 2024Publication date: April 25, 2024Inventors: Yin-Kai Liao, Sin-Yi Jiang, Hsiang-Lin Chen, Yi-Shin Chu, Po-Chun Liu, Kuan-Chieh Huang, Jyh-Ming Hung, Jen-Cheng Liu
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Publication number: 20240124706Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, and a fourth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), and the fourth repeating unit has a structure of Formula (IV), a structure of Formula (V) or a structure of Formula (VI) wherein A1, A2, A3, Z1, R1, R2, R3 and Q are as defined in the specification.Type: ApplicationFiled: September 22, 2023Publication date: April 18, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yu-Lin CHU, Jen-Chun CHIU, Po- Hsien HO, Yu-Min HAN, Meng-Hsin CHEN, Chih-Hsiang LIN
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Patent number: 11955154Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.Type: GrantFiled: May 16, 2022Date of Patent: April 9, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
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Patent number: 11942130Abstract: A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.Type: GrantFiled: March 23, 2022Date of Patent: March 26, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh
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Patent number: 10660176Abstract: A system for driving a light source includes a power converter and control circuitry coupled to the power converter. The power converter converts input power to an output voltage to power the light source. The control circuitry senses the output voltage and senses current of the light source. The control circuitry generates a control signal based on a voltage feedback signal indicative of a combination of said output voltage and said current of said light source, and controls the power converter by the control signal to adjust the output voltage.Type: GrantFiled: January 24, 2017Date of Patent: May 19, 2020Assignee: O2Micro Inc.Inventors: Jen-Chun Chen, Sheng-Tai Lee, Yung-Lin Lin
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Publication number: 20190254130Abstract: A system for driving a light source includes a power converter and control circuitry coupled to the power converter. The power converter converts input power to an output voltage to power the light source. The control circuitry senses the output voltage and senses current of the light source. The control circuitry generates a control signal based on a voltage feedback signal indicative of a combination of said output voltage and said current of said light source, and controls the power converter by the control signal to adjust the output voltage.Type: ApplicationFiled: January 24, 2017Publication date: August 15, 2019Inventors: Jen-Chun Chen, Sheng-Tai LEE, Yung-Lin LIN
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Patent number: 9881875Abstract: A method of manufacturing electronic module is provided. The method can perform selective partial molding by forming the tapes in a predetermined area on the circuit substrate, setting electronic components out the predetermined area on the circuit substrate, forming the molding member encapsulating the whole circuit substrate and removing the tapes along of the molding member thereon. Following, forming an EMI shielding layer on the molding member and setting optoelectronics in the predetermined area on the circuit substrate could protect the electronic components from electromagnetic disturbance and avoid the optoelectronics being encapsulated.Type: GrantFiled: July 16, 2014Date of Patent: January 30, 2018Assignee: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.Inventors: Jen-Chun Chen, Tsung Jung Cheng, Chia Cheng Liu
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Patent number: 9814166Abstract: A method of manufacturing electronic package module is provided. The method provides selective molding by attaching tapes on the circuit substrate on which electric components are mounted thereon, forming molding compound to cover the circuit substrate, and removing tapes along with the molding compound thereon.Type: GrantFiled: July 31, 2013Date of Patent: November 7, 2017Assignee: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.Inventors: Jen-Chun Chen, Tsung-Jung Cheng, Chia-Cheng Liu
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Patent number: 9674991Abstract: A manufacturing method of electronic packaged device includes the following. A plurality of electronic components is disposed on a substrate carrier. An encapsulating member is disposed on the substrate carrier and covers the electronic components. The substrate carrier is separated from the encapsulating member. A plurality of first trenches is arranged on a first surface of the encapsulating member. Conductive material is disposed onto the first surface and into the first trenches to form a conductive layer. The conductive layer is patterned on the first surface to form a circuit layer. The circuit layer includes at least one grounding pad. A plurality of second trenches is arranged on a second surface of the encapsulating member. At least one shielding structure is formed in the first trenches and the second trenches. An electromagnetic shielding layer is connected to the grounding pad.Type: GrantFiled: November 30, 2015Date of Patent: June 6, 2017Assignee: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.Inventors: Jen-Chun Chen, Pai-Sheng Shih
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Patent number: 9332646Abstract: An electronic package module includes a circuit board having a supporting surface, at least one first electronic component, at least one second electronic component, and at least one molding compound. The first and second electronic components are mounted on the supporting surface. The molding compound is disposed on the supporting surface and covers the supporting surface partially. The molding compound encapsulates the first electronic component yet not the second electronic component.Type: GrantFiled: January 19, 2013Date of Patent: May 3, 2016Assignees: Universal Scientific Industrial (Shanghai) Co., Ltd., Universal Global Scientific Industrial Co., Ltd.Inventors: Jen-Chun Chen, Hsin-Chin Chang
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Publication number: 20160081235Abstract: A manufacturing method of electronic packaged device includes the following. A plurality of electronic components is disposed on a substrate carrier. An encapsulating member is disposed on the substrate carrier and covers the electronic components. The substrate carrier is separated from the encapsulating member. A plurality of first trenches is arranged on a first surface of the encapsulating member. Conductive material is disposed onto the first surface and into the first trenches to form a conductive layer. The conductive layer is patterned on the first surface to form a circuit layer. The circuit layer includes at least one grounding pad. A plurality of second trenches is arranged on a second surface of the encapsulating member. At least one shielding structure is formed in the first trenches and the second trenches. An electromagnetic shielding layer is connected to the grounding pad.Type: ApplicationFiled: November 30, 2015Publication date: March 17, 2016Inventors: JEN-CHUN CHEN, PAI-SHENG SHIH
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Patent number: 9271436Abstract: A manufacturing method of electronic packaged device includes the following. A plurality of electronic components is disposed on a substrate carrier. An encapsulating member is disposed on the substrate carrier and covers the electronic components. The substrate carrier is separated from the encapsulating member. A plurality of first trenches is arranged on a first surface of the encapsulating member. Conductive material is disposed onto the first surface and into the first trenches to form a conductive layer. The conductive layer is patterned on the first surface to form a circuit layer. The circuit layer includes at least one grounding pad. A plurality of second trenches is arranged on a second surface of the encapsulating member. At least one shielding structure is formed in the first trenches and the second trenches. An electromagnetic shielding layer is connected to the grounding pad.Type: GrantFiled: May 23, 2014Date of Patent: February 23, 2016Assignee: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.Inventors: Jen-Chun Chen, Pai-Sheng Shih
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Patent number: 9171770Abstract: An electronic device and the manufacturing method thereof are provided. The method comprises providing a module, in which the module includes a substrate, at least one component mounted on the substrate and a molding, and the molding encapsulates the component and a portion of the substrate; forming a first hole to expose a ground pad of the component; forming a first conductive layer which covers the module and is electrically connected to the ground pad.Type: GrantFiled: January 20, 2013Date of Patent: October 27, 2015Assignees: Universal Scientific Industrial (Shanghai) Co., Ltd., Universal Global Scientific Industrial Co., Ltd.Inventor: Jen-Chun Chen
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Patent number: 9144183Abstract: A package-integrated EMI compartment shielding structure includes an encapsulating member disposed on a mounting surface of a substrate. The substrate has a ground pad exposedly arranged thereon. The encapsulating member, who defines a peripheral surface, covers the ground pad and encapsulates at least one electronic element. A compartment structure is disposed in the encapsulating member, electrically connecting the ground pad and substantially dividing the encapsulating member into at least two package compartments. The terminal portions of the compartment structure are arranged within the encapsulating member proximal to yet without compromising the peripheral surface. A notch is disposed into the encapsulating member from the peripheral surface corresponding to the location of the terminal portions of the compartment structure to expose the lateral surface thereof across the thickness of the encapsulating member.Type: GrantFiled: July 31, 2013Date of Patent: September 22, 2015Assignee: Universal Scientific Industrial (Shanghai) Co., Ltd.Inventors: Jen-Chun Chen, Xiao-Wen Cao, He- Yi Chang
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Publication number: 20150214075Abstract: A manufacturing method of selective electronic packaging device includes the following. A plurality of electronic components is disposed on a surface of a substrate. A photo-sensitive resin material is formed on the surface of the substrate. UV-light is irradiated to the photo-sensitive resin material to form an embankment structure. An encapsulating material is filled a protective area surrounded by the embankment structure. The encapsulating material covers at least one electronic component. The encapsulating material is solidified to form an encapsulating member, and the encapsulating member covers at least one electronic component.Type: ApplicationFiled: April 6, 2014Publication date: July 30, 2015Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.Inventors: JEN-CHUN CHEN, SHIH-CHIEN CHEN, PAI-SHENG CHENG
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Patent number: 9089046Abstract: An electronic module includes a circuit board, a plurality of electronic components, a plurality of molding layers, at least one first conductive layer, at least one insulating filler, and one second conductive layer. The circuit board has a first plane and at least one grounding pad on the first plane. The electronic components are mounted on the first plane and electrically connected with the circuit board. The molding layers cover the electronic components and the first plane. The trench appears between two adjacent molding layers. The grounding pad is positioned at the bottom of the trench. The first conductive layer covers the sidewall of the trench and the grounding pad. The grounding pad electrically connected with the first conductive layer. The insulating filler is positioned in the trench. The second conductive layer covers the molding layers and the insulating filler, and electrically connects with the first conductive layer.Type: GrantFiled: January 23, 2013Date of Patent: July 21, 2015Assignees: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD., UNIVERSAL GLOBAL SCIENTIFIC INDUSTRIAL CO., LTD.Inventors: Jen-Chun Chen, Pai-Sheng Shih, Hsin-Chin Chang
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Publication number: 20150173258Abstract: A manufacturing method of electronic packaged device includes the following. A plurality of electronic components is disposed on a substrate carrier. An encapsulating member is disposed on the substrate carrier and covers the electronic components. The substrate carrier is separated from the encapsulating member. A plurality of first trenches is arranged on a first surface of the encapsulating member. Conductive material is disposed onto the first surface and into the first trenches to form a conductive layer. The conductive layer is patterned on the first surface to form a circuit layer. The circuit layer includes at least one grounding pad. A plurality of second trenches is arranged on a second surface of the encapsulating member. At least one shielding structure is formed in the first trenches and the second trenches. An electromagnetic shielding layer is connected to the grounding pad.Type: ApplicationFiled: May 23, 2014Publication date: June 18, 2015Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL ( SHANGHAI ) CO., LTD.Inventors: JEN-CHUN CHEN, PAI-SHENG SHIH
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Publication number: 20150036297Abstract: A method of manufacturing electronic module is provided. The method can perform selective partial molding by forming the tapes in a predetermined area on the circuit substrate, setting electronic components out the predetermined area on the circuit substrate, forming the molding member encapsulating the whole circuit substrate and removing the tapes along of the molding member thereon. Following, forming an EMI shielding layer on the molding member and setting optoelectronics in the predetermined area on the circuit substrate could protect the electronic components from electromagnetic disturbance and avoid the optoelectronics being encapsulated.Type: ApplicationFiled: July 16, 2014Publication date: February 5, 2015Inventors: JEN-CHUN CHEN, TSUNG JUNG CHENG, CHIA CHENG LIU
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Publication number: 20150036296Abstract: A package-integrated EMI compartment shielding structure includes an encapsulating member disposed on a mounting surface of a substrate. The substrate has a ground pad exposedly arranged thereon. The encapsulating member, who defines a peripheral surface, covers the ground pad and encapsulates at least one electronic element. A compartment structure is disposed in the encapsulating member, electrically connecting the ground pad and substantially dividing the encapsulating member into at least two package compartments. The terminal portions of the compartment structure are arranged within the encapsulating member proximal to yet without compromising the peripheral surface. A notch is disposed into the encapsulating member from the peripheral surface corresponding to the location of the terminal portions of the compartment structure to expose the lateral surface thereof across the thickness of the encapsulating member.Type: ApplicationFiled: July 31, 2013Publication date: February 5, 2015Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.Inventors: JEN-CHUN CHEN, XIAO-WEN CAO, HE- YI CHANG