Abstract: An antenna comprises a first layer having a first redistribution layer, a feeding line, a ground connection element, and one or more antenna inputs. The antenna also comprises one or more intermediate layers over the first layer. The antenna further comprises a second layer having a second redistribution layer over the one or more intermediate layers. The antenna additionally comprises one or more through vias arranged to communicatively couple the second redistribution layer and the first redistribution layer. The antenna also comprises a short element. The antenna further comprises one or more radiator antennas within the one or more through vias, the one or more radiator antennas being in communication with the one or more antenna inputs by way of the feeding line.

Abstract: Semiconductor packages are provided. The semiconductor package includes a photonic integrated circuit, an electronic integrated circuit and a high performance integrated circuit. The electronic integrated circuit is disposed aside the photonic integrated circuit and electrically connected to the photonic integrated circuit through a first redistribution structure. The high performance integrated circuit is disposed aside the electronic integrated circuit and electrically connected to the electronic integrated circuit through a second redistribution structure.

Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.

Abstract: Semiconductor packages are provided. The semiconductor package includes a photonic integrated circuit, an electronic integrated circuit and a high performance integrated circuit. The electronic integrated circuit is disposed aside the photonic integrated circuit and electrically connected to the photonic integrated circuit through a first redistribution structure. The high performance integrated circuit is disposed aside the electronic integrated circuit and electrically connected to the electronic integrated circuit through a second redistribution structure.

Abstract: A semiconductor package includes an interconnect structure having a first surface and a second surface opposite to the first surface, at least one optical chip over the first surface of the interconnect structure and electrically coupled to the interconnect structure, an insulating layer contacting the second surface of the interconnect structure, and a molding compound over the first surface of the interconnect structure. The insulating layer includes a third surface facing the second surface of the interconnect structure and a fourth surface opposite to the third surface. At least an edge of the optical chip is covered by the molding compound.

Abstract: A method includes adhering a voltage regulator die over a carrier through a die-attach film, with the die-attach film being in the voltage regulator die and encircles metal pillars of the voltage regulator die, encapsulating the voltage regulator die in an encapsulating material, and planarizing the encapsulating material. A back portion of the voltage regulator die is removed to expose a through-via in a semiconductor substrate of the voltage regulator die. The method further includes forming first redistribution lines over the encapsulating material and electrically coupled to the through-via, replacing the die-attach film with a dielectric material, forming second redistribution lines on an opposite side of encapsulating material than the first redistribution lines, and bonding an additional device die to the second redistribution lines. The voltage regulator die is electrically coupled to the additional device die.

Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.

Abstract: Semiconductor packages are provided. The semiconductor package includes a package substrate, a photonic integrated circuit, a laser die, an electronic integrated circuit, and a first redistribution structure. The package substrate includes connectors. The photonic integrated circuit is disposed over the package substrate. The laser die is optically coupled to the photonic integrated circuit. The electronic integrated circuit is disposed over the package substrate. The first redistribution structure is disposed over the package substrate, wherein the electronic integrated circuit is electrically connected to the photonic integrated circuit through the first redistribution structure.

Abstract: A method includes adhering a voltage regulator die over a carrier through a die-attach film, with the die-attach film being in the voltage regulator die and encircles metal pillars of the voltage regulator die, encapsulating the voltage regulator die in an encapsulating material, and planarizing the encapsulating material. A back portion of the voltage regulator die is removed to expose a through-via in a semiconductor substrate of the voltage regulator die. The method further includes forming first redistribution lines over the encapsulating material and electrically coupled to the through-via, replacing the die-attach film with a dielectric material, forming second redistribution lines on an opposite side of encapsulating material than the first redistribution lines, and bonding an additional device die to the second redistribution lines. The voltage regulator die is electrically coupled to the additional device die.

Abstract: A method includes forming a first metal plate, forming a metal ring aligned to peripheral regions of the first metal plate, and placing a device die level with the metal ring, encapsulating the device die and the metal ring in an encapsulating material. The method further includes filling a dielectric material into a space encircled by the metal ring, and forming a second metal plate covering the dielectric material and the metal ring, with an opening formed in the second metal plate. A plurality of redistribution lines is formed, with one of the redistribution lines overlapping a portion of the opening. The first metal plate, the metal ring, the second metal plate, and the dielectric material in combination form an antenna or a waveguide. The redistribution line forms a signal-coupling line of the passive device.

Abstract: An inductor includes a plurality of first conductive lines, a plurality of second conductive lines and a plurality of contacts. Each of the first conductive lines is spaced apart from one another. Each of the second conductive lines is spaced apart from one another, and each of the second conductive lines crosses over each of the first conductive lines. Each of the contacts electrically interconnects one of the first conductive lines and one of the second conductive lines. These contacts are arranged in a way such that at least parts of the first conductive lines and at least parts of the second conductive lines form an electric current path serving as an inductor.

Abstract: A package structure includes a first redistribution layer, a molding material, a semiconductor device and an inductor. The molding material is located on the first redistribution layer. The semiconductor device is molded in the molding material. The inductor penetrates through the molding material and electrically connected to the semiconductor device.

Abstract: A method includes adhering a voltage regulator die over a carrier through a die-attach film, with the die-attach film being in the voltage regulator die and encircles metal pillars of the voltage regulator die, encapsulating the voltage regulator die in an encapsulating material, and planarizing the encapsulating material. A back portion of the voltage regulator die is removed to expose a through-via in a semiconductor substrate of the voltage regulator die. The method further includes forming first redistribution lines over the encapsulating material and electrically coupled to the through-via, replacing the die-attach film with a dielectric material, forming second redistribution lines on an opposite side of encapsulating material than the first redistribution lines, and bonding an additional device die to the second redistribution lines. The voltage regulator die is electrically coupled to the additional device die.

Abstract: A method and device are provided wherein a first semiconductor device and a via are encapsulated with an encapsulant. A redistribution layer connects the first semiconductor device to a second semiconductor device. In a particular embodiment the first semiconductor device is an integrated voltage regulator and the second semiconductor device is a logic device such as a central processing unit.

Abstract: An antenna device includes a package and at least one antenna. The package includes at least one radio frequency (RF) die and a molding compound in contact with at least one sidewall of the RF die. The antenna has at least one conductor at least partially in the molding compound and operatively connected to the RF die.

Abstract: A method includes adhering a voltage regulator die over a carrier through a die-attach film, with the die-attach film being in the voltage regulator die and encircles metal pillars of the voltage regulator die, encapsulating the voltage regulator die in an encapsulating material, and planarizing the encapsulating material. A back portion of the voltage regulator die is removed to expose a through-via in a semiconductor substrate of the voltage regulator die. The method further includes forming first redistribution lines over the encapsulating material and electrically coupled to the through-via, replacing the die-attach film with a dielectric material, forming second redistribution lines on an opposite side of encapsulating material than the first redistribution lines, and bonding an additional device die to the second redistribution lines. The voltage regulator die is electrically coupled to the additional device die.

Abstract: A method includes forming a first metal plate, forming a metal ring aligned to peripheral regions of the first metal plate, and placing a device die level with the metal ring, encapsulating the device die and the metal ring in an encapsulating material. The method further includes filling a dielectric material into a space encircled by the metal ring, and forming a second metal plate covering the dielectric material and the metal ring, with an opening formed in the second metal plate. A plurality of redistribution lines is formed, with one of the redistribution lines overlapping a portion of the opening. The first metal plate, the metal ring, the second metal plate, and the dielectric material in combination form an antenna or a waveguide. The redistribution line forms a signal-coupling line of the passive device.

Abstract: One or more techniques for forming a semiconductor arrangement and resulting structures formed thereby are provided herein. The semiconductor arrangement includes a power divider comprising a transmission line and a resistor, where the transmission line is over and connected to an active area input, a first active area output and a second active area output. The semiconductor arrangement has a smaller chip size than a semiconductor arrangement where the transmission line is not over the active area input, the first active area output and the second active area output. The smaller chip size is due to the active area input, the first active area output and the second active area output being formed closer to one another than would be possible in a semiconductor arrangement where the transmission line is formed between at least one of the active area input, the first active area output or the second active area output.

Abstract: A method includes adhering a voltage regulator die over a carrier through a die-attach film, with the die-attach film being in the voltage regulator die and encircles metal pillars of the voltage regulator die, encapsulating the voltage regulator die in an encapsulating material, and planarizing the encapsulating material. A back portion of the voltage regulator die is removed to expose a through-via in a semiconductor substrate of the voltage regulator die. The method further includes forming first redistribution lines over the encapsulating material and electrically coupled to the through-via, replacing the die-attach film with a dielectric material, forming second redistribution lines on an opposite side of encapsulating material than the first redistribution lines, and bonding an additional device die to the second redistribution lines. The voltage regulator die is electrically coupled to the additional device die.

Abstract: A method includes forming a first metal plate, forming a metal ring aligned to peripheral regions of the first metal plate, and placing a device die level with the metal ring, encapsulating the device die and the metal ring in an encapsulating material. The method further includes filling a dielectric material into a space encircled by the metal ring, and forming a second metal plate covering the dielectric material and the metal ring, with an opening formed in the second metal plate. A plurality of redistribution lines is formed, with one of the redistribution lines overlapping a portion of the opening. The first metal plate, the metal ring, the second metal plate, and the dielectric material in combination form an antenna or a waveguide. The redistribution line forms a signal-coupling line of the passive device.