Patents by Inventor Jeong-heon Park

Jeong-heon Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190123263
    Abstract: The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
    Type: Application
    Filed: August 22, 2018
    Publication date: April 25, 2019
    Inventors: Yong-Sung PARK, Woo-Jin Kim, Jeong-Heon Park, Se-Chung Oh, Joon-Myoung Lee, Hyun Cho
  • Publication number: 20190115527
    Abstract: Provided are process control methods and process control systems. The method includes performing a deposition process on a lot defined by a group of a plurality of wafers, performing a measurement process on the lot to obtain a measured value with respect to at least one wafer among the plurality of wafers, producing a target value of a factor of a process condition in the deposition process by using a difference between the measured value and a reference value, and providing an input value of the factor with respect to a subsequent lot based on the target value. The operation of providing the input value of the factor includes obtaining a previous target value of the factor previously produced with respect to at least one previous lot, and providing a weighted average of the previous target value and the target value as the input value.
    Type: Application
    Filed: August 21, 2018
    Publication date: April 18, 2019
    Inventors: Jeong-Heon Park, Yong Sung Park, Joonmyoung Lee, Hyun Cho, Se Chung Oh
  • Patent number: 10256399
    Abstract: A method for manufacturing a semiconductor device includes forming a magnetic tunnel junction (MTJ) structure comprising a magnetic fixed layer, a non-magnetic barrier layer and a magnetic free layer, and forming a metal oxide cap layer on the MTJ structure, wherein forming the metal oxide cap layer comprises depositing a metal layer on the magnetic free layer, performing an oxidation of the deposited metal layer to form an oxidized metal layer, and depositing a metal oxide layer on the oxidized metal layer.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: April 9, 2019
    Assignees: International Business Machines Corporation, Samsung Electronics Co., Ltd.
    Inventors: Guohan Hu, Kwangseok Kim, Younghyun Kim, Jung-Hyuk Lee, Jeong-Heon Park
  • Patent number: 10230043
    Abstract: Memory devices and methods of forming the same include forming a memory stack over a bottom electrode. The memory stack has a fixed magnetic layer, a tunnel barrier layer on the fixed magnetic layer, and a free magnetic layer formed on the tunnel barrier layer. A boron-segregating layer is formed directly on the free magnetic layer. The memory stack is etched into a pillar. A top electrode is formed over the pillar.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: March 12, 2019
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, SAMSUNG ELECTRONICS, CO., LTD.
    Inventors: Guohan Hu, Younghyun Kim, Chandrasekara Kothandaraman, Jeong-Heon Park
  • Publication number: 20180358068
    Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element that includes a reference layer, a tunnel barrier and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The reference layer has a fixed magnetization direction. The free layer includes a first region, a second region and a third region. The third region is formed from a third material that is configured to magnetically couple the first region and the second region. The first region is formed from a first material having a first predetermined magnetic moment, and the second region is formed from a second material having a second predetermined magnetic moment. The first predetermined magnetic moment is lower that the second predetermined magnetic moment.
    Type: Application
    Filed: November 3, 2017
    Publication date: December 13, 2018
    Inventors: Guohan Hu, Jeong-Heon Park, Daniel C. Worledge
  • Publication number: 20180358066
    Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element that includes a reference layer, a tunnel barrier and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The reference layer has a fixed magnetization direction. The free layer includes a first region, a second region and a third region. The third region is formed from a third material that is configured to magnetically couple the first region and the second region. The first region is formed from a first material having a first predetermined magnetic moment, and the second region is formed from a second material having a second predetermined magnetic moment. The first predetermined magnetic moment is lower that the second predetermined magnetic moment.
    Type: Application
    Filed: June 7, 2017
    Publication date: December 13, 2018
    Inventors: Guohan Hu, Jeong-Heon Park, Daniel C. Worledge
  • Publication number: 20180342669
    Abstract: In a method of manufacturing an MRAM device, first and second lower electrodes may be formed on first and second regions, respectively, of a substrate. First and second MTJ structures having different switching current densities from each other may be formed on the first and second lower electrodes, respectively. First and second upper electrodes may be formed on the first and second MTJ structures, respectively.
    Type: Application
    Filed: December 28, 2017
    Publication date: November 29, 2018
    Inventors: Dae-Shik KIM, Jeong-Heon PARK, Gwan-Hyeob KOH
  • Publication number: 20180277748
    Abstract: Memory devices and methods of forming the same include forming a memory stack over a bottom electrode. The memory stack has a fixed magnetic layer, a tunnel barrier layer on the fixed magnetic layer, and a free magnetic layer formed on the tunnel barrier layer. A boron-segregating layer is formed directly on the free magnetic layer. The memory stack is etched into a pillar. A top electrode is formed over the pillar.
    Type: Application
    Filed: March 21, 2017
    Publication date: September 27, 2018
    Inventors: Guohan Hu, Younghyun Kim, Chandrasekara Kothandaraman, Jeong-Heon Park
  • Patent number: 9985202
    Abstract: A method of fabricating a memory device, the method including forming a first magnetization layer; forming a tunnel barrier layer on the first magnetization layer; forming a second magnetization layer on the tunnel barrier layer; forming a magnetic tunnel junction (MTJ) structure by patterning the first magnetization layer, the tunnel barrier layer, and the second magnetization layer; and forming a boron oxide in a sidewall of the MTJ structure by implanting boron.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: May 29, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-heon Park, Se-chung Oh, Byoung-jae Bae, Jong-chul Park
  • Patent number: 9893273
    Abstract: Techniques relate to forming a semiconductor device. A magnetic pinned layer is formed adjacent to a tunnel barrier layer. A magnetic free layer is formed adjacent to the tunnel barrier layer, such that the tunnel barrier layer is sandwiched between the magnetic pinned layer and the magnetic free layer. The magnetic free layer includes a first magnetic layer, a second magnetic layer disposed on top of the first magnetic layer, and a third magnetic layer disposed on top of the second magnetic layer. The second magnetic layer of the magnetic free layer includes an additional material, and the additional material is a selection of at least one of Be, Mg, Al, Ca, B, C, Si, V, Cr, Ti, and Mn.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: February 13, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Guohan Hu, Junghyuk Lee, Jeong-Heon Park
  • Publication number: 20170338402
    Abstract: A method for manufacturing a semiconductor device includes forming a magnetic tunnel junction (MTJ) structure comprising a magnetic fixed layer, a non-magnetic barrier layer on the non-magnetic barrier layer and the magnetic free layer on the non-magnetic barrier layer, forming an oxide cap layer on the magnetic free layer, and forming a noble metal cap layer on the oxide cap layer.
    Type: Application
    Filed: May 18, 2016
    Publication date: November 23, 2017
    Inventors: Guohan Hu, Kwangseok Kim, Younghyun Kim, Jung-Hyuk Lee, Jeong-Heon Park
  • Publication number: 20170338404
    Abstract: A method for manufacturing a semiconductor device includes forming a magnetic tunnel junction (MTJ) structure comprising a magnetic fixed layer, a non-magnetic barrier layer and a magnetic free layer, and forming a metal oxide cap layer on the MTJ structure, wherein forming the metal oxide cap layer comprises depositing a metal layer on the magnetic free layer, performing an oxidation of the deposited metal layer to form an oxidized metal layer, and depositing a metal oxide layer on the oxidized metal layer.
    Type: Application
    Filed: May 18, 2016
    Publication date: November 23, 2017
    Inventors: Guohan Hu, Kwangseok Kim, Younghyun Kim, Jung-Hyuk Lee, Jeong-Heon Park
  • Patent number: 9799823
    Abstract: Techniques relate to forming a magnetic tunnel junction (MTJ). A magnetic reference layer is formed adjacent to a tunnel barrier layer. The magnetic reference layer includes a pinned layer, a spacer layer adjacent to the pinned layer, and a polarizing enhancement layer adjacent to the spacer layer. A magnetic free layer is formed adjacent to the tunnel barrier layer so as to be opposite the magnetic reference layer.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: October 24, 2017
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Guohan Hu, Kwangseok Kim, Younghyun Kim, Junghyuk Lee, Luqiao Liu, Jeong-Heon Park
  • Publication number: 20170294575
    Abstract: Techniques relate to forming a semiconductor device. A magnetic pinned layer is formed adjacent to a tunnel barrier layer. A magnetic free layer is formed adjacent to the tunnel barrier layer, such that the tunnel barrier layer is sandwiched between the magnetic pinned layer and the magnetic free layer. The magnetic free layer includes a first magnetic layer, a second magnetic layer disposed on top of the first magnetic layer, and a third magnetic layer disposed on top of the second magnetic layer. The second magnetic layer of the magnetic free layer includes an additional material, and the additional material is a selection of at least one of Be, Mg, Al, Ca, B, C, Si, V, Cr, Ti, and Mn.
    Type: Application
    Filed: April 8, 2016
    Publication date: October 12, 2017
    Inventors: Guohan Hu, Junghyuk Lee, Jeong-Heon Park
  • Publication number: 20170294570
    Abstract: Techniques relate to forming a magnetic tunnel junction (MTJ). A magnetic reference layer is formed adjacent to a tunnel barrier layer. The magnetic reference layer includes a pinned layer, a spacer layer adjacent to the pinned layer, and a polarizing enhancement layer adjacent to the spacer layer. A magnetic free layer is formed adjacent to the tunnel barrier layer so as to be opposite the magnetic reference layer.
    Type: Application
    Filed: April 8, 2016
    Publication date: October 12, 2017
    Inventors: GUOHAN HU, KWANGSEOK KIM, YOUNGHYUN KIM, JUNGHYUK LEE, LUQIAO LIU, JEONG-HEON PARK
  • Publication number: 20170294482
    Abstract: Double magnetic tunnel junctions and methods of forming the same include a bottom reference layer having a first fixed magnetization and a first thickness. A first tunnel barrier is formed on the bottom reference layer. A free layer is formed on the first tunnel barrier and has a changeable magnetization. A second tunnel barrier is formed on the free layer. A top reference layer is formed on the second tunnel barrier and has a second fixed magnetization that is opposite to the first fixed magnetization and a second thickness that is significantly smaller than the first thickness.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 12, 2017
    Inventors: Guohan Hu, Younghyun Kim, Jeong-Heon Park, Daniel Worledge
  • Publication number: 20170263861
    Abstract: A method of fabricating a memory device, the method including forming a first magnetization layer; forming a tunnel barrier layer on the first magnetization layer; forming a second magnetization layer on the tunnel barrier layer; forming a magnetic tunnel junction (MTJ) structure by patterning the first magnetization layer, the tunnel barrier layer, and the second magnetization layer; and forming a boron oxide in a sidewall of the MTJ structure by implanting boron.
    Type: Application
    Filed: December 1, 2016
    Publication date: September 14, 2017
    Inventors: Jeong-heon PARK, Se-chung OH, Byoung-jae BAE, Jong-chul PARK
  • Patent number: 9698339
    Abstract: Embodiments are directed to an electromagnetic memory device having a memory cell and an encapsulation layer formed over the memory cell. The memory cell may include a magnetic tunnel junction (MTJ), and the encapsulation layer may be formed from a layer of hydrogenated amorphous silicon. Amorphous silicon improves the coercivity of the MTJ but by itself is conductive. Adding hydrogen to amorphous silicon passivates dangling bonds of the amorphous silicon, thereby reducing the ability of the resulting hydrogenated amorphous silicon layer to provide a parasitic current path to the MTJ. The hydrogenated amorphous silicon layer may be formed using a plasma-enhanced chemical vapor deposition, which can be tuned to enable a hydrogen level of approximately 10 to approximately 20 percent. By keeping subsequent processing operations at or below about 400 Celsius, the resulting layer of hydrogenated amorphous silicon can maintain its hydrogen level of approximately 10 to 20 percent.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: July 4, 2017
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Anthony J. Annunziata, Marinus Hopstaken, Chandrasekara Kothandaraman, JungHyuk Lee, Deborah A. Neumayer, Jeong-Heon Park
  • Publication number: 20170186944
    Abstract: A method of making a MRAM device includes forming a magnetic tunnel junction on an electrode, the magnetic tunnel junction comprising a reference layer positioned in contact with the electrode, a tunnel barrier layer arranged on the reference layer, and a free layer arranged on the tunnel barrier layer; and depositing an encapsulating layer on and along sidewalls of the magnetic tunnel junction; wherein the exposing of the magnetic tunnel junction to hydrogen plasma is performed at a temperature from about 150 to about 250° C. An MRAM device including an encapsulating layer comprising either silicon nitride or aluminum oxide is also provided.
    Type: Application
    Filed: December 29, 2015
    Publication date: June 29, 2017
    Inventors: Anthony J. Annunziata, Gen P. Lauer, JungHyuk Lee, Jeong-Heon Park, Daniel C. Worledge
  • Publication number: 20170186943
    Abstract: Embodiments are directed to an electromagnetic memory device having a memory cell and an encapsulation layer formed over the memory cell. The memory cell may include a magnetic tunnel junction (MTJ), and the encapsulation layer may be formed from a layer of hydrogenated amorphous silicon. Amorphous silicon improves the coercivity of the MTJ but by itself is conductive. Adding hydrogen to amorphous silicon passivates dangling bonds of the amorphous silicon, thereby reducing the ability of the resulting hydrogenated amorphous silicon layer to provide a parasitic current path to the MTJ. The hydrogenated amorphous silicon layer may be formed using a plasma-enhanced chemical vapor deposition, which can be tuned to enable a hydrogen level of approximately 10 to approximately 20 percent. By keeping subsequent processing operations at or below about 400 Celsius, the resulting layer of hydrogenated amorphous silicon can maintain its hydrogen level of approximately 10 to 20 percent.
    Type: Application
    Filed: December 29, 2015
    Publication date: June 29, 2017
    Inventors: Anthony J. Annunziata, Marinus Hopstaken, Chandrasekara Kothandaraman, JungHyuk Lee, Deborah A. Neumayer, Jeong-Heon Park