Patents by Inventor Jeong-heon Park

Jeong-heon Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9666789
    Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: May 30, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-Heon Park, Ki-Woong Kim, Hee-Ju Shin, Joon-Myoung Lee, Woo-Jin Kim, Jae-Hoon Kim, Se-Chung Oh, Yun-Jae Lee
  • Patent number: 9515252
    Abstract: A method of making a magnetic random access memory (MRAM) device comprising forming a magnetic tunnel junction on an electrode, the magnetic tunnel junction comprising a first reference layer, a free layer, and a first tunnel barrier layer; and depositing an encapsulating silicon nitride film on and along sidewalls of the magnetic tunnel junction; wherein the silicon nitride film has a N:Si ratio from 0.1 to 1. An MRAM device made by the above method is also disclosed.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: December 6, 2016
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Anthony J. Annunziata, Chandrasekaran Kothandaraman, Gen P. Lauer, JungHyuk Lee, Nathan P. Marchack, Deborah A. Neumayer, Eugene J. O'Sullivan, Jeong-Heon Park
  • Patent number: 9356228
    Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: May 31, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong Heon Park, Woo Chang Lim, Se Chung Oh, Young Hyun Kim, Sang Hwan Park, Jang Eun Lee
  • Publication number: 20150280108
    Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
    Type: Application
    Filed: June 16, 2015
    Publication date: October 1, 2015
    Inventors: JEONG-HEON PARK, KI-WOONG KIM, HEE-JU SHIN, JOON-MYOUNG LEE, WOO-JIN KIM, JAE-HOON KIM, SE-CHUNG OH, YUN-JAE LEE
  • Patent number: 9087977
    Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: July 21, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-Heon Park, Ki-Woong Kim, Hee-Ju Shin, Joon-Myoung Lee, Woo-Jin Kim, Jae-Hoon Kim, Se-Chung Oh, Yun-Jae Lee
  • Patent number: 9065039
    Abstract: Provided is a magnetic tunneling junction device including a fixed magnetic structure; a free magnetic structure; and a tunnel barrier between the fixed magnetic structure and the free magnetic structure, at least one of the fixed magnetic structure and the free magnetic structure including a perpendicular magnetization preserving layer, a magnetic layer between the perpendicular magnetization preserving layer and the tunnel barrier, and a perpendicular magnetization inducing layer between the perpendicular magnetization preserving layer and the magnetic layer.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: June 23, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong Heon Park, Woo Chang Lim, Se Chung Oh, Woo Jin Kim, Sang Hwan Park, Jang Eun Lee
  • Publication number: 20150155477
    Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.
    Type: Application
    Filed: February 10, 2015
    Publication date: June 4, 2015
    Inventors: Jeong Heon PARK, Woo Chang LIM, Se Chung OH, Young Hyun KIM, Sang Hwan PARK, Jang Eun LEE
  • Publication number: 20150102440
    Abstract: Provided is a magnetic tunneling junction device including a fixed magnetic structure; a free magnetic structure; and a tunnel barrier between the fixed magnetic structure and the free magnetic structure, at least one of the fixed magnetic structure and the free magnetic structure including a perpendicular magnetization preserving layer, a magnetic layer between the perpendicular magnetization preserving layer and the tunnel barrier, and a perpendicular magnetization inducing layer between the perpendicular magnetization preserving layer and the magnetic layer.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 16, 2015
    Inventors: Jeong Heon PARK, Woo Chang LIM, Se Chung OH, Woo Jin KIM, Sang Hwan PARK, Jang Eun LEE
  • Patent number: 8987798
    Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong Heon Park, Woo Chang Lim, Se Chung Oh, Young Hyun Kim, Sang Hwan Park, Jang Eun Lee
  • Publication number: 20150048464
    Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
    Type: Application
    Filed: April 16, 2014
    Publication date: February 19, 2015
    Inventors: JEONG-HEON PARK, KI-WOONG KIM, HEE-JU SHIN, JOON-MYOUNG LEE, WOO-JIN KIM, JAE-HOON KIM, SE-CHUNG OH, YUN-JAE LEE
  • Patent number: 8947914
    Abstract: Provided is a magnetic tunneling junction device including a fixed magnetic structure; a free magnetic structure; and a tunnel barrier between the fixed magnetic structure and the free magnetic structure, at least one of the fixed magnetic structure and the free magnetic structure including a perpendicular magnetization preserving layer, a magnetic layer between the perpendicular magnetization preserving layer and the tunnel barrier, and a perpendicular magnetization inducing layer between the perpendicular magnetization preserving layer and the magnetic layer.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: February 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong Heon Park, Woo Chang Lim, Sechung Oh, Woojin Kim, Sang Hwan Park, Jang Eun Lee
  • Publication number: 20140297968
    Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.
    Type: Application
    Filed: June 17, 2014
    Publication date: October 2, 2014
    Inventors: Jeong Heon PARK, Woo Chang LIM, Se Chung OH, Young Hyun KIM, Sang Hwan PARK, Jang Eun LEE
  • Patent number: 8772887
    Abstract: A magnetic tunnel junction element is provided. The magnetic tunnel junction element has first magnetic layer and second magnetic layer formed adjacent, e.g., on lower and upper portions of an insulating layer, respectively and each having a perpendicular magnetic anisotropy, a magnetic field adjustment layer formed on the second magnetic layer and having a perpendicular magnetic anisotropy, and a bather layer formed between the magnetic field adjustment layer and the second magnetic layer. The second magnetic layer and the magnetic field adjustment layer are magnetically decoupled from each other.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: July 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Chang Lim, Jang-Eun Lee, Se-Chung Oh, Woo-Jin Kim, Young-Hyun Kim, Jeong-Heon Park
  • Patent number: 8772846
    Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: July 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong Heon Park, Woo Chang Lim, Sechung Oh, Young Hyun Kim, Sang Hwan Park, Jang Eun Lee
  • Publication number: 20130042081
    Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.
    Type: Application
    Filed: February 16, 2012
    Publication date: February 14, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong Heon Park, Woo Chang Lim, Se Chung Oh, Young Hyun Kim, Sang Hwan Park, Jang Eun Lee
  • Publication number: 20120292724
    Abstract: A magnetic tunnel junction element is provided. The magnetic tunnel junction element has first magnetic layer and second magnetic layer formed adjacent, e.g., on lower and upper portions of an insulating layer, respectively and each having a perpendicular magnetic anisotropy, a magnetic field adjustment layer formed on the second magnetic layer and having a perpendicular magnetic anisotropy, and a bather layer formed between the magnetic field adjustment layer and the second magnetic layer. The second magnetic layer and the magnetic field adjustment layer are magnetically decoupled from each other.
    Type: Application
    Filed: May 18, 2012
    Publication date: November 22, 2012
    Inventors: Woo-Chang LIM, Jang-Eun LEE, Se-Chung OH, Woo-Jin KIM, Young-Hyun KIM, Jeong-Heon PARK
  • Publication number: 20120236631
    Abstract: Provided is a magnetic tunneling junction device including a fixed magnetic structure; a free magnetic structure; and a tunnel barrier between the fixed magnetic structure and the free magnetic structure, at least one of the fixed magnetic structure and the free magnetic structure including a perpendicular magnetization preserving layer, a magnetic layer between the perpendicular magnetization preserving layer and the tunnel barrier, and a perpendicular magnetization inducing layer between the perpendicular magnetization preserving layer and the magnetic layer.
    Type: Application
    Filed: February 16, 2012
    Publication date: September 20, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong Heon Park, Woo Chang Lim, Se Chung Oh, Woo Jin Kim, Sang Hwan Park, Jang Eun Lee
  • Publication number: 20090068839
    Abstract: A slurry, chemical mechanical polishing (CMP) method using the slurry, and method of forming metal wiring using the slurry. The slurry may include a polishing agent, an oxidant, and at least one defect inhibitor to protect the metal film. The CMP method and method of forming metal wiring may employ one or two slurries with at least one of the slurries including at least one defect inhibitor.
    Type: Application
    Filed: June 19, 2008
    Publication date: March 12, 2009
    Inventors: Sung-Jun Kim, Jeong-Heon Park, Chang-Ki Hong, Jae-Dong Lee
  • Patent number: 7442646
    Abstract: A slurry, chemical mechanical polishing (CMP) method using the slurry, and method of forming metal wiring using the slurry. The slurry may include a polishing agent, an oxidant, and at least one defect inhibitor to protect the metal film. The CMP method and method of forming metal wiring may employ one or two slurries with at least one of the slurries including at least one defect inhibitor.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: October 28, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Jun Kim, Jeong-Heon Park, Chang-Ki Hong, Jae-Dong Lee
  • Patent number: 7294516
    Abstract: A test pattern and a method of controlling a CMP using the same are provided. The test pattern is disposed on a monitoring region of a semiconductor substrate having a main region and a monitoring region. The test pattern includes a planar region and a pattern region. The method comprises setting a correlation between a step difference of a test pattern and an etched thickness of a main pattern, then applying the CMP to a semiconductor substrate having the test pattern and the main pattern for a predetermined time. The step difference of the test pattern is measured and the etched thickness of the main pattern, which corresponds to the step difference of the test pattern, is determined from the correlation. A polishing time is corrected by comparing the determined etched thickness of the main pattern with a reference value, and the corrected polishing time is applied to a subsequent lot or subsequent substrate.
    Type: Grant
    Filed: February 10, 2005
    Date of Patent: November 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Heon Park, Bo-Un Yoon, Jae-Dong Lee