Patents by Inventor Jeong Jun Woo

Jeong Jun Woo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113852
    Abstract: A wireless communication system, according to one embodiment of the present invention, comprises: a first communication module; and at least one second communication module wirelessly connected to the first communication module, wherein the first communication module is wirelessly connected to the second communication module to which driving power is applied from the same power source as that of the first communication module.
    Type: Application
    Filed: February 10, 2022
    Publication date: April 4, 2024
    Inventors: Chang Hoon YOO, Sung Jun BAE, Jeong Hyeon SON, Seung Taek WOO, So Yeon HAM
  • Patent number: 10734244
    Abstract: Provided is a substrate processing method capable of preventing over-etching of a part of a stair-case structure due to an etching solution, when a barrier layer is selectively formed on a VNAND device having the stair-case structure. The substrate processing method includes: alternately stacking a first insulating layer and a second insulating layer; forming a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface to the lower surface by etching the first insulating layer and the second insulating layer that are stacked; densifying the stepped structure; forming a barrier layer on the densified second insulating layer; and performing isotropic etching on at least a part of a sacrificial word line structure including the second insulating layer and the barrier layer. During etching the barrier layer at the isotropic etching step, the second insulating layer is not etched or etched a little to an ignorable degree.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: August 4, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Young Hoon Kim, Jong Wan Choi, Jeong Jun Woo, Tae Hee Yoo
  • Publication number: 20190148398
    Abstract: Provided is a substrate processing method capable of preventing over-etching of a part of a stair-case structure due to an etching solution, when a barrier layer is selectively formed on a VNAND device having the stair-case structure. The substrate processing method includes: alternately stacking a first insulating layer and a second insulating layer; forming a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface to the lower surface by etching the first insulating layer and the second insulating layer that are stacked; densifying the stepped structure; forming a barrier layer on the densified second insulating layer; and performing isotropic etching on at least a part of a sacrificial word line structure including the second insulating layer and the barrier layer. During etching the barrier layer at the isotropic etching step, the second insulating layer is not etched or etched a little to an ignorable degree.
    Type: Application
    Filed: July 19, 2018
    Publication date: May 16, 2019
    Inventors: Young Hoon Kim, Jong Wan Choi, Jeong Jun Woo, Tae Hee Yoo
  • Patent number: D724553
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: March 17, 2015
    Assignee: ASM IP Holding B.V.
    Inventors: Seung Woo Choi, Hyung Wook Noh, Jeong Jun Woo, Dae Youn Kim, Hyun Soo Jang
  • Patent number: D880437
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: April 7, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Hak Joo Lee, Jeong Jun Woo, Jong Hyun Ahn, Yoon Ki Min
  • Patent number: D913980
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: March 23, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Hak Joo Lee, Jeong Jun Woo, Jong Hyun Ahn, Yoon Ki Min