Patents by Inventor Jeong Nam

Jeong Nam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150143435
    Abstract: A system and method for managing a mashup service based on the content of media content are provided. The system and method infer tasks related to the content of media content that a user is currently viewing based on user profile information, and create and provide a personalized mashup service to execute a selected task, thereby overcoming restrictions and limitations in providing information in the existing content reproducing environment and improving user's viewing environment for media content.
    Type: Application
    Filed: October 27, 2014
    Publication date: May 21, 2015
    Inventors: HYUNG WOO KIM, JOON MYUN CHO, MYUNG EUN KIM, MOO HUN LEE, JEONG NAM YEOM, JEONG JU YOO, JIN WOO HONG
  • Publication number: 20150117061
    Abstract: A power supply apparatus may include: a power supplying unit switching input power and supplying driving power; and a controlling unit controlling supplying of power by the power supplying unit by fixing a power switching phase and duty to a preset value and varying a switching frequency thereof in a case in which a load state of the power supplying unit is equal to a preset load state or above, and by varying the power switching phase and the switching frequency of the power supplying unit in a case in which the load state of the power supplying unit is a preset load state or less.
    Type: Application
    Filed: June 19, 2014
    Publication date: April 30, 2015
    Inventors: Chong Eun KIM, Jeong Nam LEE
  • Publication number: 20150092463
    Abstract: Embodiments of the invention provide a power supply apparatus, including an AC/DC rectifying unit converting an AC voltage into a DC voltage, a power factor correction unit correcting a power factor of the DC voltage, and a DC/DC conversion unit converting the DC voltage having the corrected power factor into a DC voltage having a different magnitude therefrom. According to various embodiments, the power supply apparatus further includes an auxiliary winding connected to a primary side winding of a transformer of the DC/DC conversion unit and generating the DC voltage having a predetermined magnitude, and an internal power generation unit connected to an output terminal of the power factor correction unit and the auxiliary winding and using a voltage of the output terminal of the power factor correction unit and a voltage generated by the auxiliary winding to generate temporary Vcc power and supply the generated temporary Vcc power as internal power of the power factor correction unit.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 2, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jeong Nam LEE, Yeon Ho JEONG
  • Patent number: 8984471
    Abstract: An electronic apparatus may include a circuit board, a processor disposed on an upper surface of the circuit board, and a memory disposed on a lower surface of the circuit board, such that the lower surface of the circuit board where the processor is arranged overlaps an area corresponding to where the memory is disposed.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: March 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-yeol Jung, Sang-ho Lee, Jeong-nam Cheon, Seung-hun Park
  • Publication number: 20150062736
    Abstract: Implementations disclosed herein provide for sequential readback of program data in from a cached data region of a storage device. In particular, the disclosed technology provides for storing a sequence of logical addresses associated with execution of a program, the sequence of logical addresses including at least two consecutive logical addresses associated with non-consecutive data blocks in a user data region; writing data corresponding to the at least two consecutive logical addresses to sequential data blocks in a cached data region; determining that a sequence of read commands from a host computer is associated with the data; and reading the data from the cached data region.
    Type: Application
    Filed: August 30, 2013
    Publication date: March 5, 2015
    Applicant: Seagate Technology LLC
    Inventors: Jun Cheol Kim, Hye Jeong Nam, Jae Ik Song
  • Publication number: 20150050793
    Abstract: A method for forming a trench includes etching an oxide layer to form a trench therein, conformally forming a first reaction layer along a surface of the trench, the first reaction layer including a first region on an upper portion of the trench and a second region on a lower portion of the trench, forming a barrier layer by reacting a first amount of etching gas with the first region of the first reaction layer, and etching the oxide layer on a lower portion of the second region by reacting a second amount of etching gas with the second region of the first reaction layer, the second amount of etching gas being greater than the first amount of etching gas.
    Type: Application
    Filed: May 23, 2014
    Publication date: February 19, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Jine PARK, Bo-Un YOON, Young-Sang YOUN, Jeong-Nam HAN, Kee-Sang KWON, Doo-Sung YUN, Byung-Kwon CHO, Ji-Hoon CHA
  • Patent number: 8951383
    Abstract: Provided are an apparatus and method for treating wafers using a supercritical fluid. The wafer treatment apparatus includes a plurality of chambers; a first supply supplying a first fluid in a supercritical state; a second supply supplying a mixture of the first fluid and a second fluid; a plurality of first and second valves; and a controller selecting a first chamber of the plurality of chambers for wafer treatment to control the open/closed state of each of the plurality of first valves so that the first fluid can be supplied only to the first chamber of the plurality of chambers and selecting a second chamber of the plurality of chambers to control the open/closed state of each of the plurality of second valves so that the mixture of the first fluid and a second fluid can be supplied only to the second chamber of the plurality of chambers.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: February 10, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-san Lee, Chang-ki Hong, Kun-tack Lee, Jeong-nam Han
  • Publication number: 20140368179
    Abstract: A power supply device may include: a standby power unit converting a direct current (DC) voltage to an operating voltage and a first standby voltage and providing the first standby voltage to a standby output terminal; a DC/DC converting unit receiving the operating voltage from the standby power unit, converting the DC voltage to a main voltage, and providing the main voltage to a main output terminal; and a main/standby power unit converting the main voltage from the DC/DC converting unit to a second standby voltage and providing the second standby voltage to the standby output terminal. The standby power unit varies a magnitude of the first standby voltage based on whether or not the second standby voltage is supplied to the standby output terminal.
    Type: Application
    Filed: June 11, 2014
    Publication date: December 18, 2014
    Inventors: Jeong Nam LEE, Chong Eun Kim
  • Publication number: 20140333173
    Abstract: Disclosed is a motor including: a rotor housing; a stator assembly located inside the rotor housing; a first core located inside the stator assembly; a second core located at the center of the rotor housing; and a coil housing located inside the rotor housing and having a space portion formed at the inside thereof.
    Type: Application
    Filed: November 2, 2012
    Publication date: November 13, 2014
    Inventors: Jeong Cheol Jang, Jeong Nam Seo, Kyung Hwan Kim
  • Publication number: 20140322881
    Abstract: Provided are a semiconductor device, which can facilitate a salicide process and can prevent a gate from being damaged due to misalign, and a method of manufacturing of the semiconductor device. The method includes forming a first insulation layer pattern on a substrate having a gate pattern and a source/drain region formed at both sides of the gate pattern, the first insulation layer pattern having an exposed portion of the source/drain region, forming a silicide layer on the exposed source/drain region, forming a second insulation layer on the entire surface of the substrate to cover the first insulation layer pattern and the silicide layer, and forming a contact hole in the second insulation layer to expose the silicide layer.
    Type: Application
    Filed: July 9, 2014
    Publication date: October 30, 2014
    Inventors: Sang-Jine Park, Bo-Un Yoon, Jeong-Nam Han, Myung-Geun Song
  • Publication number: 20140231010
    Abstract: A chemical supplier includes a chemical reservoir containing a chemical mixture at a room temperature, an inner space of the chemical reservoir being separated from surroundings, a supply line through which the chemical mixture is supplied to a process chamber from the chemical reservoir, an inline heater positioned on the supply line and heating the chemical mixture in the supply line to a process temperature, and a power source driving the chemical mixture to move the chemical mixture toward the process chamber.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 21, 2014
    Inventors: Sang-Jine PARK, Bo-Un YOON, Jeong-Nam HAN, Kee-Sang KWON, Doo-Sung YUN, Won-Sang CHOI
  • Publication number: 20140227857
    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of fins by forming a plurality of first device isolating trenches repeated at a first pitch in a substrate, forming a plurality of fin-type active areas protruding from a top surface of a first device isolating layer by forming the first device isolating layer in the plurality of first device isolating trenches, forming a plurality of second device isolating trenches at a pitch different from the first pitch by etching a portion of the substrate and the first device isolating layer, and forming a second device isolating layer in the plurality of second device isolating trenches, so as to form a plurality of fin-type active area groups separated from each other with the second device isolating layer therebetween.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 14, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: YOUNG-SANG YOUN, MYUNG-GEUN SONG, JI-HOON CHA, JAE-JIK BAEK, BO-UN YOON, JEONG-NAM HAN
  • Patent number: 8803248
    Abstract: Provided are a semiconductor device, which can facilitate a salicide process and can prevent a gate from being damaged due to misalign, and a method of manufacturing of the semiconductor device. The method includes forming a first insulation layer pattern on a substrate having a gate pattern and a source/drain region formed at both sides of the gate pattern, the first insulation layer pattern having an exposed portion of the source/drain region, forming a silicide layer on the exposed source/drain region, forming a second insulation layer on the entire surface of the substrate to cover the first insulation layer pattern and the silicide layer, and forming a contact hole in the second insulation layer to expose the silicide layer.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: August 12, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jine Park, Bo-Un Yoon, Jeong-Nam Han, Myung-Geun Song
  • Publication number: 20140222360
    Abstract: A method of extracting an Integrated Circuit (IC) current is provided. The method includes generating a transfer function value by using a voltage measured in a node nearest an input terminal of the IC, substituting the generated transfer function value for a reverse fast Fourier transform function, so as to extract the IC voltage, and extracting the IC current from the extracted IC voltage through a simulation in a time domain.
    Type: Application
    Filed: February 6, 2014
    Publication date: August 7, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Ho LIM, Sang-Ho LEE, Chea-Ok KO, Jong-Wan SHIM, Jeong-Nam CHEON
  • Patent number: 8796107
    Abstract: Provided are methods for fabricating a semiconductor device. The methods include forming a hard mask pattern on a semiconductor substrate, forming a first trench having a first width and a second trench having a second width on the semiconductor substrate using the hard mask pattern as a mask, forming an oxide film on the hard mask pattern and the first and second trenches, forming first and second isolation films on the first and second trenches by planarizing the oxide film until the hard mask pattern is exposed, and etching the first isolation film by a first thickness by performing dry cleaning on the semiconductor substrate and etching the second isolation film by a second thickness different from the first thickness.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: August 5, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kevin Ahn, Bo-Un Yoon, Jeong-Nam Han
  • Patent number: 8790470
    Abstract: Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: July 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-san Lee, Chang-Ki Hong, Kun-Tack Lee, Woo-Gwan Shim, Jeong-Nam Han, Jung-Min Oh, Kwon-Taek Lim, Ha-Soo Hwang, Haldorai Yuvaraj, Jae-Mok Jung
  • Publication number: 20140206169
    Abstract: A method of forming a semiconductor device can include providing a plasma nitrided exposed top surface including an active region and an isolation region. The exposed top surface including the active region and the isolation region can be subjected to etching to form a deeper recess in the active region that in the isolation region and an unmerged epitaxial stress film can be grown in the deeper recess.
    Type: Application
    Filed: March 15, 2013
    Publication date: July 24, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ji Hoon Cha, Jae-Jik Baek, Bo-Un Yoon, Young-Sang Youn, Jeong-Nam Han
  • Publication number: 20140184178
    Abstract: There are provided an apparatus for and a method of controlling a power supply system. The apparatus for controlling a power supply system includes an offset correction circuit equally dividing an input voltage into n (n is a natural number larger than 2) and outputting n divided voltages, and a control unit using an analog-to-digital converter (ADC) to detect the n divided voltages output from the offset correction circuit, and determining a difference in levels between a value of the detected n divided voltages and a value calculated by dividing the input voltage by n, as an offset correction value.
    Type: Application
    Filed: July 12, 2013
    Publication date: July 3, 2014
    Inventors: Chong Eun KIM, Jeong Nam LEE
  • Publication number: 20140177301
    Abstract: There are provided a power module in which a bias voltage is varied and supplied to a control circuit controlling power conversion when an idle mode is switched to a normal mode, and a distributed power supply apparatus having the same. The power module includes: a power factor correction stage; a DC/DC conversion stage switching power to convert the power into pre-set DC power in a powering mode in which normal power is output; a standby stage converting the power into pre-set standby power in a cold standby mode in which the DC/DC conversion stage outputs power having a level lower than that of normal power; and a variable bias supply unit varying a voltage level of bias power for controlling DC/DC power conversion and supplying the same to the DC/DC conversion stage in the cold standby mode and the powering mode.
    Type: Application
    Filed: March 15, 2013
    Publication date: June 26, 2014
    Inventors: Chong Eun KIM, Jeong Nam LEE, Duk You KIM, Gun Woo MOON, Don Sik KIM
  • Publication number: 20140177282
    Abstract: There is provided a phase shift full bridge (PSFB) type power supply device controlling a switching on time of lagging leg switches according to a load state. The power supply device includes a power supply unit supplying preset DC power by switching input power using a full bridge by a phase shift method; and a control unit controlling a switching time of a switch of the full bridge according to a load state in which the DC power is received from the power supply unit.
    Type: Application
    Filed: June 11, 2013
    Publication date: June 26, 2014
    Applicants: Korea Advanced Institute of Science and Technology, Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chong Eun KIM, Jeong Nam LEE, Duk You KIM, Gun Woo MOON, Don Sik KIM