Abstract: A compact amplifier output bias circuit is used as a broadband harmonic termination. The bias circuit is adapted as a harmonic termination circuit to produce an effective low impedance or act as a load at the signal harmonic frequencies while having the capability of supplying DC power to the amplifier stage, optionally, if needed. A pi network is coupled to an active device output and provides a low impedance at frequency bands above a frequency band of operation while allowing DC bias to be appliable to the active device output.

Abstract: A flash analog-to-digital converter (ADC). Each comparator of the flash ADC has an OFF-ON-OFF transfer function. For each analog value to be converted, only one comparator is in the ON condition, and the other comparators are in the OFF condition. In this way, the average power consumption of the flash ADC is much less than the average power consumption of prior similar devices.

Abstract: A system for detecting chemical/biological substances and a detection method. The system comprises a plurality of sensing units or nodes and a radiofrequency link. Each unit has several sensors with different sensing curves. Each sensor is able to transmit information related to the sensed substance on a specific frequency. The sensors preferably comprise AlGaN/GaN high electron mobility transistors.

Abstract: In a method of forming a semiconductor device with a first channel layer formed over a portion of a second channel layer, a portion of the second channel underlying the first channel is etched so as to form an overhanging ledge in the first channel, and then a metallic contact disposed on top of the ledge portion is diffused into the first channel by ohmic alloying to form an electrode in the first channel.

Abstract: In a method of forming a semiconductor device with a first channel layer formed over a portion of a second channel layer, a portion of the second channel underlying the first channel is etched so as to form an overhanging ledge in the first channel, and then a metallic contact disposed on top of the ledge portion is diffused into the first channel by ohmic alloying to form an electrode in the first channel.

Abstract: A method for fabricating a non-planar heterostructure field effect transistor using group III-nitride materials with consistent repeatable results is disclosed. The method provides a substrate on which at least one layer of semiconductor material is deposited. An AlN layer is deposited on the at least one layer of semiconductor material. A portion of the AlN layer is removed using a solvent to create a non-planar region with consistent and repeatable results. The at least one layer beneath the AlN layer is insoluble in the solvent and therefore acts as an etch stop, preventing any damage to the at least one layer beneath the AlN layer. Furthermore, should the AlN layer incur any surface damage as a result of the reactive ion etching, the damage will be removed when exposed to the solvent to create the non-planar region.

Abstract: A method for fabricating a non-planar heterostructure field effect transistor using group III-nitride materials with consistent repeatable results is disclosed. The method provides a substrate on which at least one layer of semiconductor material is deposited. An AlN layer is deposited on the at least one layer of semiconductor material. A portion of the AlN layer is removed using a solvent to create a non-planar region with consistent and repeatable results. The at least one layer beneath the AlN layer is insoluble in the solvent and therefore acts as an etch stop, preventing any damage to the at least one layer beneath the AlN layer. Furthermore, should the AlN layer incur any surface damage as a result of the reactive ion etching, the damage will be removed when exposed to the solvent to create the non-planar region.

Abstract: The present invention utilizes the strong piezoelectric effect, found in group-III nitride materials to circumvent the need to selectively remove Gallium Nitride (GaN) in the fabrication of GaN/AlGaN Heterostructure Field Effect Transistors. The transistor is comprised of a semi-insulating substrate 300, a buffer layer 302 which is in continual contact with the semi-insulating substrate 300. A GaN active channel 304 is atop the buffer layer 302. An AlGaN barrier 306 in laid on top of, and is in continual contact with, the GaN active channel 304. Thereafter, there is a source contact 308 and a drain contact 310 both in physical contact with the GaN active channel 308. There is a gate 312 upon the AlGaN barrier 306 and between the source contact 308 and a drain contact 310. At least one dielectric stressor 314 is placed upon the AlGaN barrier 306. The dielectric stressors 314 are between the gate 312 and the source 308 and drain 310 contacts.