Patents by Inventor Jeong Tae Kim

Jeong Tae Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7977793
    Abstract: A metal line in a semiconductor device includes an insulation layer formed on a semiconductor substrate. A metal line forming region is formed in the insulation layer. A metal line is formed to fill the metal line forming region of the insulation layer. And a diffusion barrier that includes an amorphous TaBN layer is formed between the metal line and the insulation layer. The amorphous TaBN layer prevents a copper component from diffusing into the semiconductor substrate, thereby improving upon the characteristics and the reliability of a device.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: July 12, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Dong Ha Jung, Seung Jin Yeom, Baek Mann Kim, Young Jin Lee, Jeong Tae Kim
  • Patent number: 7902065
    Abstract: A multi-layered metal line of a semiconductor device and a process of forming the same are described. The multi-layered metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is subsequently formed on the semiconductor substrate including the lower metal line and has an upper metal line forming region that exposes a portion of the lower metal line. A diffusion barrier formed on a surface of the upper metal line forming region of the insulation layer. The diffusion barrier includes a W—B—N ternary layer. An upper metal line is finally formed on the diffusion barrier to fill the upper metal line forming region of the insulation layer.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: March 8, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Baek Mann Kim, Seung Jin Yeom, Young Jin Lee, Dong Ha Jung, Jeong Tae Kim
  • Publication number: 20110053370
    Abstract: A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and includes a WNx layer, a W-N-B ternary layer, and a Ti-N-B ternary layer. A wetting layer is formed on the diffusion barrier and is made of one of a Ti layer or a TiN layer. An upper metal line is formed on the wetting layer to fill the metal line forming region of the insulation layer.
    Type: Application
    Filed: November 5, 2010
    Publication date: March 3, 2011
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Baek Mann KIM, Seung Jin YEOM, Dong Ha JUNG, Jeong Tae KIM
  • Patent number: 7875979
    Abstract: A metal line of a semiconductor device having a diffusion barrier including CrxBy and a method for forming the same is described. The metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer is formed having a metal line forming region. A diffusion barrier including a CrxBy layer is subsequently formed on the surface of the metal line forming region and the insulation layer. A metal line is finally formed to fill the metal line forming region of the insulation layer on the diffusion barrier including a CrxBy layer.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: January 25, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Dong Ha Jung, Seung Jin Yeom, Baek Mann Kim, Young Jin Lee, Jeong Tae Kim
  • Patent number: 7872351
    Abstract: A multi-layered metal line of a semiconductor device includes a semiconductor substrate; a lower metal line formed on the semiconductor substrate and recessed on a surface thereof; an insulation layer formed on the semiconductor substrate including the lower metal line and having a damascene pattern for exposing a recessed portion of the lower metal line and for delimiting an upper metal line forming region; a glue layer formed on a surface of the recessed portion of the lower metal line; a first diffusion barrier formed on the glue layer to fill the recessed portion of the lower metal line; a second diffusion barrier formed on the glue layer and the first diffusion barrier; a third diffusion barrier formed on the second diffusion barrier and a surface of the damascene pattern; and an upper metal line formed on the third diffusion barrier to fill the damascene pattern.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: January 18, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jeong Tae Kim, Baek Mann Kim, Soo Hyun Kim, Young Jin Lee, Dong Ha Jung
  • Patent number: 7855456
    Abstract: A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and includes a WNx layer, a W—N—B ternary layer, and a Ti—N—B ternary layer. A wetting layer is formed on the diffusion barrier and is made of one of a Ti layer or a TiN layer. An upper metal line is formed on the wetting layer to fill the metal line forming region of the insulation layer.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: December 21, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Baek Mann Kim, Seung Jin Yeom, Dong Ha Jung, Jeong Tae Kim
  • Publication number: 20100277405
    Abstract: In a container for a display device, a method of manufacturing the same, and a display device including the container, the container includes an inner layer including carbon of about 0.001 wt % to about 0.1 wt %, silicon of about 0.002 wt % to about 0.05 wt %, manganese of about 0.3 wt % to about 2 wt %, impurities of about 0.08 wt % to about 0.29 wt % based on a total weight of the inner layer and a remainder of iron, a plating layer formed on the inner layer and including electric zinc, and a polymer chrome-free layer formed on the plating layer. Thus, a weight and a thickness of the container may be reduced so that the container may have a light weight and a thin thickness.
    Type: Application
    Filed: April 30, 2010
    Publication date: November 4, 2010
    Inventors: Sang-Joon Park, Tae-Seok Kim, Il Kwon, Soon-Woo Lee, Yong-Soo Jeong, Woo-Yul Chang, Yeong-Khy Ok, Jeong-Tae Kim
  • Patent number: 7820546
    Abstract: A method for manufacturing a semiconductor device includes forming an insulation layer having a contact hole on a semiconductor substrate. A metal silicide layer is deposited on a surface of the contact hole and the insulation layer to have a concentration gradient that changes from a silicon-rich composition to a metal-rich composition, with the lower portion of the metal silicide layer having the silicon-rich composition and the upper portion of the metal silicide layer having the metal-rich composition. The metal silicide layer is then annealed so that the compositions of metal and silicon in the metal silicide layer become uniform.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: October 26, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Dong Ha Jung, Seung Jin Yeom, Baek Mann Kim, Chang Soo Park, Jeong Tae Kim, Nam Yeal Lee
  • Patent number: 7777336
    Abstract: A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate and a metal line forming region is formed in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer, and the diffusion layer has a multi-layered structure of an Ru layer, an RuxOy layer, an IrxOy layer, and a Ti layer. A metal layer is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: August 17, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jeong Tae Kim, Seung Jin Yeom, Baek Mann Kim, Dong Ha Jung, Joon Seok Oh, Nam Yeal Lee, Jae Hong Kim
  • Publication number: 20100193956
    Abstract: A multi-layer metal wiring of a semiconductor device and a method for forming the same are disclosed. The multi-layer metal wiring of the semiconductor device includes a lower Cu wiring, and an upper Al wiring formed to be contacted with the lower Cu wiring, and a diffusion barrier layer interposed between the lower Cu wiring and the upper Al wiring. The diffusion barrier layer is formed of a W-based layer.
    Type: Application
    Filed: April 6, 2010
    Publication date: August 5, 2010
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Soo Hyun KIM, Baek Mann KIM, Young Jin LEE, Dong Ha JUNG, Jeong Tae KIM
  • Patent number: 7741216
    Abstract: A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate and having a metal line forming region. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer. The diffusion barrier has a multi-layered structure of a V layer, a VxNy layer and a VxNyOz layer. A metal layer is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: June 22, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jeong Tae Kim, Seung Jin Yeom, Baek Mann Kim, Dong Ha Jung
  • Publication number: 20100085384
    Abstract: A method of controlling a mobile terminal and which includes displaying contents on a display screen of the terminal, receiving a signal indicating a portion of the display screen on the mobile terminal has been designated, and executing, via a control unit, a preset function corresponding to an output mode of information contained in the designated portion of the display screen.
    Type: Application
    Filed: April 9, 2009
    Publication date: April 8, 2010
    Inventors: Jeong-Tae Kim, Hye-Bong Lim
  • Publication number: 20100059890
    Abstract: A metal line of a semiconductor device having a diffusion barrier including CrxBy and a method for forming the same is described. The metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer is formed having a metal line forming region. A diffusion barrier including a CrxBy layer is subsequently formed on the surface of the metal line forming region and the insulation layer. A metal line is finally formed to fill the metal line forming region of the insulation layer on the diffusion barrier including a CrxBy layer.
    Type: Application
    Filed: November 16, 2009
    Publication date: March 11, 2010
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Dong Ha JUNG, Seung Jin YEOM, Baek Mann KIM, Young Jin LEE, Jeong Tae KIM
  • Publication number: 20100038788
    Abstract: A multi-layered metal line of a semiconductor device includes a semiconductor substrate; a lower metal line formed on the semiconductor substrate and recessed on a surface thereof; an insulation layer formed on the semiconductor substrate including the lower metal line and having a damascene pattern for exposing a recessed portion of the lower metal line and for delimiting an upper metal line forming region; a glue layer formed on a surface of the recessed portion of the lower metal line; a first diffusion barrier formed on the glue layer to fill the recessed portion of the lower metal line; a second diffusion barrier formed on the glue layer and the first diffusion barrier; a third diffusion barrier formed on the second diffusion barrier and a surface of the damascene pattern; and an upper metal line formed on the third diffusion barrier to fill the damascene pattern.
    Type: Application
    Filed: October 28, 2009
    Publication date: February 18, 2010
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Jeong Tae KIM, Baek Mann KIM, Soo Hyun KIM, Young Jin LEE, Dong Ha JUNG
  • Publication number: 20100023507
    Abstract: A search system using images is provided in which when a user does not know a relevant URL or search keyword correctly while surfing the Internet, he or she can search a desired website using only an image. The search system using images according to the present invention comprises an image search server and a user terminal. The image search system comprises: an image conversion section for converting the image included in the website information and the to-be-searched image uploaded by the user into search format images; an image search section for comparing eigen values of both the to-be-searched image uploaded by the user and the search image included in the website information and detecting the website information having a matching eigen value; and a storage section for storing the detected website information, the image included in the website information, and information regarding eigen values.
    Type: Application
    Filed: June 22, 2009
    Publication date: January 28, 2010
    Inventors: Jeong-Tae Kim, Sang-Whan Moon, Jin-Myeong Ahn
  • Publication number: 20100019386
    Abstract: An electrical conductor having a multilayer diffusion barrier of use in a resultant semiconductor device is presented. The electrical conductor line includes an insulation layer, a diffusion barrier, and a metal line. The insulation layer is formed on a semiconductor substrate and having a metal line forming region. The diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and has a multi-layered structure made of TaN layer, an MoxOy layer and an Mo layer. The metal line is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.
    Type: Application
    Filed: May 21, 2009
    Publication date: January 28, 2010
    Inventors: Joon Seok OH, Seung Jin YEOM, Baek Man KIM, Dong Ha JUNG, Jeong Tae KIM, Nam Yeal LEE, Jae Hong KIM
  • Patent number: 7638425
    Abstract: A metal line of a semiconductor device having a diffusion barrier including CrxBy and a method for forming the same is described. The metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer is formed having a metal line forming region. A diffusion barrier including a CrxBy layer is subsequently formed on the surface of the metal line forming region and the insulation layer. A metal line is finally formed to fill the metal line forming region of the insulation layer on the diffusion barrier including a CrxBy layer.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: December 29, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Dong Ha Jung, Seung Jin Yeom, Baek Mann Kim, Young Jin Lee, Jeong Tae Kim
  • Patent number: 7629248
    Abstract: A multi-layered metal line of a semiconductor device includes a semiconductor substrate; a lower metal line formed on the semiconductor substrate and recessed on a surface thereof; an insulation layer formed on the semiconductor substrate including the lower metal line and having a damascene pattern for exposing a recessed portion of the lower metal line and for delimiting an upper metal line forming region; a glue layer formed on a surface of the recessed portion of the lower metal line; a first diffusion barrier formed on the glue layer to fill the recessed portion of the lower metal line; a second diffusion barrier formed on the glue layer and the first diffusion barrier; a third diffusion barrier formed on the second diffusion barrier and a surface of the damascene pattern; and an upper metal line formed on the third diffusion barrier to fill the damascene pattern.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: December 8, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jeong Tae Kim, Baek Mann Kim, Soo Hyun Kim, Young Jin Lee, Dong Ha Jung
  • Publication number: 20090283908
    Abstract: A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate and a metal line forming region is formed in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer, and the diffusion layer has a multi-layered structure of an Ru layer, an RuxOy layer, an IrxOy layer, and a Ti layer. A metal layer is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.
    Type: Application
    Filed: December 8, 2008
    Publication date: November 19, 2009
    Inventors: Jeong Tae KIM, Seung Jin YEOM, Baek Mann KIM, Dong Ha JUNG, Joon Seok OH, Nam Yeal LEE, Jae Hong KIM
  • Patent number: RE40982
    Abstract: A multi-media system for transferring a single program transport stream and a method therefor are provided. A receiver is for receiving a transport stream. For the receiver to control recording and reproduction performed by a recording/reproducing device, the receiver selects one program to constitute a single program transport stream and transfers the single program transport stream to the recording/reproducing device. Here, a program number is transferred, by correcting program association table (PAT) information of the transport stream. Accordingly, the recording/reproducing device can recognize the program number within the single program transport stream to be recorded. Therefore, the receiver can perform remote control of the recording/reproducing device without the extra transfer of the program number. Also, the receiver provides an on-screen graphic (OSG) to the recording/reproducing device, resulting in an OSG of consistent appearance.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: November 17, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-ju Na, Jeong-tae Kim