Patents by Inventor Jesper Steensgaard-Madsen
Jesper Steensgaard-Madsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11870456Abstract: Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.Type: GrantFiled: December 14, 2022Date of Patent: January 9, 2024Assignee: Analog Devices, Inc.Inventor: Jesper Steensgaard-Madsen
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Publication number: 20230378968Abstract: Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.Type: ApplicationFiled: August 1, 2023Publication date: November 23, 2023Inventor: Jesper Steensgaard-Madsen
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Publication number: 20230117529Abstract: Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.Type: ApplicationFiled: December 14, 2022Publication date: April 20, 2023Applicant: Analog Devices, Inc.Inventor: Jesper STEENSGAARD-MADSEN
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Patent number: 11558063Abstract: Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.Type: GrantFiled: November 8, 2021Date of Patent: January 17, 2023Assignee: ANALOG DEVICES INC.Inventor: Jesper Steensgaard-Madsen
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Patent number: 11545991Abstract: Disclosed herein are some examples of analog-to-digital converters (ADCs) that can perform auto-zeroing with amplifying a signal for improvement of a signal-to-noise ratio. The ADCs may produce a first digital code to represent an analog input signal and a second digital code based on a residue from the first digital code, and may combine the first digital code and the second digital code to produce a digital output code to represent the analog input signal. The ADC may utilize a first observation and a second observation of an analog residue value representing the residue to produce the second digital code.Type: GrantFiled: November 11, 2021Date of Patent: January 3, 2023Assignee: Analog Devices, Inc.Inventors: Jesper Steensgaard-Madsen, Andrew J. Thomas
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Publication number: 20220368339Abstract: Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.Type: ApplicationFiled: July 31, 2022Publication date: November 17, 2022Applicant: Analog Devices, Inc.Inventor: Jesper STEENSGAARD-MADSEN
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Patent number: 11405046Abstract: Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.Type: GrantFiled: August 11, 2020Date of Patent: August 2, 2022Assignee: ANALOG DEVICES, INC.Inventor: Jesper Steensgaard-Madsen
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Publication number: 20220077868Abstract: Disclosed herein are some examples of analog-to-digital converters (ADCs) that can perform auto-zeroing with amplifying a signal for improvement of a signal-to-noise ratio. The ADCs may produce a first digital code to represent an analog input signal and a second digital code based on a residue from the first digital code, and may combine the first digital code and the second digital code to produce a digital output code to represent the analog input signal. The ADC may utilize a first observation and a second observation of an analog residue value representing the residue to produce the second digital code.Type: ApplicationFiled: November 11, 2021Publication date: March 10, 2022Applicant: Analog Devices, Inc.Inventors: Jesper STEENSGAARD-MADSEN, Andrew J. THOMAS
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Publication number: 20220069836Abstract: Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.Type: ApplicationFiled: November 8, 2021Publication date: March 3, 2022Applicant: Analog Devices, Inc.Inventor: Jesper STEENSGAARD-MADSEN
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Publication number: 20220052704Abstract: Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.Type: ApplicationFiled: August 11, 2020Publication date: February 17, 2022Applicant: Analog Devices, Inc.Inventor: Jesper STEENSGAARD-MADSEN
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Patent number: 11177821Abstract: Disclosed herein are some examples of analog-to-digital converters (ADCs) that can perform auto-zeroing with amplifying a signal for improvement of a signal-to-noise ratio. The ADCs may produce a first digital code to represent an analog input signal and a second digital code based on a residue from the first digital code, and may combine the first digital code and the second digital code to produce a digital output code to represent the analog input signal. The ADC may utilize a first observation and a second observation of an analog residue value representing the residue to produce the second digital code.Type: GrantFiled: August 11, 2020Date of Patent: November 16, 2021Assignee: ANALOG DEVICES, INC.Inventors: Jesper Steensgaard-Madsen, Andrew Thomas
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Patent number: 11171662Abstract: Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.Type: GrantFiled: August 11, 2020Date of Patent: November 9, 2021Assignee: ANALOG DEVICES, INC.Inventor: Jesper Steensgaard-Madsen
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Patent number: 10790840Abstract: Analog-to-digital converter (ADC) circuitry to convert an analog signal to a digital signal is disclosed herein. The ADC circuitry can utilize pipelined-interpolation analog-to-digital converters (PIADCs) with adaptation circuitry to correct regenerative amplification cells of the PIADCs. The PIADCs can implement a rotational shuffling scheme for correction of the regenerative amplification cells, where the correction implemented by the regenerative amplification cells allows for offsetting of latches of the regenerative amplification cells.Type: GrantFiled: November 14, 2019Date of Patent: September 29, 2020Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANYInventor: Jesper Steensgaard-Madsen
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Patent number: 10715160Abstract: Noise sources in an ADC circuit can include kT/C noise of a sampling capacitor, noise coupling on to sampling capacitors from digital circuits, and amplifier noise. Also, charge injection from mismatch in sample switches can cause offsets. These various noise sources can be largely canceled or reduced using described techniques. As a result, the size of the sampling capacitors can be greatly reduced, while still achieving significantly improved noise performance and power efficiency for the overall converter.Type: GrantFiled: September 13, 2019Date of Patent: July 14, 2020Assignee: Analog Devices International Unlimited CompanyInventors: Sanjay Rajasekhar, Jesper Steensgaard-Madsen, Hongxing Li, Christopher Peter Hurrell
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Publication number: 20200162086Abstract: Analog-to-digital converter (ADC) circuitry to convert an analog signal to a digital signal is disclosed herein. The ADC circuitry can utilize pipelined-interpolation analog-to-digital converters (PIADCs) with adaptation circuitry to correct regenerative amplification cells of the PIADCs. The PIADCs can implement a rotational shuffling scheme for correction of the regenerative amplification cells, where the correction implemented by the regenerative amplification cells allows for offsetting of latches of the regenerative amplification cells.Type: ApplicationFiled: November 14, 2019Publication date: May 21, 2020Applicant: Analog Devices International Unlimited CompanyInventor: Jesper STEENSGAARD-MADSEN
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Patent number: 10608655Abstract: Various background calibration techniques to calibrate inter-stage gain, e.g., in pipelined ADCs, are described to allow open loop amplifier circuits to be used as residue amplifiers for better power efficiency. Using various techniques, a well-controlled perturbation can be injected between two conversions and the actual perturbation after a residue amplifier can be measured. By comparing the actual measurement against an expected value, the gain information of the residue amplifier can be estimated and then calibration can be applied.Type: GrantFiled: December 6, 2018Date of Patent: March 31, 2020Assignee: Analog Devices, Inc.Inventors: Hongxing Li, Jesper Steensgaard-Madsen
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Patent number: 9472304Abstract: A configurable signal-processing circuit may provide a plurality of selectable signal-processing operations. The configurable signal-processing circuit may have a configuration circuit that provides a configuration code that selects a first signal-processing operation from the plurality of selectable signal-processing operations based on a timing pattern for evaluating an input signal and outputting an output signal.Type: GrantFiled: May 14, 2015Date of Patent: October 18, 2016Assignee: Linear Technology CorporationInventors: Jesper Steensgaard-Madsen, Manideep Gande
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Patent number: 9331709Abstract: An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.Type: GrantFiled: January 23, 2014Date of Patent: May 3, 2016Assignee: LINEAR TECHNOLOGY CORPORATIONInventor: Jesper Steensgaard-Madsen
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Patent number: 9231611Abstract: An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.Type: GrantFiled: January 23, 2014Date of Patent: January 5, 2016Assignee: LINEAR TECHNOLOGY CORPORATIONInventor: Jesper Steensgaard-Madsen
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Publication number: 20150332785Abstract: A configurable signal-processing circuit may provide a plurality of selectable signal-processing operations. The configurable signal-processing circuit may have a configuration circuit that provides a configuration code that selects a first signal-processing operation from the plurality of selectable signal-processing operations based on a timing pattern for evaluating an input signal and outputting an output signal.Type: ApplicationFiled: May 14, 2015Publication date: November 19, 2015Applicant: LINEAR TECHNOLOGY CORPORATIONInventors: Jesper Steensgaard-Madsen, Manideep Gande