Patents by Inventor Jesper Steensgaard-Madsen
Jesper Steensgaard-Madsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9054727Abstract: An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.Type: GrantFiled: January 23, 2014Date of Patent: June 9, 2015Assignee: LINEAR TECHNOLOGY CORPORATIONInventor: Jesper Steensgaard-Madsen
-
Patent number: 8878587Abstract: An interface circuit for driving a fully-differential circuit has a first circuit configured to decrease the voltage at its output in response to an increase in an average value of first and second input voltages. A first network receives the first input voltage and the output voltage of the first circuit to provide a first output voltage for driving the fully-differential circuit. A second network receives the second input voltage and the output voltage of the first circuit to provide a second output voltage for driving the fully-differential circuit. An impedance ratio of the first network is substantially matched to an impedance ratio of the second network.Type: GrantFiled: November 18, 2013Date of Patent: November 4, 2014Assignee: Linear Technology CorporationInventor: Jesper Steensgaard-Madsen
-
Patent number: 8810443Abstract: An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.Type: GrantFiled: July 19, 2012Date of Patent: August 19, 2014Assignee: Linear Technology CorporationInventor: Jesper Steensgaard-Madsen
-
Publication number: 20140132432Abstract: An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.Type: ApplicationFiled: January 23, 2014Publication date: May 15, 2014Applicant: LINEAR TECHNOLOGY CORPORATIONInventor: Jesper STEENSGAARD-MADSEN
-
Publication number: 20140132430Abstract: An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.Type: ApplicationFiled: January 23, 2014Publication date: May 15, 2014Applicant: LINEAR TECHNOLOGY CORPORATIONInventor: Jesper STEENSGAARD-MADSEN
-
Publication number: 20140132431Abstract: An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.Type: ApplicationFiled: January 23, 2014Publication date: May 15, 2014Applicant: LINEAR TECHNOLOGY CORPORATIONInventor: Jesper STEENSGAARD-MADSEN
-
Patent number: 8576104Abstract: An analog-to-digital converter (ADC) system configured to receive a first and a second analog quantity and to provide a plurality of numerical parameters representative of the first and second analog quantities. The ADC system includes a first, a second, and a third ADC circuit, and a digital interface circuit. The first ADC circuit is configured to provide a first code representative of the first analog quantity and to provide a first analog residue quantity representative of the first analog quantity with respect to the first code. The second ADC circuit is configured to provide a second code representative of the second analog quantity and to provide a second analog residue quantity representative of the second analog quantity with respect to the second code. The third ADC circuit is configured to receive the first and second analog residue quantities, and to provide a third digital code representative of a difference of the first and second analog residue quantities.Type: GrantFiled: June 22, 2011Date of Patent: November 5, 2013Assignee: Linear Technology CorporationInventors: Jesper Steensgaard-Madsen, Micah Galletta O'Halloran, Florin Oprescu
-
Publication number: 20130278453Abstract: An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.Type: ApplicationFiled: July 19, 2012Publication date: October 24, 2013Inventor: Jesper STEENSGAARD-MADSEN
-
Patent number: 8502594Abstract: A switch circuit is described, where a switch to be controlled is formed of two NMOS transistors having their source terminals connected together and their gate terminals connected together. Their drain terminals are the input and output terminals of the switch. A driver circuit controls a bootstrap circuit that is formed of a latching circuit and a capacitor. When the switch is in an off state, the driver circuit connects the capacitor to a charging voltage source for charging the capacitor to a bootstrap voltage, and applies a non-zero voltage across the latching circuit. When the driver circuit is controlled to turn on the switch, the driver circuit disconnects the capacitor from the charging voltage source, and the latching circuit becomes conductive and effectively connects the capacitor across the gate and source terminals of the switch to turn it on with the bootstrap voltage. The bootstrap voltage across the capacitor maintains the latching circuit in a latched conductive state.Type: GrantFiled: December 1, 2009Date of Patent: August 6, 2013Assignee: Linear Technology CorporationInventor: Jesper Steensgaard-Madsen
-
Patent number: 8390497Abstract: An analog-to-digital converter system and methodology comprising an analog-to-digital converter circuit configured to provide sequentially a plurality of codes designating a numerical value in a first number system. The analog-to-digital converter system further comprising an encoder interface circuit configured to receive the plurality of codes and to derive a redundant digital representation. A portion of the redundant digital representation is transmitted during the conversion period. The encoder interface circuit may be configured to use a numerical successive-approximation algorithm to derive the redundant digital representation. A substantial portion of the redundant digital representation may be transmitted via a serial interface during the conversion period to reduce an overall latency.Type: GrantFiled: May 13, 2011Date of Patent: March 5, 2013Assignee: Linear Technology CorporationInventor: Jesper Steensgaard-Madsen
-
Publication number: 20120326909Abstract: An analog-to-digital converter (ADC) system configured to receive a first and a second analog quantity and to provide a plurality of numerical parameters representative of the first and second analog quantities. The ADC system includes a first, a second, and a third ADC circuit, and a digital interface circuit. The first ADC circuit is configured to provide a first code representative of the first analog quantity and to provide a first analog residue quantity representative of the first analog quantity with respect to the first code. The second ADC circuit is configured to provide a second code representative of the second analog quantity and to provide a second analog residue quantity representative of the second analog quantity with respect to the second code. The third ADC circuit is configured to receive the first and second analog residue quantities, and to provide a third digital code representative of a difference of the first and second analog residue quantities.Type: ApplicationFiled: June 22, 2011Publication date: December 27, 2012Inventors: Jesper STEENSGAARD-MADSEN, Micah Galletta O'Halloran, Florin Oprescu
-
Patent number: 8319673Abstract: An embodiment of an analog-to-digital converter system is described wherein an analog voltage signal Vin(t) is provided by an input amplifier. The analog signal Vin(t) has a predetermined full-scale range that is less wide than a reference voltage (Vref) range used by a downstream ADC to derive a first digital (numerical) representation D1(k) of a sampled value Vin(k) of the analog signal Vin(t). The first digital representation has N bits. A digital circuit then converts the N-bit D1(k) code to a second numerical representation D2(k) of the sampled analog voltage Vin(k) with respect to the full-scale range of the ADC system. The D2(k) code has P bits of resolution, which may be less than N bits. The P-bit D2(k) code representing Vin(k) is the output of the ADC system. Therefore, the width of the reference voltage range applied to the ADC is greater than the width of the system's full-scale range at the output of the system.Type: GrantFiled: August 23, 2010Date of Patent: November 27, 2012Assignee: Linear Technology CorporationInventor: Jesper Steensgaard-Madsen
-
Patent number: 8232905Abstract: An analog-to-digital converter (ADC) system and method. The ADC system includes a digital control circuit, an amplifier, a capacitor, and an evaluation circuit. The digital control circuit is configured to sequentially configure the ADC system in a first configuration and a second configuration to derive a digital representation of an analog signal value. The amplifier circuit includes an amplifier input terminal and an amplifier output terminal. The capacitor has a first capacitor terminal coupled to the amplifier input terminal in the first and second configurations of the ADC system. The capacitor further has a second capacitor terminal coupled to the amplifier output terminal in the first configuration of the ADC system. The evaluation circuit is configured to provide a first digital code to represent a first voltage level at the amplifier output terminal in the first configuration of the ADC system.Type: GrantFiled: November 18, 2010Date of Patent: July 31, 2012Assignee: Linear Technology CorporationInventor: Jesper Steensgaard-Madsen
-
Patent number: 8130133Abstract: In an A/D converter, isolation switches are used between the capacitors and the conversion switches. The conversion switches are those switches used to selectively couple the plates of the binary weighted capacitors to either Vref or 0 volts during the A/D conversion process. During sampling of the input voltage signal, the isolation switches are opened to isolate the conversion switches from the wide range of possible input voltages at the bottom plates of the capacitors. Therefore, the voltage across the conversion switches is substantially limited to Vref. Hence, the conversion switches can be very fast low voltage switches. After sampling of the input voltage, when the sampled input voltage is locked in, the conversion switches operate normally to selectively connect the capacitor plates to either Vref or 0 volts for successively approximating the input voltage, whereby a digital code representing the sampled input voltage is generated.Type: GrantFiled: July 27, 2010Date of Patent: March 6, 2012Assignee: Linear Technology CorporationInventor: Jesper Steensgaard-Madsen
-
Publication number: 20120026027Abstract: In an A/D converter, isolation switches are used between the capacitors and the conversion switches. The conversion switches are those switches used to selectively couple the plates of the binary weighted capacitors to either Vref or 0 volts during the A/D conversion process. During sampling of the input voltage signal, the isolation switches are opened to isolate the conversion switches from the wide range of possible input voltages at the bottom plates of the capacitors. Therefore, the voltage across the conversion switches is substantially limited to Vref. Hence, the conversion switches can be very fast low voltage switches. After sampling of the input voltage, when the sampled input voltage is locked in, the conversion switches operate normally to selectively connect the capacitor plates to either Vref or 0 volts for successively approximating the input voltage, whereby a digital code representing the sampled input voltage is generated.Type: ApplicationFiled: July 27, 2010Publication date: February 2, 2012Applicant: LINEAR TECHNOLOGY CORPORATIONInventor: Jesper Steensgaard-Madsen
-
Publication number: 20110285567Abstract: An analog-to-digital converter system and methodology comprising an analog-to-digital converter circuit configured to provide sequentially a plurality of codes designating a numerical value in a first number system. The analog-to-digital converter system further comprising an encoder interface circuit configured to receive the plurality of codes and to derive a redundant digital representation. A portion of the redundant digital representation is transmitted during the conversion period. The encoder interface circuit may be configured to use a numerical successive-approximation algorithm to derive the redundant digital representation. A substantial portion of the redundant digital representation may be transmitted via a serial interface during the conversion period to reduce an overall latency.Type: ApplicationFiled: May 13, 2011Publication date: November 24, 2011Inventor: Jesper STEENSGAARD-MADSEN
-
Publication number: 20110285569Abstract: An embodiment of an analog-to-digital converter system is described wherein an analog voltage signal Vin(t) is provided by an input amplifier. The analog signal Vin(t) has a predetermined full-scale range that is less wide than a reference voltage (Vref) range used by a downstream ADC to derive a first digital (numerical) representation D1(k) of a sampled value Vin(k) of the analog signal Vin(t). The first digital representation has N bits. A digital circuit then converts the N-bit D1(k) code to a second numerical representation D2(k) of the sampled analog voltage Vin(k) with respect to the full-scale range of the ADC system. The D2(k) code has P bits of resolution, which may be less than N bits. The P-bit D2(k) code representing Vin(k) is the output of the ADC system. Therefore, the width of the reference voltage range applied to the ADC is greater than the width of the system's full-scale range at the output of the system.Type: ApplicationFiled: August 23, 2010Publication date: November 24, 2011Applicant: LINEAR TECHNOLOGY CORPORATIONInventor: Jesper Steensgaard-Madsen
-
Patent number: 7961132Abstract: In one embodiment, an A/D converter samples an analog input signal voltage by applying the input signal to a first capacitor terminal, while a second capacitor terminal is connected to ground via an NMOS sampling switch, to charge the capacitor to the input signal voltage. During an analog-to-digital conversion process, the second capacitor terminal may swing in a voltage range that extends below ground. A controller circuit provides bias voltage signals to a gate terminal and to a p-well of the NMOS sampling switch, to selectively turn the sampling switch on and off. In a first step of a multi-step sampling process, the controller very quickly discharges the gate terminal to ground to isolate a quantity of charge on the second capacitor plate. In a subsequent step of the sampling process, the controller circuit applies a negative voltage to the gate terminal and p-well to ensure that the quantity of change is substantially preserved during the ensuing analog-to-digital conversion process.Type: GrantFiled: February 3, 2010Date of Patent: June 14, 2011Assignee: Linear Technology CorporationInventors: Raymond T. Perry, Jesper Steensgaard-Madsen
-
Publication number: 20110115661Abstract: An analog-to-digital converter (ADC) system and method. The ADC system includes a digital control circuit, an amplifier, a capacitor, and an evaluation circuit. The digital control circuit is configured to sequentially configure the ADC system in a first configuration and a second configuration to derive a digital representation of an analog signal value. The amplifier circuit includes an amplifier input terminal and an amplifier output terminal. The capacitor has a first capacitor terminal coupled to the amplifier input terminal in the first and second configurations of the ADC system. The capacitor further has a second capacitor terminal coupled to the amplifier output terminal in the first configuration of the ADC system. The evaluation circuit is configured to provide a first digital code to represent a first voltage level at the amplifier output terminal in the first configuration of the ADC system.Type: ApplicationFiled: November 18, 2010Publication date: May 19, 2011Inventor: Jesper STEENSGAARD-MADSEN
-
Patent number: 7907074Abstract: Circuits and methods that improve the performance of voltage reference driver circuits and associated analog to digital converters are provided. A voltage reference driver circuit that maintains a substantially constant output voltage when a load current is modulated by an input signal is provided. The voltage reference driver circuit synchronously decouples a voltage regulation circuit from the load circuit when modulating events such as pulses caused by the load circuit during a switching interval are generated, preventing disturbance of the regulation circuitry and keeping its output voltage substantially constant.Type: GrantFiled: October 9, 2008Date of Patent: March 15, 2011Assignee: Linear Technology CorporationInventors: Alfio Zanchi, David M. Thomas, Joseph L. Sousa, Andrew J. Thomas, Jesper Steensgaard-Madsen