Patents by Inventor Jia Feng

Jia Feng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10274830
    Abstract: The present disclosure relates to a dynamic lithographic exposure method, and an associated apparatus, which exposes a photosensitive material over a plurality of depths of focus respectively spanning a different region of the photosensitive material. By exposing the photosensitive material over a plurality of depths of focus, the exposure of the photosensitive material is improved resulting in a larger lithographic process window. In some embodiments, the dynamic lithographic exposure method is performed by forming a photosensitive material over a substrate. The photosensitive material is exposed to electromagnetic radiation at a plurality of depths of focus that respectively span a different region within the photosensitive material. Exposing the photosensitive material to the electromagnetic radiation modifies a solubility of an exposed region within the photosensitive material. The photosensitive material is then developed to remove the soluble region.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jun-Yih Yu, De-Fang Huang, De-Chen Tseng, Jia-Feng Chang, Li-Fang Hsu
  • Publication number: 20190098329
    Abstract: Motion field estimation is used to predict motion within video blocks. A current block of a current frame is identified as a projection of a first reference block of a first reference frame onto the current frame. The projection uses a first motion vector of the reference block with respect to a second reference frame. A temporal motion vector candidate is determined for the current block by projecting the current block onto a second reference frame. The temporal motion vector candidate identifies a second reference block. A motion vector selected from a motion vector candidate list is used to generate a prediction block using the selected motion vector. The current block is coded using the prediction block.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 28, 2019
    Inventors: Jingning Han, Yaowu Xu, James Bankoski, Jia Feng
  • Publication number: 20190094706
    Abstract: The present disclosure, in some embodiments, relates to a photolithography tool. The photolithography tool includes an illumination source configured to generate electromagnetic radiation and projection optics configured to focus the electromagnetic radiation onto a photosensitive material overlying a substrate according to a pattern on a photomask. A dynamic focal element is configured to dynamically change positions at which the electromagnetic radiation is focused over the substrate during exposure of the photosensitive material. The positions at which the electromagnetic radiation is focused define a plurality of depths of focus.
    Type: Application
    Filed: November 28, 2018
    Publication date: March 28, 2019
    Inventors: Jun-Yih Yu, De-Fang Huang, De-Chen Tseng, Jia-Feng Chang, Li-Fang Hsu
  • Patent number: 10230735
    Abstract: Some embodiments provide a program that receives, from an application, a role-based permission (RBP) request specifying an RBP, a first user, and a second user. The RBP specifies a set of actions, a first set of users authorized to perform the set of actions, a second set of users on which the first set of users is authorized to perform the set of actions, and a relationship condition. When the relationship condition specifies a hierarchy-based relationship, the program determines valid users in the second set of users according to a hierarchy of users. When the relationship condition specifies a non-hierarchy-based relationship, the program determines valid users in the second set of users according to a relationship not based on the hierarchy of users. The program determines whether the first user is authorized to perform the set of actions on the second user based on the determined valid users.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: March 12, 2019
    Assignee: SUCCESSFACTORS, INC.
    Inventors: Jia Feng, Yulong Yang, Lu Luo, Jessica Yang, Edward Lu
  • Publication number: 20190058883
    Abstract: A method for coding a transform block of coefficients includes generating a new scan order from the original scan order such that a maximum scan distance of the new scan order is smaller than or equal to a predetermined distance, and coding the coefficients based on the new scan order. An apparatus for decoding a transform block of coefficients. The apparatus includes a memory and a processor. The memory includes instructions executable by the processor to identify an original scan order for encoding the coefficients, generate a new scan order from the original scan order such that a maximum scan distance of the new scan order is less than or equal to a predetermined distance, and decode, from an encoded bitstream, the coefficients based on the new scan order.
    Type: Application
    Filed: April 11, 2018
    Publication date: February 21, 2019
    Inventors: Ching-Han Chiang, Yaowu Xu, Jingning Han, Jia Feng
  • Patent number: 10169513
    Abstract: According to one embodiment, a source code is parsed to identify a first routine to perform a first function and a second routine to perform a second function. A control signaling topology is determined between the first routine and the second routine based on one or more statements associated with the first routine and the second routine defined in the source code. A first logic block is allocated describing a first hardware configuration representing the first function of the first routine. A second logic block is allocated describing a second hardware configuration representing the second function of the second routine. A register-transfer level (RTL) netlist is generated based on the first logic block and the second logic block. The second logic block is to perform the second function dependent upon the first function performed by the first logic block based on the control signaling topology.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: January 1, 2019
    Assignee: BAIDU USA LLC
    Inventors: Davy Huang, Jia Feng, Hassan Kianinejad, Yanyan Zhang, Manjiang Zhang
  • Publication number: 20180159952
    Abstract: Refresh requests are received by a data source that each request a snapshot of current members of one of a plurality of dynamically changing groups and dynamically changing rules corresponding to such group. Thereafter, the data source queues the received plurality of refresh requests for selective execution or deletion into a new request queue. In addition, real-time execution of refresh jobs are initiated for all of queued refresh requests if a number of refresh requests in both of the new request queue and a waiting requests queue is below a pre-defined threshold. Alternatively, a job framework schedules execution of task jobs for a subset of the queued requests in the new request queue and the waiting requests queue if certain conditions are met.
    Type: Application
    Filed: December 7, 2016
    Publication date: June 7, 2018
    Inventors: Jia Feng, Edward Lu, Jessica Yang, Zonghan Wu, Ruibin Zhang, Fangling Liu, Xuejian Qiao, Yan Fan
  • Publication number: 20170323045
    Abstract: According to one embodiment, a source code is parsed to identify a first routine to perform a first function and a second routine to perform a second function. A control signaling topology is determined between the first routine and the second routine based on one or more statements associated with the first routine and the second routine defined in the source code. A first logic block is allocated describing a first hardware configuration representing the first function of the first routine. A second logic block is allocated describing a second hardware configuration representing the second function of the second routine. A register-transfer level (RTL) netlist is generated based on the first logic block and the second logic block. The second logic block is to perform the second function dependent upon the first function performed by the first logic block based on the control signaling topology.
    Type: Application
    Filed: May 6, 2016
    Publication date: November 9, 2017
    Inventors: Davy Huang, Jia Feng, Hassan Kianinejad, Yanyan Zhang, Manjiang Zhang
  • Publication number: 20170212423
    Abstract: The present disclosure relates to a dynamic lithographic exposure method, and an associated apparatus, which exposes a photosensitive material over a plurality of depths of focus respectively spanning a different region of the photosensitive material. By exposing the photosensitive material over a plurality of depths of focus, the exposure of the photosensitive material is improved resulting in a larger lithographic process window. In some embodiments, the dynamic lithographic exposure method is performed by forming a photosensitive material over a substrate. The photosensitive material is exposed to electromagnetic radiation at a plurality of depths of focus that respectively span a different region within the photosensitive material. Exposing the photosensitive material to the electromagnetic radiation modifies a solubility of an exposed region within the photosensitive material. The photosensitive material is then developed to remove the soluble region.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 27, 2017
    Inventors: Jun-Yih Yu, De-Fang Huang, De-Chen Tseng, Jia-Feng Chang, Li-Fang Hsu
  • Publication number: 20170195329
    Abstract: Some embodiments provide a program that receives, from an application, a role-based permission (RBP) request specifying an RBP, a first user, and a second user. The RBP specifies a set of actions, a first set of users authorized to perform the set of actions, a second set of users on which the first set of users is authorized to perform the set of actions, and a relationship condition. When the relationship condition specifies a hierarchy-based relationship, the program determines valid users in the second set of users according to a hierarchy of users. When the relationship condition specifies a non-hierarchy-based relationship, the program determines valid users in the second set of users according to a relationship not based on the hierarchy of users. The program determines whether the first user is authorized to perform the set of actions on the second user based on the determined valid users.
    Type: Application
    Filed: December 30, 2015
    Publication date: July 6, 2017
    Inventors: Jia Feng, Yulong Yang, Lu Luo, Jessica Yang, Edward Lu
  • Publication number: 20170187761
    Abstract: A system, apparatus, and method for maintaining the consistency of global information is disclosed herein. In one embodiment, the method includes retrieving current version information associated with the global information from a global information server; retrieving global information from the global information server based on the current version information; updating a period of validity of the current version information based on a status of communication with the global information server; and suspending a network service for the global information when detecting that the period of validity of the current version information has expired.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 29, 2017
    Inventors: Yunfeng ZHU, Yijun LU, Yanchao LI, Jibin LEI, Yunfeng TAO, Zhiyang TANG, Jun YU, Jia FENG, DongBai GUO
  • Publication number: 20170187840
    Abstract: A system, apparatus, and method for maintaining the consistency of global information is disclosed herein. The method includes storing historical version information associated with global information; retrieving current version information associated with the global information from a global information server; generating updated historical version information based on the current version information; transmitting an update confirmation notice to the global information server; and retrieving updated global information from the global information server based on the updated historical version information.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 29, 2017
    Inventors: Yunfeng ZHU, Yijun LU, Yanchao LI, Jibin LEI, Yunfeng TAO, Zhiyang TANG, Jun YU, Jia FENG, DongBai GUO
  • Publication number: 20170187578
    Abstract: Embodiments of the disclosure describe a system, method, and apparatus for acquiring global information. The method comprises receiving current version information from a global information server, the current version information associated with current global information and associated with a network service; retrieving the current global information associated with the current version information and associated with the network service from the global information server; and providing or suspending the network service associated with the current global information based on a presence of a stop-write identifier in the current global information.
    Type: Application
    Filed: December 24, 2016
    Publication date: June 29, 2017
    Inventors: Yunfeng ZHU, Yijun LU, Yanchao LI, Jibin LEI, Yunfeng TAO, Zhiyang TANG, Jun YU, Jia FENG, DongBai GUO
  • Patent number: 9673053
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a first material layer on the substrate; forming a stop layer on the first material layer; forming a second material layer on the stop layer; and performing a planarizing process to remove the second material layer, the stop layer, and part of the first material layer for forming a gate layer.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: June 6, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Rung-Yuan Lee, Yu-Ting Li, Jing-Yin Jhang, Chen-Yi Weng, Jia-Feng Fang, Yi-Wei Chen, Wei-Jen Wu, Po-Cheng Huang, Fu-Shou Tsai, Kun-Ju Li, Wen-Chin Lin, Chih-Chien Liu, Chih-Hsun Lin, Chun-Yuan Wu
  • Patent number: 9530871
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming an epitaxial layer on the fin-shaped structure; forming a first contact etch stop layer (CESL) on the epitaxial layer; forming a source/drain region in the epitaxial layer; and forming a second CESL on the first CESL.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: December 27, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Yueh Tsai, Jia-Feng Fang, Yi-Wei Chen, Jing-Yin Jhang, Rung-Yuan Lee, Chen-Yi Weng, Wei-Jen Wu
  • Patent number: 9443757
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming an epitaxial layer on the fin-shaped structure; forming a first contact etch stop layer (CESL) on the epitaxial layer; forming a source/drain region in the epitaxial layer; and forming a second CESL on the first CESL.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: September 13, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Yueh Tsai, Jia-Feng Fang, Yi-Wei Chen, Jing-Yin Jhang, Rung-Yuan Lee, Chen-Yi Weng, Wei-Jen Wu
  • Publication number: 20160148816
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a first material layer on the substrate; forming a stop layer on the first material layer; forming a second material layer on the stop layer; and performing a planarizing process to remove the second material layer, the stop layer, and part of the first material layer for forming a gate layer.
    Type: Application
    Filed: November 20, 2014
    Publication date: May 26, 2016
    Inventors: Rung-Yuan Lee, Yu-Ting Li, Jing-Yin Jhang, Chen-Yi Weng, Jia-Feng Fang, Yi-Wei Chen, Wei-Jen Wu, Po-Cheng Huang, Fu-Shou Tsai, Kun-Ju Li, Wen-Chin Lin, Chih-Chien Liu, Chih-Hsun Lin, Chun-Yuan Wu
  • Publication number: 20160055001
    Abstract: A method for operating an instruction buffer is disclosed. A read pointer that includes a value indicative of a given bank of a plurality of banks is received. A subset of the of the plurality of banks may then be selected dependent upon the read pointer and one or more control bits associated with an instruction stored at a location specified by the read pointer. The subset of the plurality of banks may then be activated, and an instruction read from each activated bank to form a dispatch group.
    Type: Application
    Filed: August 19, 2014
    Publication date: February 25, 2016
    Inventors: Gideon Levinsky, Jama Barreh, Jia Feng
  • Patent number: 9013236
    Abstract: An operational transconductance amplifier for connection with multiple input voltage sources includes a resistance simulation unit, two current cancellation units, a first differential output unit, two current division units, and a second differential output unit. The resistance simulation unit is to simulate resistance. The two current cancellation units are to receive and convert the voltage of the input voltage sources into two first currents. The two first currents flow to two first output ends of the first differential output unit, respectively. The two current division units are to receive and convert the voltage of the input voltage sources into two second currents. The two second currents flow to two second output ends of the two second differential output units, respectively, and include the same potential as the two first currents.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: April 21, 2015
    Assignee: National Chung Cheng University
    Inventors: Shuenn-Yuh Lee, Cheng-Pin Wang, Jia-Feng Tsai
  • Patent number: 8949083
    Abstract: A method for modeling a transistor includes providing a transistor model having at least a source node, a drain node, and a gate node, simulating operation of a device using the transistor model in a computing apparatus, and generating an offset voltage at the gate node depending on a magnitude of a current passing through the device.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: February 3, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Jia Feng, Zhi-Yuan Wu, Juhi Bansal, Srinath Krishnan