Patents by Inventor Jia-Horng Shieh

Jia-Horng Shieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180224919
    Abstract: A method for performing system power control within an electronic device and an associated apparatus are provided. The method includes the steps of: utilizing a power consumption index generator positioned in a specific subsystem to generate a power consumption index corresponding to the specific subsystem, where the electronic device includes a plurality of subsystems, and the specific subsystem is one of the plurality of subsystems; and triggering a power limiter protection operation for the electronic device according to the power consumption index. For example, the power consumption index corresponding to the specific subsystem may represent a power consumption value of the specific subsystem, and the method may further include: comparing the power consumption value of the specific subsystem with a peak power threshold to determine whether the power consumed by the specific subsystem reaches the peak power threshold to generate a determining result, for triggering the power limiter protection operation.
    Type: Application
    Filed: April 2, 2018
    Publication date: August 9, 2018
    Inventors: Chia-Lin Lu, Hui-Hsuan Wang, I-Pu Niu, Yu-Chung Chang, Jia-Horng Shieh
  • Patent number: 9971396
    Abstract: A method for performing system power control within an electronic device and an associated apparatus are provided. The method includes the steps of: utilizing a power consumption index generator positioned in a specific subsystem to generate a power consumption index corresponding to the specific subsystem, where the electronic device includes a plurality of subsystems, and the specific subsystem is one of the plurality of subsystems; and triggering a power limiter protection operation for the electronic device according to the power consumption index. For example, the power consumption index corresponding to the specific subsystem may represent a power consumption value of the specific subsystem, and the method may further include: comparing the power consumption value of the specific subsystem with a peak power threshold to determine whether the power consumed by the specific subsystem reaches the peak power threshold to generate a determining result, for triggering the power limiter protection operation.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: May 15, 2018
    Assignee: MEDIATEK INC.
    Inventors: Chia-Lin Lu, Hui-Hsuan Wang, I-Pu Niu, Yu-Chung Chang, Jia-Horng Shieh
  • Publication number: 20180039324
    Abstract: A controller coupled to a plurality of hardware modules is arranged for determining activities of at least two of the hardware modules in real time, and determining a voltage and a frequency for one of the hardware modules according to the activities of the at least two of the hardware modules.
    Type: Application
    Filed: October 23, 2015
    Publication date: February 8, 2018
    Inventors: Yen-Lin Lee, Ming-Hsien Lee, Tai-Ying Jiang, Mark Shane Peng, Hui-Hsuan Wang, Jia-Horng Shieh, Chun-Yuan Lai, Shin-Pen Chen, Chung-Hua Yu
  • Publication number: 20160054776
    Abstract: A method for performing system power control within an electronic device and an associated apparatus are provided. The method includes the steps of: utilizing a power consumption index generator positioned in a specific subsystem to generate a power consumption index corresponding to the specific subsystem, where the electronic device includes a plurality of subsystems, and the specific subsystem is one of the plurality of subsystems; and triggering a power limiter protection operation for the electronic device according to the power consumption index. For example, the power consumption index corresponding to the specific subsystem may represent a power consumption value of the specific subsystem, and the method may further include: comparing the power consumption value of the specific subsystem with a peak power threshold to determine whether the power consumed by the specific subsystem reaches the peak power threshold to generate a determining result, for triggering the power limiter protection operation.
    Type: Application
    Filed: March 27, 2015
    Publication date: February 25, 2016
    Applicant: Mediatek Inc.
    Inventors: Chia-Lin Lu, Hui-Hsuan Wang, I-Pu Niu, Yu-Chung Chang, Jia-Horng Shieh
  • Patent number: 8335808
    Abstract: The invention is a method of calculating a key equation polynomial. The key equation comprises an errata locator polynomial and an errata evaluator polynomial. The errata locator polynomial decomposes to a plurality of coefficients. Some or all of the plurality of coefficients are formed by adding up decomposed data. The method comprises a coefficient calculation procedure for the errata locator polynomial of updating at least two coefficients, or two decomposed data of the coefficient calculation procedure, or a combination of the above in a single clock cycle simultaneously to get the errata locator polynomial.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: December 18, 2012
    Assignee: Mediatek Inc.
    Inventor: Jia-Horng Shieh
  • Patent number: 8284820
    Abstract: According to an embodiment of the present invention, a shared processor architecture in a receiver system is disclosed. The receiver system is configured to have a first functional stage and a second functional stage for processing information carried by signals from a first transmitter system and a second transmitter system respectively. The first functional stage and the second functional stage correspond to an identical signal processing function. The shared processor architecture includes a first processor, allocated to the first functional stage and the second functional stage, for processing an output generated from the first functional stage or an output from the second functional stage.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: October 9, 2012
    Assignee: Mediatek Inc.
    Inventors: Chun-Nan Chen, Jia-Horng Shieh
  • Patent number: 8175012
    Abstract: A decoding method for booting from a NAND Flash including a booting page storing a plurality of copies of NAND booting information and a plurality of corresponding parities, each parity generated by an predetermined error correction code (ECC) bit number. The decoding method includes reading the booting page, for obtaining a plurality of configuration data and a plurality of ECC data, and performing a voting scheme and an ECC decoding process on the plurality of configuration data and the plurality of ECC data, for obtaining the NAND booting information. Besides, an encoding method for encoding such booting information is disclosed the same.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: May 8, 2012
    Assignee: Mediatek Inc.
    Inventors: Chin-Huo Chu, Horng-Yi Chang, Jia-Horng Shieh
  • Patent number: 8069398
    Abstract: A method for decoding multiword information comprises steps (a) to (e). In step (a), a multiword information cluster, e.g., ECC, including high protective codewords, e.g., BIS, and low protective codewords, e.g., LDC, is provided. In step (b), the high and low protective codewords are stored into a first memory, e.g., DRAM. In step (c), the high protective codewords are decoded to generate high protective word erasure indicators showing whether decoding errors occur. In step (d), the high protective word erasure indicators are stored into a second memory, e.g., SRAM. In step (e), the low protective codewords are decoded. In the meanwhile, an erasure bit for a low protective codeword is marked by finding high protective codewords close to the low protective codeword in the multiword information cluster and looking up the high protective word erasure indicators of the high protective codewords close to the low protective codeword.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: November 29, 2011
    Assignee: Mediatek Inc.
    Inventors: Wen-Yi Wu, Li-Lien Lin, Jia-Horng Shieh
  • Patent number: 7917362
    Abstract: A method for determining a bit boundary of a repetition-coded signal including bits each having a plurality of epochs includes (a) counting the epochs repeatedly from an initial number to a predetermined number in a predetermined time, (b) sensing sign changes in the epochs, (c) recording each sensed sign change with a weighting function to a corresponding counting number of the epoch, and (d) determining the bit boundary according to a result of step (c).
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: March 29, 2011
    Assignee: MediaTek Inc.
    Inventor: Jia-Horng Shieh
  • Publication number: 20100251074
    Abstract: A decoding method for booting from a NAND Flash including a booting page storing a plurality of copies of NAND booting information and a plurality of corresponding parities, each parity generated by an predetermined error correction code (ECC) bit number. The decoding method includes reading the booting page, for obtaining a plurality of configuration data and a plurality of ECC data, and performing a voting scheme and an ECC decoding process on the plurality of configuration data and the plurality of ECC data, for obtaining the NAND booting information. Besides, an encoding method for encoding such booting information is disclosed the same.
    Type: Application
    Filed: March 26, 2009
    Publication date: September 30, 2010
    Inventors: Chin-Huo Chu, Horng-Yi Chang, Jia-Horng Shieh
  • Patent number: 7793198
    Abstract: An integrated apparatus for multi-standard optical media includes a compact disc/digital versatile disc (CD/DVD) processor, a high-definition DVD (HDDVD) processor and a Blu-ray disc (BD) processor; a memory unit connected to the CD/DVD processor, the HDDVD processor and the BD processor to provide a storage resource; and a shared error correction code (ECC) engine for encoding or decoding the CD/DVD data stream, the HDDVD data stream and the BD data stream. Therein, the ECC engine further has a syndrome/parity generator to encode the data stream or to obtain the syndrome information from the data stream; and an erasure generator to obtain the possible error position information from the data stream. Thereby, the complexity and cost of the integrated apparatus can be reduced.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: September 7, 2010
    Assignee: Mediatek Inc.
    Inventors: Jia-Horng Shieh, Jyh-Shin Pan, Li-Lien Lin
  • Patent number: 7791990
    Abstract: A data buffering method used when performing a read operation on an optical storage medium is disclosed. After a first data unit having an unidentifiable and temporarily undeducible ID address is reproduced through the read operation, the method starts storing the first data unit and subsequently reproduced data units into a buffer memory in turn. After a second ID address of a second data unit of the subsequently reproduced data units is identified, the method deduces a target memory address of the buffer memory according to the second ID address and a target ID address. A buffer start pointer is then set according to the deduced target memory address.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: September 7, 2010
    Assignee: MediaTek Inc.
    Inventors: Jia-Horng Shieh, Jin-Bin Yang
  • Publication number: 20090217134
    Abstract: An integrated apparatus for multi-standard optical media includes a compact disc/digital versatile disc (CD/DVD) processor, a high-definition DVD (HDDVD) processor and a Blu-ray disc (BD) processor; a memory unit connected to the CD/DVD processor, the HDDVD processor and the BD processor to provide a storage resource; and a shared error correction code (ECC) engine for encoding or decoding the CD/DVD data stream, the HDDVD data stream and the BD data stream. Therein, the ECC engine further has a syndrome/parity generator to encode the data stream or to obtain the syndrome information from the data stream; and an erasure generator to obtain the possible error position information from the data stream. Thereby, the complexity and cost of the integrated apparatus can be reduced.
    Type: Application
    Filed: April 30, 2009
    Publication date: August 27, 2009
    Inventors: Jia-Horng SHIEH, Jyh-Shin Pan, Li-Lien Lin
  • Patent number: 7543215
    Abstract: An integrated apparatus for multi-standard optical media includes a compact disc/digital versatile disc (CD/DVD) processor, a high-definition DVD (HDDVD) processor and a Blu-ray disc (BD) processor; a memory unit connected to the CD/DVD processor, the HDDVD processor and the BD processor to provide a storage resource; and a shared error correction code (ECC) engine for encoding or decoding the CD/DVD data stream, the HDDVD data stream and the BD data stream. Therein, the ECC engine further has a syndrome/parity generator to encode the data stream or to obtain the syndrome information from the data stream; and an erasure generator to obtain the possible error position information from the data stream. Thereby, the complexity and cost of the integrated apparatus can be reduced.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: June 2, 2009
    Assignee: Mediatek Inc.
    Inventors: Jia-Horng Shieh, Jyh-Shin Pan, Li-Lien Lin
  • Publication number: 20090106535
    Abstract: According to an embodiment of the present invention, a shared processor architecture in a receiver system is disclosed. The receiver system is configured to have a first functional stage and a second functional stage for processing information carried by signals from a first transmitter system and a second transmitter system respectively. The first functional stage and the second functional stage correspond to an identical signal processing function. The shared processor architecture includes a first processor, allocated to the first functional stage and the second functional stage, for processing an output generated from the first functional stage or an output from the second functional stage.
    Type: Application
    Filed: October 17, 2007
    Publication date: April 23, 2009
    Inventors: Chun-Nan Chen, Jia-Horng Shieh
  • Publication number: 20080172535
    Abstract: A method for buffering data when reading an optical disc is disclosed in the present invention. The method includes providing a memory page with a plurality of memory spaces corresponding to a memory space matrix with M rows×N columns, reading data stored in the optical disc to generate a block to be decoded, selecting M rows×N columns of data from the block to be decoded as a sub-block to be decoded, and storing the M rows of data of the sub-block to be decoded into the M rows of memory spaces of the memory space matrix respectively.
    Type: Application
    Filed: December 25, 2007
    Publication date: July 17, 2008
    Inventors: Ching-Wen Hsueh, Li-Lien Lin, Jia-Horng SHIEH
  • Publication number: 20070277080
    Abstract: A method for decoding multiword information comprises steps (a) to (e). In step (a), a multiword information cluster, e.g., ECC, including high protective codewords, e.g., BIS, and low protective codewords, e.g., LDC, is provided. In step (b), the high and low protective codewords are stored into a first memory, e.g., DRAM. In step (c), the high protective codewords are decoded to generate high protective word erasure indicators showing whether decoding errors occur. In step (d), the high protective word erasure indicators are stored into a second memory, e.g., SRAM. In step (e), the low protective codewords are decoded. In the meanwhile, an erasure bit for a low protective codeword is marked by finding high protective codewords close to the low protective codeword in the multiword information cluster and looking up the high protective word erasure indicators of the high protective codewords close to the low protective codeword.
    Type: Application
    Filed: August 10, 2007
    Publication date: November 29, 2007
    Inventors: Wen-Yi Wu, Li-Lien Lin, Jia-Horng Shieh
  • Publication number: 20070250309
    Abstract: A method for determining a bit boundary of a repetition-coded signal including bits each having a plurality of epochs includes (a) counting the epochs repeatedly from an initial number to a predetermined number in a predetermined time, (b) sensing sign changes in the epochs, (c) recording each sensed sign change with a weighting function to a corresponding counting number of the epoch, and (d) determining the bit boundary according to a result of step (c).
    Type: Application
    Filed: April 19, 2006
    Publication date: October 25, 2007
    Inventor: Jia-Horng Shieh
  • Patent number: 7287207
    Abstract: A method for computing parity characters for a codeword of a cyclic code successively generates a sum of an output value and a respective message character of a first message section adjacent to parity characters within a first block. The method then successively multiplies a respective sum by corresponding coefficients of a generator polynomial to generate at least one product. The method further successively multiplies a respective message character of every message section other than the first message section by coefficients of a corresponding shift polynomial to generate a plurality of products, before finally, successively summing corresponding products to generate the output value.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: October 23, 2007
    Assignee: Mediatek Incorporation
    Inventor: Jia-Horng Shieh
  • Patent number: 7284183
    Abstract: A method for decoding multiword information comprises steps (a) to (h). In step (a), a multiword information cluster including high protective words and low protective words is provided, wherein the multiword information, high protective words and low protective words can be ECC data, BIS data and LDC data, respectively. In step (b), the low protective words are partitioned into multiple groups. In step(c), the low protective words are de-interleaved, so as to generate a low protective word cluster including multiple segments corresponding to the multiple groups. In step (d), any error of the low protective words is detected, so as to generate segment erasure indicators with localities. In step (e), the low protective words and the segment erasure indicators are stored into a first memory, e.g., a DRAM. In step (f), the segment erasure indicators are stored into a second memory, e.g., a SRAM. In step (g), erasure bits of the low protective word are generated based on the segment erasure indicators.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: October 16, 2007
    Assignee: Mediatek Inc.
    Inventors: Wen-Yi Wu, Li-Lien Lin, Jia-Horng Shieh