Patents by Inventor Jia-Horng Shieh

Jia-Horng Shieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6742157
    Abstract: The present invention provides a decoding system and method for an optical disk storage device to receive and decode the data of the disk. The present invention does not need to increase the clock frequency and the bus width of the decoding system, it can effectively decrease the access times to the data buffer and the system response time by changing the structure of the conventional decoding system, in this way the present invention increases the parallel processing capability and the decoding speed of the system, thus, it can enhance the entire device to become a high speed optical storage device.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: May 25, 2004
    Assignee: Acer Laboratories Inc.
    Inventors: Jia-Horng Shieh, Te-Wei Chen
  • Patent number: 6742156
    Abstract: The present invention provides a decoding system and method for an optical disk for receiving and decoding data from the disk. The present invention does not need to increase the clock frequency and the bus width of the decoding system, it can effectively decrease the access times to the data buffer and the system response time by changing the structure of the conventional decoding system, in this way the present invention increases the parallel process capability and the speed of the decoding, thus, it can become a high speed DVD.
    Type: Grant
    Filed: April 9, 2001
    Date of Patent: May 25, 2004
    Assignee: Acer Laboratories Inc.
    Inventor: Jia-Horng Shieh
  • Patent number: 6721917
    Abstract: A method and system for optical disk decoding, which is used for decoding an error correction code (ECC) block. The method and system can determine whether it is to perform the outer code decoding or the inner code decoding first. In addition, during the inner code decoding, the EDC checking is performed. After the inner code decoding or the outer code decoding, it is determined whether one of the following is true: (1) the error correction of the ECC block is complete; (2) the number of errors is over the limitation of error correction so that the error-correcting operation cannot be performed; or (3) the decoding operations are performed for a number of times but the correction is not complete. If one of the conditions is true, the inner code decoding or the outer code decoding is terminated. Next, the descrambling and the EDC checking are performed. Being passed in the EDC checking, the data are sent to a host; otherwise, re-transmission of the corresponding data for processing is required.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: April 13, 2004
    Assignee: Acer Laboratories, Inc.
    Inventor: Jia-Horng Shieh
  • Patent number: 6674816
    Abstract: A Viterbi detector for extending tolerable extent of DC bias is disclosed. By adding a fixed value to a reference level or subtracting a fixed value from the reference level, the tolerable extent of the DC bias of the input signal is increased. According to the invention, this effect can be achieved with a control circuit and the tolerable extent of the DC bias can be increased by about 100% as compared with the tolerable extent of the DC bias in the conventional approaches.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: January 6, 2004
    Assignee: Acer Laboratories Inc.
    Inventor: Jia-Horng Shieh
  • Patent number: 6618331
    Abstract: In a method and apparatus for accessing target data in a data storage medium, identification data in an initial data sector is verified before a target data sector that corresponds to starting location of the target data in the data storage medium can be found. Therefore, accuracy of the target data can be ensured before decoding of the target data is performed to result in increased efficiency and reduced idle time.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: September 9, 2003
    Inventor: Jia-Horng Shieh
  • Publication number: 20030112715
    Abstract: In a method and apparatus for accessing target data in a data storage medium, identification data in an initial data sector is verified before a target data sector that corresponds to starting location of the target data in the data storage medium can be found. Therefore, accuracy of the target data can be ensured before decoding of the target data is performed to result in increased efficiency and reduced idle time.
    Type: Application
    Filed: December 14, 2001
    Publication date: June 19, 2003
    Inventor: Jia-Horng Shieh
  • Publication number: 20020166096
    Abstract: The present invention provides an error correction method that is used in full response read channels. This method includes the steps of: obtaining a read signal from a storage medium and converting the read signal into channel bits that are recorded in the storage medium, such as a DVD disk, in the NRZI format; and using the Viterbi detector to determine whether bit state transitions in the channel bits occur within a predetermined run-lengths of the RLL codes. If transitions occur within the predetermined run-lengths, then the values of the bits with state transitions are corrected.
    Type: Application
    Filed: October 31, 2001
    Publication date: November 7, 2002
    Applicant: Acer Laboratories, Inc.
    Inventor: Jia-Horng Shieh
  • Publication number: 20020133779
    Abstract: The present invention provides a decoding system and method for an optical disk storage device to receive and decode the data of the disk. The present invention does not need to increase the clock frequency and the bus width of the decoding system, it can effectively decrease the access times to the data buffer and the system response time by changing the structure of the conventional decoding system, in this way the present invention increases the parallel processing capability and the decoding speed of the system, thus, it can enhance the entire device to become a high speed optical storage device.
    Type: Application
    Filed: April 9, 2001
    Publication date: September 19, 2002
    Inventor: Jia-Horng Shieh
  • Publication number: 20020104055
    Abstract: The present invention provides a decoding system and method for an optical disk for receiving and decoding data from the disk. The present invention does not need to increase the clock frequency and the bus width of the decoding system, it can effectively decrease the access times to the data buffer and the system response time by changing the structure of the conventional decoding system, in this way the present invention increases the parallel process capability and the speed of the decoding, thus, it can become a high speed DVD.
    Type: Application
    Filed: April 9, 2001
    Publication date: August 1, 2002
    Inventor: Jia-Horng Shieh
  • Publication number: 20020073378
    Abstract: A Viterbi detector for use in a partial response maximum likelihood (PRML) signal processing apparatus. The Viterbi detector can be used for different partial response (PR) equalizations with different parameters, and can be used for different PRML signal processing apparatuses such as high speed optical disk systems. The Viterbi detector includes an input buffer, a branch metric calculation unit, an add-compare-select circuit, a path memory unit, and a clock buffer. The Viterbi is designed based on a union trellis diagram relation obtained by combining trellis diagram relations associated with the PR equalizations with the parameters. According to the invention, the Viterbi detector has advantages of saving hardware space and conveniently changing PR equalizations with different parameters.
    Type: Application
    Filed: November 2, 2001
    Publication date: June 13, 2002
    Inventor: Jia-Horng Shieh
  • Publication number: 20020062469
    Abstract: The present invention provides a decoding system and method for an optical disk storage device to receive and decode the data of the disk. The present invention does not need to increase the clock frequency and the bus width of the decoding system, it can effectively decrease the access times to the data buffer and the system response time by changing the structure of the conventional decoding system, in this way the present invention increases the parallel processing capability and the decoding speed of the system, thus, it can enhance the entire device to become a high speed optical storage device.
    Type: Application
    Filed: April 6, 2001
    Publication date: May 23, 2002
    Inventors: Jia-Horng Shieh, Te-Wei Chen
  • Publication number: 20020021772
    Abstract: A Viterbi detector for extending tolerable extent of DC bias is disclosed. By adding a fixed value to a reference level or subtracting a fixed value from the reference level, the tolerable extent of the DC bias of the input signal is increased. According to the invention, this effect can be achieved with a control circuit and the tolerable extent of the DC bias can be increased by about 100% as compared with the tolerable extent of the DC bias in the conventional approaches.
    Type: Application
    Filed: December 21, 2000
    Publication date: February 21, 2002
    Inventor: Jia-Horng Shieh
  • Publication number: 20010056562
    Abstract: A method and system for optical disk decoding, which is used for decoding an error correction code (ECC) block. The method and system can determine whether it is to perform the outer code decoding or the inner code decoding first. In addition, during the inner code decoding, the EDC checking is performed. After the inner code decoding or the outer code decoding, it is determined whether one of the following is true: (1) the error correction of the ECC block is complete; (2) the number of errors is over the limitation of error correction so that the error-correcting operation cannot be performed; or (3) the decoding operations are performed for a number of times but the correction is not complete. If one of the conditions is true, the inner code decoding or the outer code decoding is terminated. Next, the descrambling and the EDC checking are performed. Being passed in the EDC checking, the data are sent to a host; otherwise, re-transmission of the corresponding data for processing is required.
    Type: Application
    Filed: December 22, 2000
    Publication date: December 27, 2001
    Inventor: Jia-Horng Shieh