Patents by Inventor Jia-Rong Wu
Jia-Rong Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240074209Abstract: A semiconductor device includes a substrate having a logic region and a magnetoresistive random access memory (MRAM) region, a MTJ on the MRAM region, a metal interconnection on the MTJ, and a blocking layer on the metal interconnection. Preferably, the blocking layer includes a stripe pattern according to a top view and the blocking layer could include metal or a dielectric layer.Type: ApplicationFiled: November 2, 2023Publication date: February 29, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Jia-Rong Wu, I-Fan Chang, Rai-Min Huang, Ya-Huei Tsai, Yu-Ping Wang
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Publication number: 20230418000Abstract: An optical-fiber connector includes a coupling member, a core component, a sleeve member, a metal retaining member, and a pressing member. The core component is in the receiving space. The metal retaining member is connected to one of two ends of the coupling member. The elastic arm of the metal retaining member inclinedly extends toward the other end of the coupling member. Two sides of the elastic arm have a plurality of retaining structures. The sleeve member is at the other end of the coupling member and is connected to the pressing member. The pressing portion of the pressing member extends toward the elastic arm. The metal retaining member is adapted to be buckled with an adapter, so that the service life of the optical-fiber connector can be prolonged.Type: ApplicationFiled: June 24, 2022Publication date: December 28, 2023Inventors: Jia-Rong Wu, Tsung-Yao Hsu
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Publication number: 20230417999Abstract: An optical-fiber connector with protective cap includes a connector body and a retaining member which are fitted over an optical-fiber sleeve member, a fixation member, and a spring. The protective cap is fitted over the retaining member and the connector body. Each second engaging portion of the protective cap is engaged with a corresponding first engaging portion of the connector body. After the protective cap draws the optical-fiber connector to pass through a guiding pipeline, the protective cap is removed, and the optical-fiber connector is assembled with a fixation sleeve and a coupling cap to form a standard connector.Type: ApplicationFiled: June 24, 2022Publication date: December 28, 2023Inventors: Jia-Rong Wu, Tsung-Yao Hsu
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Patent number: 11849592Abstract: A semiconductor device includes a substrate having a logic region and a magnetoresistive random access memory (MRAM) region, a MTJ on the MRAM region, a metal interconnection on the MTJ, and a blocking layer on the metal interconnection. Preferably, the blocking layer includes a stripe pattern according to a top view and the blocking layer could include metal or a dielectric layer.Type: GrantFiled: August 15, 2022Date of Patent: December 19, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Jia-Rong Wu, I-Fan Chang, Rai-Min Huang, Ya-Huei Tsai, Yu-Ping Wang
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Patent number: 11835773Abstract: The disclosure provides an optic fiber connector, including a ferrule, a holder, a connector body having a plurality of first locking slots, a spring sleeved onto the holder, and a retainer having a plurality of locking hooks. The ferrule is assembled to the holder. The spring, the holder, and the ferrule are received in a space formed between the retainer and the connector body by locking the locking hooks with the locking slots respectively, wherein the spring is compressed by locking such that the retainer, the holder, the spring, and the connector body are abutted with each other.Type: GrantFiled: March 30, 2022Date of Patent: December 5, 2023Assignee: ACON OPTICS COMMUNICATIONS INC.Inventors: Jia Rong Wu, Tsung Yao Hsu
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Patent number: 11800723Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a first diffusion region and a second diffusion region extending along a first direction on a substrate, a first contact plug extending along a second direction from the first diffusion region to the second diffusion region on the substrate, a first gate pattern and a second gate pattern extending along the second direction adjacent to one side of the first contact plug, and a third gate pattern and a fourth gate pattern extending along the second direction adjacent to another side of the first contact plug.Type: GrantFiled: September 13, 2020Date of Patent: October 24, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: I-Fan Chang, Hung-Yueh Chen, Rai-Min Huang, Jia-Rong Wu, Yu-Ping Wang
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Publication number: 20230337551Abstract: A method for fabricating semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) on a substrate, forming a first spin orbit torque (SOT) layer on the MTJ, forming an inter-metal dielectric (IMD) layer around the first SOT layer, forming a second SOT layer on the IMD layer, forming a first hard mask on the second SOT layer, patterning the first hard mask along a first direction, and then patterning the first hard mask along a second direction.Type: ApplicationFiled: May 13, 2022Publication date: October 19, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Jia-Rong Wu, Chi-Hsuan Cheng, Rai-Min Huang, Po-Kai Hsu
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Patent number: 11754790Abstract: An exchangeable optic fiber connector assembly, including a pair of optic fiber connectors and a switching structure, is provided. Each optic fiber connector has a first locking portion and a first stopping portion. The switching structure has a pair of guiding slots. The optic fiber connectors respectively pass through the guiding slots to be movable and rotatable along the corresponding guiding slots. The switching structure further has a plurality of second locking portions and a plurality of second stopping portions disposed at two opposite ends of each guiding slot. Each optic fiber connector is locked with one of the second locking portions through the first locking portion, and the second stopping portion next to the locked second locking portion is located on a moving path of the first stopping portion.Type: GrantFiled: September 7, 2022Date of Patent: September 12, 2023Assignee: ACON OPTICS COMMUNICATIONS INC.Inventors: Jia Rong Wu, Tsung Yao Hsu
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Publication number: 20230282261Abstract: The present invention provides a spin-orbit torque magnetic random access memory (SOT-MRAM) circuit, including a read transistor pair with two read transistors in parallel, a write transistor pair with two write transistors in parallel, a SOT memory cell with a magnetic tunnel junction (MTJ) and a SOT layer, wherein one end of the MTJ is connected to the source of the read transistor pair and the other end of the MTJ is connected to the SOT layer, and one end of the SOT layer is connected to a source line and the other of the SOT layer is connected to the source of the write transistor pair, a read bit line is connected to the drain of the read transistor pair and a write bit line is connected to the drain of the read transistor.Type: ApplicationFiled: March 29, 2022Publication date: September 7, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Jen-Yu Wang, Li-Ping Huang, Yi-Ting Wu, Jia-Rong Wu, Chun-Hsien Huang
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Publication number: 20230270017Abstract: A method for fabricating a semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) on a substrate, forming a spin orbit torque (SOT) layer on the MTJ, forming an inter-metal dielectric (IMD) layer around the MTJ and the SOT layer, forming a first hard mask on the IMD layer, forming a semiconductor layer on the first hard mask, and then patterning the first hard mask.Type: ApplicationFiled: March 24, 2022Publication date: August 24, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Hung-Yi Wu, Jia-Rong Wu, Yu-Hsiang Lin, Yi-Wen Chen, Kun-Sheng Yang
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Publication number: 20230247914Abstract: The present invention provides a semiconductor device, the semiconductor device includes a metal interconnection on a substrate, in which a top view of the metal interconnection comprises a quadrilateral; and a magnetic tunneling junction (MTJ) on the metal interconnection, in which a top view of the MTJ comprises a circular shape.Type: ApplicationFiled: April 11, 2023Publication date: August 3, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Jia-Rong Wu, Rai-Min Huang, I-Fan Chang, Ya-Huei Tsai, Yu-Ping Wang
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Publication number: 20230247915Abstract: The present invention provides a semiconductor device, the semiconductor device includes a metal interconnection on a substrate, in which a top view of the metal interconnection comprises a quadrilateral; and a magnetic tunneling junction (MTJ) on the metal interconnection, in which a top view of the MTJ comprises a circular shape, an area of the MTJ is smaller than an area of the metal interconnection.Type: ApplicationFiled: April 11, 2023Publication date: August 3, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Jia-Rong Wu, Rai-Min Huang, I-Fan Chang, Ya-Huei Tsai, Yu-Ping Wang
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Patent number: 11665978Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first patterned mask on the first IMD layer, in which the first patterned mask includes a first slot extending along a first direction; forming a second patterned mask on the first patterned mask, in which the second patterned mask includes a second slot extending along a second direction and the first slot intersects the second slot to form a third slot; and forming a first metal interconnection in the third slot.Type: GrantFiled: July 15, 2020Date of Patent: May 30, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Jia-Rong Wu, Rai-Min Huang, I-Fan Chang, Ya-Huei Tsai, Yu-Ping Wang
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Publication number: 20230157182Abstract: A method for fabricating semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) stack on a substrate; forming a top electrode on the MTJ stack; performing a first patterning process to remove the MTJ stack along a first direction; and performing a second patterning process to remove the MTJ stack along a second direction to form MTJs on the substrate.Type: ApplicationFiled: January 17, 2023Publication date: May 18, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Jia-Rong Wu, Rai-Min Huang, Ya-Huei Tsai, I-Fan Chang, Yu-Ping Wang
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Publication number: 20230097105Abstract: An exchangeable optic fiber connector assembly, including a pair of optic fiber connectors and a switching structure, is provided. Each optic fiber connector has a first locking portion and a first stopping portion. The switching structure has a pair of guiding slots. The optic fiber connectors respectively pass through the guiding slots to be movable and rotatable along the corresponding guiding slots. The switching structure further has a plurality of second locking portions and a plurality of second stopping portions disposed at two opposite ends of each guiding slot. Each optic fiber connector is locked with one of the second locking portions through the first locking portion, and the second stopping portion next to the locked second locking portion is located on a moving path of the first stopping portion.Type: ApplicationFiled: September 7, 2022Publication date: March 30, 2023Applicant: ACON OPTICS COMMUNICATIONS INC.Inventors: Jia Rong Wu, Tsung Yao Hsu
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Publication number: 20220392954Abstract: A semiconductor device includes a substrate having a logic region and a magnetoresistive random access memory (MRAM) region, a MTJ on the MRAM region, a metal interconnection on the MTJ, and a blocking layer on the metal interconnection. Preferably, the blocking layer includes a stripe pattern according to a top view and the blocking layer could include metal or a dielectric layer.Type: ApplicationFiled: August 15, 2022Publication date: December 8, 2022Applicant: UNITED MICROELECTRONICS CORP.Inventors: Jia-Rong Wu, I-Fan Chang, Rai-Min Huang, Ya-Huei Tsai, Yu-Ping Wang
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Publication number: 20220326453Abstract: The disclosure provides an optic fiber connector, including a ferrule, a holder, a connector body having a plurality of first locking slots, a spring sleeved onto the holder, and a retainer having a plurality of locking hooks. The ferrule is assembled to the holder. The spring, the holder, and the ferrule are received in a space formed between the retainer and the connector body by locking the locking hooks with the locking slots respectively, wherein the spring is compressed by locking such that the retainer, the holder, the spring, and the connector body are abutted with each other.Type: ApplicationFiled: March 30, 2022Publication date: October 13, 2022Applicant: ACON OPTICS COMMUNICATIONS INC.Inventors: Jia Rong Wu, Tsung Yao Hsu
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Patent number: 11456331Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a logic region and a magnetoresistive random access memory (MRAM) region, forming a magnetic tunneling junction (MTJ) on the MRAM region, forming a metal interconnection on the MTJ, forming a dielectric layer on the metal interconnection, patterning the dielectric layer to form openings, and forming the blocking layer on the patterned dielectric layer and the metal interconnection and into the openings.Type: GrantFiled: April 23, 2020Date of Patent: September 27, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Jia-Rong Wu, I-Fan Chang, Rai-Min Huang, Ya-Huei Tsai, Yu-Ping Wang
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Publication number: 20220052110Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a first diffusion region and a second diffusion region extending along a first direction on a substrate, a first contact plug extending along a second direction from the first diffusion region to the second diffusion region on the substrate, a first gate pattern and a second gate pattern extending along the second direction adjacent to one side of the first contact plug, and a third gate pattern and a fourth gate pattern extending along the second direction adjacent to another side of the first contact plug.Type: ApplicationFiled: September 13, 2020Publication date: February 17, 2022Inventors: I-Fan Chang, Hung-Yueh Chen, Rai-Min Huang, Jia-Rong Wu, Yu-Ping Wang
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Publication number: 20210391531Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first patterned mask on the first IMD layer, in which the first patterned mask includes a first slot extending along a first direction; forming a second patterned mask on the first patterned mask, in which the second patterned mask includes a second slot extending along a second direction and the first slot intersects the second slot to form a third slot; and forming a first metal interconnection in the third slot.Type: ApplicationFiled: July 15, 2020Publication date: December 16, 2021Inventors: Jia-Rong Wu, Rai-Min Huang, I-Fan Chang, Ya-Huei Tsai, Yu-Ping Wang