Patents by Inventor Jia-Rong Wu

Jia-Rong Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140191358
    Abstract: A shallow trench isolation (STI) and method of forming the same is provided. The STI structure comprises an upper insulating portion and a lower insulating portion, wherein the lower insulating portion includes a first insulator and an insulating layer surrounding the first insulator, the upper insulating portion includes a second insulator and a buffer layer surrounding the second insulator. A part of the buffer layer interfaces between the first insulator and the second insulator, and the outer sidewall of the buffer layer and the sidewall of the first insulator are leveled.
    Type: Application
    Filed: January 8, 2013
    Publication date: July 10, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: En-Chiuan Liou, Po-Chao Tsao, Chia-Jui Liang, Jia-Rong Wu
  • Patent number: 8765546
    Abstract: A method for fabricating fin-shaped field-effect transistor (FinFET) is disclosed. The method includes the steps of: providing a substrate; forming a fin-shaped structure on the substrate; forming a first gate structure on the fin-shaped structure; forming a first epitaxial layer in the fin-shaped structure adjacent to the first gate structure; forming an interlayer dielectric layer on the first gate structure and the first epitaxial layer; forming an opening in the interlayer dielectric layer to expose the first epitaxial layer; forming a silicon cap on the first epitaxial layer; and forming a contact plug in the opening.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: July 1, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Ching-Wen Hung, Jia-Rong Wu, Chih-Sen Huang