Patents by Inventor Jian Guo

Jian Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9778902
    Abstract: Software Digital Front End (SoftDFE) signal processing techniques are provided. One or more digital front end (DFE) functions are performed on a signal in software by executing one or more specialized instructions on a processor to perform the one or more digital front end (DFE) functions on the signal, wherein the processor has an instruction set comprised of one or more of linear and non-linear instructions. A block of samples comprised of a plurality of data samples is optionally formed and the digital front end (DFE) functions are performed on the block of samples. The specialized instructions can include a vector convolution function, a complex exponential function, an xk function, a vector compare instruction, a vector max( ) instruction, a vector multiplication instruction, a vector addition instruction, a vector sqrt( ) instruction, a vector 1/x instruction, and a user-defined non-linear instruction.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: October 3, 2017
    Assignee: Intel Corporation
    Inventors: Kameran Azadet, Chengzhou Li, Albert Molina, Joseph H. Othmer, Steven C. Pinault, Meng-Lin Yu, Joseph Williams, Ramon Sanchez Perez, Jian-Guo Chen
  • Patent number: 9778512
    Abstract: A method for manufacturing an array substrate includes steps of: forming a pattern which includes a scanning line and a gate on a base substrate (301); forming a gate insulating layer on the pattern which includes the scanning line and the gate; forming a pattern which includes an active layer, a data line and a spacer matrix on the gate insulating layer; forming a passivation layer on the pattern which includes the active layer, the data line and the spacer matrix; dry etching the passivation layer to form a via hole which exposes the spacer matrix; under effect of an electric field generated between the spacer matrix exposed from the via hole and an etching gas, products obtained during the etching is induced to be deposited on the exposed surface of the spacer matrix so as to form a spacer. An array substrate and a display pane are further provided.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: October 3, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jian Guo, Jiantao Liu
  • Publication number: 20170278068
    Abstract: An electronic business card exchange method and apparatus. The method comprises: if a first electronic business card terminal on which a first electronic business card is displayed receives a first touch signal, the first electronic business card terminal turns the first electronic business card upside down to enable the business card to face the other party, and establishes a data connection to a second electronic business card terminal (101); if the first electronic business card terminal on which the first electronic business card that has been turned is displayed receives a second touch signal, the first electronic business card terminal sends the first electronic business card to the second electronic card terminal through the data connection (103); and through the data connection, the first electronic business card terminal receives and displays a second electronic business card sent by the second electronic business card terminal (104).
    Type: Application
    Filed: August 28, 2015
    Publication date: September 28, 2017
    Inventors: Jian Hua XING, Kai REN, Ping WANG, Ye ZHAO, Jian Guo WU
  • Patent number: 9773938
    Abstract: An embodiment of the present invention provides a manufacturing method of an amorphous-silicon flat-panel X-ray sensor; the method reduces the number of mask plates to be used, simplifies the production processes, saves production costs, while also improving the product yield. The manufacturing method comprises: on a substrate, after a gate scan line is formed, forming a data line, a TFT switch element and a photosensitive element through one patterning process, wherein on the mask plate used in the patterning process, a region corresponding to a channel of the TFT switch element is semi-transmissive, whereas regions respectively corresponding to the data line, the photosensitive element and the portion of the TFT switch element other than the channel thereof are non-transmissive; thereafter, on the substrate formed with the TFT switch element and the photosensitive element, a passivation layer and a bias line are formed.
    Type: Grant
    Filed: October 29, 2012
    Date of Patent: September 26, 2017
    Assignee: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Shaoying Xu, Zhenyu Xie, Jian Guo, Xu Chen
  • Publication number: 20170271630
    Abstract: The secondary battery of the present invention includes: a top cover, a first electrode terminal, a second electrode terminal, an electrode-tab pad-plate, an electrode assembly, a first electrode-tab and a second electrode-tab; the first and second electrode terminal are arranged on the top cover, the electrode-tab pad-plate is a strip-plate shaped structure, and is located between the top cover and electrode assembly, the first electrode-tab includes a connecting part, a folding part and a welding part, the connecting part is located at upside of the electrode-tab pad-plate, the welding part is located at downside thereof, the connecting part is connected with the electrode assembly, the welding part is connected with the first electrode terminal, the folding part is connected with the connecting part and welding part bypassing the electrode-tab pad-plate; the second electrode terminal is connected with the electrode assembly through the second electrode-tab.
    Type: Application
    Filed: June 21, 2016
    Publication date: September 21, 2017
    Inventors: Jian GUO, Quankun LI, Pinghua DENG, Peng WANG, Lingbo ZHU, Qingkui CHI
  • Publication number: 20170271644
    Abstract: The present application relates to an electrode tab pad plate, the electrode tab pad plate is of a fork shape, including a joint part and two first fork feet, the two first fork feet are arranged in parallel, and a first gap is provided between the two first fork feet, both the first fork feet are connected with the joint part. The electrode tab pad plate provided by the present application, through gathering the electrode tabs at inner sides of the electrode tab pad plate, so that the electrode tabs are gathered toward the direction away from the battery housing, so as to guarantee the safety performance of the Li-ion battery, since the space occupied by the electrode tab pad plate is small, which facilitates the improvement of the cell capacity, thereby improving the performance of the battery.
    Type: Application
    Filed: September 7, 2016
    Publication date: September 21, 2017
    Applicant: CONTEMPORARY AMPEREX TECHNOLOGY CO., LIMITED
    Inventors: Jian GUO, Quankun LI, Pinghua DENG, Peng WANG, Lingbo ZHU
  • Patent number: 9752877
    Abstract: An electronic device may be provided with an electronic compass. The electronic compass may include magnetic sensors. The magnetic sensors may include thin-film magnetic sensor elements such as giant magnetoresistance sensor elements. Magnetic flux concentrators may be used to guide magnetic fields through the sensor elements. To reduce offset in the electronic compass, the magnetic flux concentrators may be demagnetized by applying a current to a coil in the housing. The coil may be formed from loops of metal traces within a printed circuit or other loops of conductive paths. Magnetic flux concentrators may have ring shapes. A ring-shaped magnetic flux concentrator may be formed from multiple thin stacked layers of soft magnetic material separated by non-magnetic material.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: September 5, 2017
    Assignee: Apple Inc.
    Inventors: Manoj K Bhattacharyya, Christopher E. Balcells, Jian Guo, Peter G. Hartwell
  • Patent number: 9749741
    Abstract: Methods and devices for reducing intermodulation distortion are described herein. In response to receiving an audio input signal, N filtered audio signals may be generated by a filter bank, corresponding to N different frequency bands. The N filtered audio signals may be delayed by a delay time D, and a determination of whether an audio frame of the filtered audio signals includes an audio event or a non-audio event. A signal level estimation may then be determined, the signal level estimation indicating an expander, a compressor, or no compression effects being present. An amount of gain is determined and applied to the delayed audio signals, which are summed across the N frequency bands to generate a full-band audio signal. In some embodiments, the full-band audio signal may be applied to a limiter to reduce any audio clipping, and a final audio signal may be generated.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: August 29, 2017
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Jun Yang, Colin Randall McEnroe, Jian Guo
  • Patent number: 9720076
    Abstract: A time of flight imaging system includes a light source coupled to emit light pulses to an object in response a light source modulation signal generated in response to a reference modulation signal. Each pixel cell of a time of flight pixel cell array is coupled to sense light pulses reflected from the object in response a pixel modulation signal. A programmable pixel delay line circuit is coupled to generate the pixel modulation signal with a variable pixel delay programmed in response to a pixel programming signal. A control circuit is coupled to receive pixel information from the time of flight pixel array representative of the sensed reflected light pulses. The control circuit is coupled to vary the pixel programming signal during a calibration mode to synchronize the light pulses emitted from the light source with the pulses of the pixel modulation signal.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: August 1, 2017
    Assignee: OmniVision Technologies, Inc.
    Inventors: Jian Guo, Rui Wang, Tiejun Dai
  • Patent number: 9716117
    Abstract: The invention relates to the field of display technologies, and discloses a method for producing a via, a method for producing an array substrate, an array substrate and a display device to prevent a chamfer from being formed in producing the via, to promote the product quality and improve the display effect of the display device. The method for producing a via comprises: employing a first etching process to partially etch a top film layer in an area that needs to form a via above an electrode, wherein the vertical etching amount achieved by employing the first etching process is less than the thickness of the top film layer; and employing a second etching process for which the vertical etching rate is larger than the lateral etching rate to etch the remaining part in the area that needs to form a via, until the electrode is exposed.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: July 25, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Changjiang Yan, Kai Lu, Jian Guo, Zhenyu Xie
  • Publication number: 20170207437
    Abstract: The invention provides a secondary battery which comprises a cap plate and at least one cell. The secondary battery further comprises connecting pieces, each connecting piece is parallel to the cap plate and positioned at an inside of the cap plate in a thickness direction of the cap plate, a longitudinal direction of each connecting piece is parallel to a length direction of the cap plate, a transverse direction of each connecting piece is parallel to a width direction of the cap plate. Each connecting piece has: a tab welding portion for being welded to the corresponding tab of each cell; and an electrode terminal welding portion connected to the tab welding portion along the longitudinal direction of each connecting piece for being welded to the corresponding electrode terminal of the cap plate so as to electrically connect the corresponding electrode terminal and the corresponding tab of each cell.
    Type: Application
    Filed: January 4, 2017
    Publication date: July 20, 2017
    Inventors: Jian Guo, Quankun Li, Pinghua Deng, Lingbo Zhu, Qingkui Chi
  • Publication number: 20170192294
    Abstract: The present application discloses a mother substrate comprising a first region comprising a plurality of display substrate units; and a second region; the first region comprises a buffer layer on and in contact with a base substrate, the second region comprises a mat layer on and in contact with the base substrate for reducing segment difference between the first region and the second region.
    Type: Application
    Filed: February 22, 2016
    Publication date: July 6, 2017
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Jian Guo
  • Patent number: 9690211
    Abstract: The present invention provides an exposure system including a light source and a carrier which are arranged opposite to each other. The carrier is used for placing a to-be-exposed film, and the to-be-exposed film is to be exposed to light emitted from the light source. The exposure system further includes a thickness measurement unit and a light intensity adjustment unit which are electrically connected to each other. The thickness measurement unit is used for measuring thicknesses of different regions of the to-be-exposed film, and the light intensity adjustment unit is used for adjusting exposure-light intensities of different regions of the to-be-exposed film according to the thicknesses of corresponding regions of the to-be-exposed film measured by the thickness measurement unit.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: June 27, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Dawei Shi, Jian Guo
  • Publication number: 20170134864
    Abstract: An apparatus including a frame; a coil movably connected to the frame; and a magnet system connected to the frame. The magnet system includes at least one magnet and at least one pole piece connected to the at least one magnet. The at least one pole piece include a magnet pot. A cross sectional length of the magnet pot and the frame are substantially the same in at least one cross sectional location.
    Type: Application
    Filed: January 13, 2017
    Publication date: May 11, 2017
    Inventors: Shengrong SHI, Yuanjia YANG, Jian GUO, Oscar LOPEZ
  • Patent number: 9647008
    Abstract: The present application discloses a method of fabricating an array substrate comprising forming a via extending through a first insulating layer and a second insulating layer, the via comprising a first sub-via in the first insulating layer and the second sub-via in a second insulating layer; mobilizing a portion of first insulating layer material surrounding the first sub-via; and distributing the mobilized portion of the first insulating layer material over a sidewall of the second sub-via.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: May 9, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Jian Guo
  • Patent number: 9620578
    Abstract: An array substrate, a manufacture method of the array substrate, and a display panel are configured to achieve a combination of solar energy technology and the OLED display technology. The array substrate includes substrate, scanning lines, data lines, a thin film transistor (TFT), a common electrode and a pixel electrode. The array substrate further includes a light-emitting structure configured to provide a backlight source, a solar cell structure and a power output line. The light-emitting structure is provided between the common electrode and the pixel electrode. The solar cell structure is provided between the substrate and the common electrode. The power output line is provided in a same layer as the common electrode and is electrically connected to the solar cell structure so as to transmit electric energy generated by the solar cell structure to an external circuit.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: April 11, 2017
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Optoelectronics Technology Co., Ltd.
    Inventors: Jiaxiang Zhang, Jian Guo, Xu Chen
  • Patent number: 9611278
    Abstract: A compound of Formula I or a pharmaceutically acceptable salt thereof, are capable of modulating the body's production of cyclic guanosine monophosphate (“cGMP”) and are generally suitable for the therapy and prophylaxis of diseases which are associated with a disturbed cGMP balance. The invention furthermore relates to processes for preparing compounds of Formula I, or a pharmaceutically acceptable salt thereof, for their use in the therapy and prophylaxis of the abovementioned diseases and for preparing pharmaceuticals for this purpose, and to pharmaceutical preparations which comprise compounds of Formula I or a pharmaceutically acceptable salt thereof.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: April 4, 2017
    Assignee: Merck Sharp & Dohme Corp.
    Inventors: Xiaoqing Han, Alan Whitehead, Subharekha Raghavan, Jonathan Groeper, Jian Guo, Yong Zhang
  • Publication number: 20170090003
    Abstract: Systems, methods, and computer-readable media for efficiently testing sensor assemblies are provided. A test station may be operative to test a three-axis magnetometer sensor assembly by holding the assembly at each one of three test orientations with respect to an electromagnet axis. At each particular test orientation for each particular sensor axis, a difference may be determined between any magnetic field sensed by that sensor axis during the application of a first magnetic field along the electromagnet axis and any magnetic field sensed by that sensor axis during the application of a second magnetic field along the electromagnet axis. Those determined differences may be leveraged with the magnitudes of the first and second magnetic fields and the vector component of the electromagnet axis on each one of the sensor axes at each one of the test orientations to determine the sensitivity performances for each one of the sensor axes.
    Type: Application
    Filed: August 12, 2016
    Publication date: March 30, 2017
    Inventor: Jian Guo
  • Patent number: 9607626
    Abstract: A reconfigurable filter bank system that has an asymmetrical tree structure with multiple stages to generate multiband outputs. Each stage may include cascaded low-pass filters (LPFs), cascaded high-pass filters (HPFs) and/or all-pass filter(s) (APF(s)) having identical phase responses. As the cascaded LPFs, cascaded HPFs and APF(s) have identical phase responses, each frequency band of the multiband output may have an identical phase shift such that the frequency bands are in-phase and can be added together. The multiband outputs of the reconfigurable filter bank may have near-perfect reconstruction (e.g., small number of cross-band ripples) and therefore only minor distortion. In addition, the number of frequency bands and corresponding non-uniform bandwidths (e.g., frequency ranges) may be user-adjustable and/or reconfigurable during device operation. Further, the reconfigurable filter bank may have reduced computational complexity and/or latency.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: March 28, 2017
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Jun Yang, Colin Randall McEnroe, Jian Guo
  • Patent number: 9583508
    Abstract: The present invention discloses an array substrate, a preparation method for the array substrate, and a display device, wherein the array substrate comprises a gate electrode, a gate insulation layer, an active layer, a source electrode and a drain electrode, and a pixel electrode arranged on a substrate, the active layer includes an electric conduction area, a coverage area covered by the source electrode and the drain electrode, and an exposure area surrounding the coverage area, and the pixel electrode is lapped on the upper surfaces of the drain electrode, the exposure area of the active layer, and the gate insulation layer. According to the present invention, the pixel electrode breaks in the area, with the large gradient angle, of the drain electrode caused by slip-down due to gravity can be avoided, and the lap joint for the pixel electrode and the drain electrode is effectively facilitated.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: February 28, 2017
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS CO., LTD.
    Inventors: Xiaohui Jiang, Jian Guo, Jiaxiang Zhang, Zongmin Tian