Abstract: An inverter and an over current protection method thereof are provided. The inverter includes an inverting circuit, a filtering capacitor and an over current protection circuit. The inverting circuit is configured to convert a DC input voltage into an AC output voltage and provide the AC output voltage to a load. The filtering capacitor is coupled to the inverting circuit and the load in parallel. The over current protection circuit is coupled to the inverting circuit and the filtering capacitor and configured to provide an over current protection mechanism. The over current protection circuit detects an AC current on the filtering capacitor and determines whether to enable the over current protection mechanism according to the AC current in order to restrain the power conversion operation of the inverting circuit.

Abstract: An array structure and a manufacturing method thereof are disclosed. The method for manufacturing the array structure includes: forming a gate insulating layer on a glass substrate; and etching the gate insulating layer at a position corresponding to a source/drain signal access terminal, and forming a through-hole structure provided with an outward-inclined side wall in the gate insulating layer. Conductive films in the source/drain signal access terminal and a gate signal access terminal which have wires thereof alternate with each other have a same height, so that the forces applied to conductive balls can be more uniform, and hence the conductivity can be improved.

Abstract: The embodiment provides a touch screen and a display device. The touch screen has: a first substrate and a second substrate arranged in opposite to each other, and a touch-driving electrode and a touch-sensing electrode arranged in a crossing manner on the first substrate and the second substrate, a non-flat region is provided at a region of the first substrate on which the touch-sensing electrode is to be formed, and the touch-sensing electrode is arranged on the first substrate in accordance with a shape of the first substrate so as to be formed with a non-flat region; and/or a non-flat region is provided at a region of the second substrate on which the touch-driving electrode is to be formed, and the touch-driving electrode is arranged on the second substrate in accordance with a shape of the second substrate so as to be formed with a non-flat region.

Abstract: The embodiments of the present invention provide a thin film transistor including a gate, an upper active layer, a lower active layer, an upper source, a lower source, an upper drain and a lower drain. The upper active layer and the lower active layer are disposed at an upper side and a lower side of the gate, respectively, the lower source and the lower drain are connected to the lower active layer, respectively, and the upper source and the upper drain are connected to the upper active layer, respectively. The embodiments of the present invention also provide an array substrate including the thin film transistor, a method of fabricating the array substrate, and a display device including the array substrate.

Abstract: A method of manufacturing an array substrate is disclosed. A first conductive pattern, a first insulating layer, a second conductive pattern, and a second insulating layer on a base substrate is successively formed. The second insulating layer and the first insulating layer are patterned with a double-tone mask. At least a half lap joint via hole in the second insulating layer, and at least a full lap joint via hole in both the first insulating layer and the second insulating layer is formed. The second conductive pattern corresponds to a part of the half lap joint via hole, and the first conductive pattern corresponds to the whole of the full lap joint via hole. A third conductivity pattern is formed on the surface of the second conductivity pattern and the first insulating layer and a fourth conductive pattern is formed on the surface of the first conductive pattern.

Abstract: A method for manufacturing an array substrate includes steps of: forming a pattern which includes a scanning line and a gate on a base substrate (301); forming a gate insulating layer on the pattern which includes the scanning line and the gate; forming a pattern which includes an active layer, a data line and a spacer matrix on the gate insulating layer; forming a passivation layer on the pattern which includes the active layer, the data line and the spacer matrix; dry etching the passivation layer to form a via hole which exposes the spacer matrix; under effect of an electric field generated between the spacer matrix exposed from the via hole and an etching gas, products obtained during the etching is induced to be deposited on the exposed surface of the spacer matrix so as to form a spacer. An array substrate and a display pane are further provided.

Abstract: The present disclosure relates to a method for making an electrode material of lithium-ion batteries. In the method, a lithium source solution and a plurality of titanium source particles are provided. The lithium source solution and the titanium source particles are mixed, wherein a molar ratio of lithium element to titanium element is in a range from about 4:5 to about 9:10, thereby forming a sol. A carbon source compound is dispersed into the sol to form a sol mixture. The sol mixture is spray dried to form a plurality of precursor particles. The precursor particles are heated to form a lithium titanate composite electrode material.

Abstract: An array substrate, a display panel and a preparing method thereof are disclosed. The array substrate comprises: a substrate, a gate line and a data line disposed on the substrate, a protective layer covering the gate line and/or data line; a light converging structure is disposed on the protective layer over the gate line and/or the data line.

Abstract: The present disclosure relates to a method for making an electrode material of lithium-ion batteries. In the method, a lithium source solution and a plurality of titanium source particles are provided. The lithium source solution and the titanium source particles are mixed, wherein a molar ratio of lithium element to titanium element is in a range from about 4:5 to about 9:10, thereby forming a sol. A carbon source compound is dispersed into the sol to form a sol mixture. The sol mixture is spray dried to form a plurality of precursor particles. The precursor particles are heated to form a lithium titanate composite electrode material.

Abstract: The present invention provides a mask, on which a preset pattern is provided. First test patterns for determining an amount of a position offset of the mask during its movement are provided on the mask at a first side of the preset pattern and a second side of the preset pattern opposite to the first side, respectively. When being moved in a direction from the first side to the second side by a standard distance, the mask can determine whether a position offset occurs to the mask during its movement, and determine an amount of the position offset if a position offset occurs. Thus, the position offset of the mask can be corrected, thereby obtaining an accurate predetermined pattern on a glass substrate.

Abstract: An array substrate, a display device and a manufacturing method of the array substrate. The array substrate includes: a base substrate (1) and a plurality of pixel units located on the base substrate (1), each of the pixel units including a thin film transistor unit. The thin film transistor unit includes: a gate electrode located on the base substrate (1), a gate insulating layer (3) located on the gate electrode, an active layer (4) located on the gate insulating layer (3) and opposed to the gate electrode in position, an ohmic layer (5) located on the active layer (4), a source electrode (6a) and a drain electrode (6b) that are located on the ohmic layer (5) and a resin passivation layer (8) that are located on the source electrode (6a) and the drain electrode (6b) and covers the substrate.

Abstract: A liquid crystal display (LCD) substrate, comprising: at least one pattern region; and a cutting region around the at least one pattern region, wherein a piezoelectric thin film is formed in the cutting region, and each end of the piezoelectric thin film is connected with a lead.

Abstract: The present disclosure provides an array substrate comprising a structure to be detected disposed on a base substrate. An additional layer for detecting the structure to be detected is broken is disposed below the structure to be detected. The additional layer has a color different from that of the structure to be detected and a same pattern shape as that of the structure to be detected. The present disclosure also provides a detecting method and detecting apparatus of the array substrate described above. According to the array substrate, the detecting method and the detecting apparatus of the present disclosure, an early detection of the breakage defect occurred during the fabrication process of the array substrate can be achieved so as to discover and eliminate those defects as early as possible, which improves throughput and yield.

Abstract: Embodiments of the invention disclose a mask plate and a method for detecting an exposure defect using the mask plate. The mask includes a mask pattern, and the mask further includes a plurality of detection-mark mask patterns arranged along a scan direction of an exposure machine, the detection-mark mask patterns are arranged at an edge of the mask pattern. The detection-mark mask patterns are adapted for forming detection marks on a substrate. The detection marks are adapted for reflecting exposure defects of the exposure machine. With the mask plate of the invention, the reason for the exposure defect may be precisely decided, thereby improving the exposure effect and improving the parameter index of the substrate.

Abstract: Disclosed is a method for fabricating an array substrate, comprising: forming a pattern layer comprising a gate and a gate connection on a substrate; sequentially forming an insulation layer film and an active layer film on the substrate, and forming a pattern of a gate insulation layer having a first via hole and a pattern of an active layer through a single patterning process, wherein the first via hole is located above the gate connection; sequentially forming a transparent conductive film and a metal film on the substrate, and forming a pattern layer comprising a first electrode and a pattern layer comprising a data line, a source, a drain and a TFT channel through a single patterning process.

Abstract: A fully integrated silicon-based bandpass filter which lends itself to applications in the gigahertz region is disclosed. The bandpass filter is fabricated on an integrated circuit and operates as a microwave/millimeter-wave filtering circuit. In accordance with one aspect, the bandpass filter includes a first set and a second set of filter coupled elements, a three-port “T” transmission line junction and a perturbing element. The three-port “T” transmission line junction has a first port coupled to a first end of a first one of the first set of filter coupled elements and a second port coupled to a first end of a first one of the second set of filter coupled elements. The perturbing element is coupled to a third port of the three-port “T” transmission line junction. A second one of the first set of filter coupled elements includes an input transmission line and has a first end thereof coupled to an input port and an opposite end thereof having an open end.

Abstract: An apparatus including a transducer membrane for generating sound waves; and a plate, through which sound waves can pass, at least partially overlaying the transducer membrane configured to produce a magnetically shielded region so to impede particles reaching the transducer membrane.

Abstract: A compound of Formula (I): or a pharmaceutically acceptable salt thereof, are capable of modulating the body's production of cyclic guanosine monophosphate (“cGMP”) and are generally suitable for the therapy and prophylaxis of diseases which are associated with a disturbed cGMP balance. The invention furthermore relates to processes for preparing compounds of Formula I, or a pharmaceutically acceptable salt thereof, for their use in the therapy and prophylaxis of the abovementioned diseases and for preparing pharmaceuticals for this purpose, and to pharmaceutical preparations which comprise compounds of Formula (I) or a pharmaceutically acceptable salt thereof.

Abstract: Embodiments of the present invention disclose an array substrate, a manufacturing method of the array substrate and a display device, and the manufacturing method of the array substrate comprises: forming a gate line and a gate electrode on a base substrate; forming a gate insulating layer above the gate line and the gate electrode; successively depositing a semiconductor layer and a metal layer above the gate insulating layer, and forming an active layer, a source electrode and a drain electrode that are disposed above the gate electrode and a residual semiconductor layer disposed above the gate line and a signal line covering the residual semiconductor layer by using one patterning process; performing a patterning process for the signal line, the residual semiconductor layer disposed below the signal line and the gate insulating layer to form a via hole, so that a surface of the gate line, side sectional surfaces of the signal line, side sectional surfaces of the residual semiconductor layer and side sectio

Abstract: In one embodiment, the present invention is a method for performing incremental preamble detection in a wireless communication network. The method processes non-overlapping chunks of incoming antenna data, where each chunk is smaller than the preamble length, to detect the signature of the transmitted preamble. For each chunk processed, chips of the chunk are correlated with possible signatures employed by the wireless network to update a set of correlation profiles, each profile comprising a plurality of profile values. Further, an intermediate detection is performed by comparing the updated profile values to an intermediate threshold that is also updated for each chunk. Upon receiving the final chunk, the correlation profiles are updated, and a final preamble detection is made by comparing the updated profile values to a final threshold. Detections are performed on an incremental basis to meet latency requirements of the wireless network.