Patents by Inventor Jian Hao

Jian Hao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210173648
    Abstract: A processor adapted for neural network operation is provided to include a scratchpad memory, a processor core, a neural network accelerator coupled to the processor core, and a arbitration unit coupled to the scratchpad memory, the processor core and the neural network accelerator. The processor core and the neural network accelerator share the scratchpad memory via the arbitration unit.
    Type: Application
    Filed: December 1, 2020
    Publication date: June 10, 2021
    Applicant: National Tsing Hua University
    Inventors: Yun-Chen LO, Yu-Chun KUO, Yun-Sheng CHANG, Jian-Hao HUANG, Jun-Shen WU, Wen-Chien TING, Tai-Hsing WEN, Ren-Shuo LIU
  • Patent number: 11001885
    Abstract: An apparatus suitable for single molecule sequencing. The apparatus includes at least one nanowell, a plurality of nucleic acid immobilization moieties, and a plurality of types of nucleic acid fragments. The nanowell has an observation zone. The nucleic acid immobilization moieties are disposed in or proximate to the observation zone. The nucleic acid fragments are immobilized to the nucleic acid immobilization moieties, respectively. At least one polymerase is disposed in the observation zone. A method of sequencing nucleic acid molecules using the above-mentioned apparatus is provided.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: May 11, 2021
    Assignee: Personal Genomics Taiwan, Inc.
    Inventors: Chung-Fan Chiou, Chao-Chi Pan, Ching-Wei Tsai, Bor-Huah Chen, Jian-Hao Ciou
  • Patent number: 10991800
    Abstract: A semiconductor device includes a substrate, an isolation structure over the substrate, a fin over the substrate and the isolation structure, a gate structure engaging a first portion of the fin, first sidewall spacers over sidewalls of the gate structure and over a second portion of the fin, source/drain (S/D) features adjacent to the first sidewall spacers, and second sidewall spacers over the isolation structure and over sidewalls of a portion of the S/D features. The second sidewall spacers and the second portion of the fin include a same dopant.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: April 27, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun Hsiung Tsai, Ya-Yun Cheng, Shahaji B. More, Cheng-Yi Peng, Wei-Yang Lee, Kuo-Feng Yu, Yen-Ming Chen, Jian-Hao Chen
  • Publication number: 20210082706
    Abstract: A method includes forming a first gate dielectric and a second gate dielectric over a first semiconductor region and a second semiconductor region, respectively, depositing a lanthanum-containing layer including a first portion and a second portion overlapping the first gate dielectric and the second gate dielectric, respectively, and depositing a hard mask including a first portion and a second portion overlapping the first portion and the second portion of the lanthanum-containing layer, respectively. The hard mask is free from both of titanium and tantalum. The method further includes forming a patterned etching mask to cover the first portion of the hard mask, with the second portion of the hard mask being exposed, removing the second portion of the hard mask and the second portion of the lanthanum-containing layer, and performing an anneal to drive lanthanum in the first portion of the lanthanum-containing layer into the first gate dielectric.
    Type: Application
    Filed: September 17, 2019
    Publication date: March 18, 2021
    Inventors: Kuo-Feng Yu, Chun Hsiung Tsai, Jian-Hao Chen, Hoong Shing Wong, Chih-Yu Hsu
  • Publication number: 20200376267
    Abstract: An electrical-stimulation device includes an electrical-stimulation signal-generating circuit, a first connection unit, a first conductive member and a second conductive member. The electrical-stimulation signal-generating circuit has a first channel for providing a first electrical-stimulation signal. The first connection unit has a plurality of first contact points and a plurality of second contact points, wherein the first contact points and the second contact points are alternately arranged. The first conductive member is connected to the first contact points. The second conductive member is connected to the second contact points. The first conductive member and the second conductive member are electrically connected to the first channel, so that the first electrical-stimulation signal is transmitted through the first contact points and the second contact points corresponding to the first channel.
    Type: Application
    Filed: May 27, 2020
    Publication date: December 3, 2020
    Applicant: GIMER MEDICAL. Co. LTD.
    Inventors: Chen-Tun WU, Jian-Hao PAN
  • Patent number: 10781468
    Abstract: The invention relates to a medium for producing glucosamine, including 25-500 g/L molasses, 0.01-100 g/L soybean hydrolysate or 0.25-100 g/L corn steep liquor, 0.1-2 g/L MgSO4.7H2O, 0.1-0.5 g/L Al(NO3)3, and 1-5 mL/L methanol. The invention also relates to a method for producing glucosamine, including providing microorganism being able to produce glucosamine, and fermenting the microorganism in the medium mentioned above.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: September 22, 2020
    Assignee: YUAN ZE UNIVERSITY
    Inventors: Ho-Shing Wu, Jian-Hao Chen
  • Patent number: 10765868
    Abstract: The present application discloses am electrical stimulation device for electrically stimulating at least one target zone of an organism. The electrical stimulation device comprises a control unit and an electrical stimulation unit. The electrical stimulation unit includes a frequency synthesizer, an amplifier, a variable resistor, at least one first electrode and at least one second electrode. The frequency synthesizer is coupled to the control unit and generates a frequency signal. The amplifier is coupled to the frequency synthesizer. The variable resistor comprises a resistance and is coupled to the control unit and the amplifier. The first electrode and the second electrode are coupled to the amplifier. The amplifier outputs an electrical stimulation signal according to the frequency signal of the frequency synthesizer and the resistance of the variable resistor to impel the first electrode and the second electrode to generate an electric field.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: September 8, 2020
    Assignee: GIMER MEDICAL CO., LTD
    Inventors: Chi-Heng Chang, Jian-Hao Pan
  • Publication number: 20200169880
    Abstract: The network service system includes a transmission controller and an authentication server. The transmission controller determines whether a service request belongs to a service of a proprietary network registered with the mobile edge computing platform and comprises an authentication request. The service request is from an electronic device. When the transmission controller determines that the service request belongs to a service of the proprietary network and comprises an authentication request, the authentication server executes an authentication mechanism according to packet information that corresponds to the service request, and the authentication mechanism triggers a permission server to confirm the identity information and permission information of the electronic device.
    Type: Application
    Filed: December 26, 2018
    Publication date: May 28, 2020
    Inventors: Kuo-Wei WEN, Jian-Cheng CHEN, Jian-Hao CHEN
  • Publication number: 20200066869
    Abstract: A method and structure for doping source and drain (S/D) regions of a PMOS and/or NMOS FinFET device are provided. In some embodiments, a method includes providing a substrate including a fin extending therefrom. In some examples, the fin includes a channel region, source/drain regions disposed adjacent to and on either side of the channel region, a gate structure disposed over the channel region, and a main spacer disposed on sidewalls of the gate structure. In some embodiments, contact openings are formed to provide access to the source/drain regions, where the forming the contact openings may etch a portion of the main spacer. After forming the contact openings, a spacer deposition and etch process may be performed. In some cases, after performing the spacer deposition and etch process, a silicide layer is formed over, and in contact with, the source/drain regions.
    Type: Application
    Filed: November 4, 2019
    Publication date: February 27, 2020
    Inventors: Chun Hsiung TSAI, Cheng-Yi PENG, Yin-Pin WANG, Kuo-Feng YU, Da-Wen LIN, Jian-Hao CHEN, Shahaji B. More
  • Patent number: 10517020
    Abstract: A user equipment (UE) context migration management method applied to a mobile edge platform for managing a UE context of a mobile communication device is provided. An embodiment of the UE context migration management method includes: receiving at least one migration request for the UE context; calculating a first difference data corresponding to the UE context in response to the at least one migration request, wherein the first difference data represents a difference between the UE contexts obtained in two consecutive UE context retrieving operations corresponding to the at least one migration request; and transmitting the first difference data to the neighboring mobile edge platform to request the neighboring mobile edge platform to perform a migration operation of the UE context based on the first difference data.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 24, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuo-Wei Wen, Chun-Chieh Wang, Jian-Hao Chen
  • Patent number: 10468500
    Abstract: A method and structure for doping source and drain (S/D) regions of a PMOS and/or NMOS FinFET device are provided. In some embodiments, a method includes providing a substrate including a fin extending therefrom. In some examples, the fin includes a channel region, source/drain regions disposed adjacent to and on either side of the channel region, a gate structure disposed over the channel region, and a main spacer disposed on sidewalls of the gate structure. In some embodiments, contact openings are formed to provide access to the source/drain regions, where the forming the contact openings may etch a portion of the main spacer. After forming the contact openings, a spacer deposition and etch process may be performed. In some cases, after performing the spacer deposition and etch process, a silicide layer is formed over, and in contact with, the source/drain regions.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: November 5, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun Hsiung Tsai, Cheng-Yi Peng, Yin-Pin Wang, Kuo-Feng Yu, Da-Wen Lin, Jian-Hao Chen, Shahaji B. More
  • Publication number: 20190292574
    Abstract: The invention relates to a medium for producing glucosamine, including 25-500 g/L molasses, 0.01-100 g/L soybean hydrolysate or 0.25-100 g/L corn steep liquor, 0.1-2 g/L MgSO4.7H2O, 0.1-0.5 g/L Al(NO3)3, and 1-5 mL/L methanol.
    Type: Application
    Filed: May 1, 2019
    Publication date: September 26, 2019
    Inventors: Ho-Shing WU, Jian-Hao CHEN
  • Publication number: 20190288067
    Abstract: A semiconductor device includes a substrate, an isolation structure over the substrate, a fin over the substrate and the isolation structure, a gate structure engaging a first portion of the fin, first sidewall spacers over sidewalls of the gate structure and over a second portion of the fin, source/drain (S/D) features adjacent to the first sidewall spacers, and second sidewall spacers over the isolation structure and over sidewalls of a portion of the S/D features. The second sidewall spacers and the second portion of the fin include a same dopant.
    Type: Application
    Filed: May 23, 2019
    Publication date: September 19, 2019
    Inventors: Chun Hsiung Tsai, Ya-Yun Cheng, Shahaji B. More, Cheng-Yi Peng, Wei-Yang Lee, Kuo-Feng Yu, Yen-Ming Chen, Jian-Hao Chen
  • Patent number: 10396156
    Abstract: A method includes providing a structure having a substrate, a fin, and a gate structure; performing an implantation process to implant a dopant into the fin adjacent to the gate structure; and forming gate sidewall spacers and fin sidewall spacers. The method further includes performing a first etching process to recess the fin adjacent to the gate sidewall spacers while keeping at least a portion of the fin above the fin sidewall spacers. The method further includes performing another implantation process to implant the dopant into the fin and the fin sidewall spacers; and performing a second etching process to recess the fin adjacent to the gate sidewall spacers until a top surface of the fin is below a top surface of the fin sidewall spacers, resulting in a trench between the fin sidewall spacers. The method further includes epitaxially growing a semiconductor material in the trench.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: August 27, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun Hsiung Tsai, Ya-Yun Cheng, Shahaji B. More, Cheng-Yi Peng, Wei-Yang Lee, Kuo-Feng Yu, Yen-Ming Chen, Jian-Hao Chen
  • Publication number: 20190237543
    Abstract: A method includes providing a structure having a substrate, a fin, and a gate structure; performing an implantation process to implant a dopant into the fin adjacent to the gate structure; and forming gate sidewall spacers and fin sidewall spacers. The method further includes performing a first etching process to recess the fin adjacent to the gate sidewall spacers while keeping at least a portion of the fin above the fin sidewall spacers. The method further includes performing another implantation process to implant the dopant into the fin and the fin sidewall spacers; and performing a second etching process to recess the fin adjacent to the gate sidewall spacers until a top surface of the fin is below a top surface of the fin sidewall spacers, resulting in a trench between the fin sidewall spacers. The method further includes epitaxially growing a semiconductor material in the trench.
    Type: Application
    Filed: January 29, 2018
    Publication date: August 1, 2019
    Inventors: Chun Hsiung Tsai, Ya-Yun Cheng, Shahaji B. More, Cheng-Yi Peng, Wei-Yang Lee, Kuo-Feng Yu, Yen-Ming Chen, Jian-Hao Chen
  • Publication number: 20190191344
    Abstract: A user equipment (UE) context migration management method applied to a mobile edge platform for managing a UE context of a mobile communication device is provided. An embodiment of the UE context migration management method includes: receiving at least one migration request for the UE context; calculating a first difference data corresponding to the UE context in response to the at least one migration request, wherein the first difference data represents a difference between the UE contexts obtained in two consecutive UE context retrieving operations corresponding to the at least one migration request; and transmitting the first difference data to the neighboring mobile edge platform to request the neighboring mobile edge platform to perform a migration operation of the UE context based on the first difference data.
    Type: Application
    Filed: December 15, 2017
    Publication date: June 20, 2019
    Inventors: Kuo-Wei WEN, Chun-Chieh WANG, Jian-Hao CHEN
  • Patent number: D852073
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: June 25, 2019
    Assignee: Autophix Tech Co., Ltd
    Inventors: Yutao Zhao, Qing Huang, Jian Hao
  • Patent number: D903515
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: December 1, 2020
    Assignee: AUTOPHIX TECH CO., LTD
    Inventors: Yutao Zhao, Qing Huang, Jian Hao
  • Patent number: D918074
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: May 4, 2021
    Assignee: AUTOPHIX TECH CO., LTD
    Inventors: Yutao Zhao, Qing Huang, Jian Hao
  • Patent number: D918748
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 11, 2021
    Assignee: AUTOPHIX TECH CO., LTD
    Inventors: Yutao Zhao, Qing Huang, Jian Hao