Abstract: A method in an on-board unit comprising: receiving and decoding, with a transceiver, a broadcast packet (BCP) from a road side unit (RSU); processing BCP with a micro controller unit (MCU), wherein processing comprises determining whether there is a first interrupt from the transceiver, wherein the first interrupt is used to interrupt idle state of MCU; searching for low level state from a falling edge after the first interrupt; determining whether duration time of low level is within a time range; inputting one byte into the transceiver if duration time is within the range and clearing the first interrupt; determining whether there is a second interrupt from the transceiver, wherein the second interrupt is used to interrupt data reception; processing data in BCP if there is second interrupt; and converting, with the transceiver, processed data to a wireless signal and transmitting the signal to RSU.

Abstract: A method and a circuit for exciting a crystal oscillation circuit are disclosed herein. The crystal oscillation circuit comprising: charging, with a charging circuit, a voltage-controlled oscillator; providing, with the voltage-controlled oscillator, an exciting signal; blocking, with a direct current blocking capacitor, direct current from the voltage-controlled oscillator to the crystal oscillation circuit; and exciting, with the exciting signal, the crystal oscillation circuit. The circuit for exciting a crystal oscillation circuit, comprising: a charging circuit; a voltage-controlled oscillator coupled to the charging circuit and configured to provide an exciting signal to the crystal oscillation circuit; and a direct current blocking capacitor connected between the voltage-controlled oscillator and the crystal oscillation circuit and configured to block direct current from the voltage-controlled oscillator.

Abstract: A switch for controlling a gain of an amplifier comprises a first NMOS transistor, a second NMOS transistor, a third PMOS transistor, a fourth NMOS transistor, a fifth PMOS transistor, a first resistor, and an inverter. A source of the first NMOS transistor is connected to a first terminal of the first resistor, a drain of the first NMOS transistor is connected to a drain of the third PMOS transistor, a source of the fourth NMOS transistor and a source of the second NMOS transistor, a gate of the first NMOS transistor is connected to a source of the third PMOS transistor, a drain of the fifth PMOS transistor, a drain of the fourth NMOS transistor, and a gate of the second NMOS transistor; a gate of the third PMOS transistor receives a switch voltage (Vs); a gate of the fourth PMOS transistor receives a negative switch voltage (Vsn).

Abstract: A switch for controlling a gain of an amplifier comprises a first NMOS transistor, a second NMOS transistor, a third PMOS transistor, a fourth NMOS transistor, a fifth PMOS transistor, a first resistor, and an inverter. A source of the first NMOS transistor is connected to a first terminal of the first resistor, a drain of the first NMOS transistor is connected to a drain of the third PMOS transistor, a source of the fourth NMOS transistor and a source of the second NMOS transistor, a gate of the first NMOS transistor is connected to a source of the third PMOS transistor, a drain of the fifth PMOS transistor, a drain of the fourth NMOS transistor, and a gate of the second NMOS transistor; a gate of the third PMOS transistor receives a switch voltage (Vs); a gate of the fourth PMOS transistor receives a negative switch voltage (Vsn).

Abstract: An embodiment discloses an operational amplifier comprising: an input stage; an output stage communicatively coupled to the input stage, wherein the output stage further comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first current source, a fifth transistor, a sixth transistor and a second current source, wherein a second node of the first transistor is connected to the input stage (vin), a third node of the first transistor is connected to a third node of the fourth transistor, ground (gnd), a third node of the fifth transistor and a third node of the third transistor, a first node of the first transistor is connected to a first node of the first current source, a second node of the sixth transistor and a second node of the second transistor.

Abstract: A method and a circuit for exciting a crystal oscillation circuit are disclosed herein. The crystal oscillation circuit comprising: charging, with a charging circuit, a voltage-controlled oscillator; providing, with the voltage-controlled oscillator, an exciting signal; blocking, with a direct current blocking capacitor, direct current from the voltage-controlled oscillator to the crystal oscillation circuit; and exciting, with the exciting signal, the crystal oscillation circuit. The circuit for exciting a crystal oscillation circuit, comprising: a charging circuit; a voltage-controlled oscillator coupled to the charging circuit and configured to provide an exciting signal to the crystal oscillation circuit; and a direct current blocking capacitor connected between the voltage-controlled oscillator and the crystal oscillation circuit and configured to block direct current from the voltage-controlled oscillator.

Abstract: A card detector configured to be communicatively coupled to a card reader comprises: a first comparator configured to output periodically a first comparison result by comparing a voltage for a device under test with a first reference; a second comparator outputs periodically a second comparison result by comparing a second reference voltage with the first reference voltage, wherein the second reference voltage is adjustable; a decision circuit communicatively coupled to both the first comparator and the second comparator, and decides whether a card is in proximity to the card detector by comparing the time delay relationship between the first comparison result and the second comparison result respectively at a first time point and a second time point different from the first time point, and further wakes up the card reader if the decision circuit decides that the card is in proximity to the card detector.

Abstract: A voltage-to-current converting circuit, comprising: a direct current (DC) bias circuit, a first DC-blocking circuit, a second DC-blocking circuit, a first differential input pair and a second differential input pair; wherein the DC bias circuit is connected to the first and second DC-blocking circuits and configured to provide a bias voltage to the first and the second differential input pairs; wherein the first DC-blocking circuit is connected between the DC bias circuit and the first and second differential input pair and the second DC-blocking circuit is connected between the DC bias circuit and the first and second differential input pair; and wherein the first differential circuit is connected to the second differential circuit via two resistors.

Abstract: A power management system comprises an input power detector configured to generate a first enablement signal by detecting whether a first voltage is supplied; a first output stage connected to the input power detector and configured to receive and regulate the first voltage upon receiving the first enablement signal; an error operational amplifier is connected to the first output stage, a first input port of the error operational amplifier is configured to receive a first reference voltage, a second input port of the error operational amplifier is connected to a connection point of a first resistor and a second resistor, the first resistor is connected to the first output stage, the second resistor is connected to ground, and a system output port is located at the connection of the output port of the first output stage and the first resistor, to drive a load.

Abstract: A method for suppressing POP noise in an audio operation amplifier, comprising: connecting a first resistor and a second resistor in series at an output stage of the audio operation amplifier by turning on a first switch and a second switch; generating, with a ramp generator, a ramp voltage after an audio signal is input into the audio operation amplifier, wherein the ramp voltage varies from zero to a first value; generating, with an voltage generator, a second voltage, wherein a third switch is turned on and a fourth switch is turned off when the ramp voltage reaches the second value; short-circuiting the first and second resistors by turning off the first and second switches; and outputting, with the audio operation amplifier, an amplified audio signal.

Abstract: A method for suppressing POP noise in an audio operation amplifier, comprising: connecting a first resistor and a second resistor in series at an output stage of the audio operation amplifier by turning on a first switch and a second switch; generating, with a ramp generator, a ramp voltage after an audio signal is input into the audio operation amplifier, wherein the ramp voltage varies from zero to a first value; generating, with an voltage generator, a second voltage, wherein a third switch is turned on and a fourth switch is turned off when the ramp voltage reaches the second value; short-circuiting the first and second resistors by turning off the first and second switches; and outputting, with the audio operation amplifier, an amplified audio signal.

Abstract: A low-noise amplifier comprises first and second input ports respectively configured to receive a positive and negative input voltages; first and second resonance circuit, first and second transistor; wherein a first voltage output port of the first resonance circuit is connected to the second transistor, and a second voltage output port of the second resonance circuit is connected to the first transistor, the first and second voltage output ports are crossed coupled to a second node of both the first transistor and the second transistor via a first and second capacitor respectively; the second node of the second transistor is connected to both the second input port via a third capacitor and a third node of the first transistor, and the second node of the first transistor is connected to both the first input port via a fourth capacitor and a third node of the second transistor.

Abstract: An operational amplifier comprises a first input pair, a second input pair, a switch and a first current mirror. The first input pair comprises a different type of MOS transistor from the second input pair. The switch determines which one of the first or the second input pair is functioning and the operating input pair is configured to output voltage. The switch is further connected to the first input pair and the first current mirror. The first current mirror is further connected to the second input pair, and is configured to copy a current passing through the switch to the second input pair. Therefore an increase of transconductance of the first input pair is compensated by a decrease of transconductance of the second input pair, and the operational amplifier has a substantially constant transconductance no matter which of the first input pair and the second input pair is functioning.

Abstract: An operational amplifier comprises a first input pair, a second input pair, a switch and a first current mirror. The first input pair comprises a different type of MOS transistor from the second input pair. The switch determines which one of the first or the second input pair is functioning and the operating input pair is configured to output voltage. The switch is further connected to the first input pair and the first current mirror. The first current mirror is further connected to the second input pair, and is configured to copy a current passing through the switch to the second input pair. Therefore an increase of transconductance of the first input pair is compensated by a decrease of transconductance of the second input pair, and the operational amplifier has a substantially constant transconductance no matter which of the first input pair and the second input pair is functioning.

Abstract: An operational amplifier comprises an input pair, an aiding unit, an even number of amplification stages, a feeding unit, a first current source, a second current source. Both the input pair and the aiding unit are connected to the first current source. The input pair receives differential input voltage. Both the input pair and the aiding unit are further connected to a first stage of the even number of amplification stages. The even number of amplification stages are connected in series, and the last stage of the amplification stages outputs differential output voltages. The feeding unit is configured to receive a common mode voltage of the differential output voltages, and feeds a voltage on a first node of the feeding unit back to the aiding unit so as to provide bias voltage to the aiding unit. The aiding unit avoids dead lock of the input pair.

Abstract: A method in a circuit comprises providing a first clock by a resistor-capacitor (RC) oscillator; demodulating a plurality of input signals to form a plurality of demodulated input signals; discriminating frequency ranges of the plurality of demodulated input signals according to the first clock; determining whether a first predetermined number of consecutive demodulated input signals among the plurality of demodulated input signals fall into a first predetermined frequency range; triggering a crystal oscillator to provide a second clock to calibrate the first clock if the first predetermined number of consecutive input signals fall into the first predetermined frequency range.

Abstract: A method in a circuit comprises providing a first clock by a resistor-capacitor (RC) oscillator; demodulating a plurality of input signals to form a plurality of demodulated input signals; discriminating frequency ranges of the plurality of demodulated input signals according to the first clock; determining whether a first predetermined number of consecutive demodulated input signals among the plurality of demodulated input signals fall into a first predetermined frequency range; triggering a crystal oscillator to provide a second clock to calibrate the first clock if the first predetermined number of consecutive input signals fall into the first predetermined frequency range.

Abstract: An electrostatic discharge (ESD) protection device for use with a power amplifier, the power amplifier having an output port being a collector of a first transistor, wherein the ESD protection device comprises a second transistor having a first terminal connected to the collector of the first transistor, a second terminal connected to ground via a resistor, and a third terminal connected to the ground, such that the second transistor can discharge electrostatic on the output port.

Abstract: An ASK modulator includes a baseband unit which obtains a sequence comprising at least one amplitude value and adds an additional value to each of the at least one amplitude value to generate a modified sequence; a digital-to-analog converter coupled to the baseband unit, the digital-to-analog converter converts the modified sequence to generate a first signal, the additional value is determined based on a half scale of the digital-analog converter; and a mixer which receives the first signal and a second signal and generate a modulated signal by mixing the first signal with the second signal.

Abstract: A method comprises: disposing an on-board unit at a preset relative position with respect to a road-side unit; transmitting a signal by the road-side unit; receiving the signal by the on-board unit and detecting a strength of the received signal; calculating, by the on-board unit, a calculated strength of the received signal according to the detected strength of the received signal; storing the calculated strength of the received signal in a memory accessible by the on-board unit; using the stored calculated strength of the received signal to determine if payment of a toll should be made.