Abstract: The present disclosure describes optical and optoelectronic assemblies that, in some cases, include screen-printed micro-spacers, as well as methods for manufacturing such assemblies and modules. For example, micro-spacers can be applied on a first optical element layer, and a second optical element layer can be provided on the first micro-spacers. By providing the second optical element layer on the first micro-spacers, the second optical element layer and the first optical element layer can be separated from one another by air or vacuum gaps each of which is laterally surrounded by a portion of the first micro-spacers.

Abstract: The present disclosure describes wafer-level processes for fabricating optoelectronic device subassemblies that can be mounted, for example, to a circuit substrate, such as a flexible cable or printed circuit board, and integrated into optoelectronic modules that include one or more optical subassemblies stacked over the optoelectronic device subassembly. The optoelectronic device subassembly can be mounted onto the circuit substrate using solder reflow technology even if the optical subassemblies are composed of materials that are not reflow compatible.

Abstract: A system and a method for visualizing a software program are provided. The system is configured to store the software program and its change logs. The system is further configured to generate a visualization structure of the software program according to at least one of Data Clumps information, Divergence Change information and Shotgun Surgery information, and display the software program according to the visualization structure. The method is applied to the system to implement the operations.

Abstract: A system and a method for visualizing a software program are provided. The system is configured to store the software program and its change logs. The system is further configured to generate a visualization structure of the software program according to at least one of Data Clumps information, Divergence Change information and Shotgun Surgery information, and display the software program according to the visualization structure. The method is applied to the system to implement the operations.

Abstract: A system and a method for OBSi-based (open service gateway initiative) service delivery framework are provided. The system is adaptable to a first host executing an OSGi bundle. A mobile service module of the first host is inherited through the OSGi bundle. A second host is assigned when the OSGi bundle calls a mobilize function inherited from the mobile service module. A bytecode and an instance of the OSGi bundle are obtained through a first delivery context processing module of the first host. The bytecode and instance of the OSGi bundle are transmitted from the first host to the second host through the first delivery context processing module and a second delivery context processing module of the second host. The bytecode and instance of the OSGi bundle are installed and the OSGi bundle is executed through the second delivery context processing module.

Abstract: A pin out designation method for package board codesign has steps of defining pin characteristics and requirements, generating multiple pin patterns, pin blocks construction and grouping and pin blocks floorplanning. Designers may use an EDA tool to generate multiple pin patterns and may use the pin patterns to construct multiple pin blocks, to group the pin blocks around four sides of a chip and to adjust the pin blocks into a minimized package size of the chip.

Abstract: A phase lock loop (PLL) featuring automatic stabilization is provided, in which a first charge pump is coupled to a driving control signal to generate a first current, a filter with a zero-point path and the first charge pump are coupled at a first node, and a current adjustment circuit adjusts a current on the first node according to a voltage difference in the zero-point path.

Abstract: A power on/reset circuit includes a voltage following module, an inverse amplifying module, and at least one first transistor connected in series in a stack. The voltage following module generates a first analog signal, whose voltage level follows a voltage level of a first DC voltage source. The inverse amplifying module logically reverses a voltage level of the first analog signal so as to generate a second analog signal. The at least one first transistor adjusts the second analog signal, so that a voltage level of a power on/reset signal controlled by the second analog signal is qualified to precisely trigger a rear digital circuit.

Abstract: A system and a method for OBSi-based (open service gateway initiative) service delivery framework are provided. The system is adaptable to a first host executing an OSGi bundle. A mobile service module of the first host is inherited through the OSGi bundle. A second host is assigned when the OSGi bundle calls a mobilize function inherited from the mobile service module. A bytecode and an instance of the OSGi bundle are obtained through a first delivery context processing module of the first host. The bytecode and instance of the OSGi bundle are transmitted from the first host to the second host through the first delivery context processing module and a second delivery context processing module of the second host. The bytecode and instance of the OSGi bundle are installed and the OSGi bundle is executed through the second delivery context processing module.

Abstract: A pin out designation method for package board codesign having steps of defining pin characteristics and requirements, generating multiple pin patterns, pin blocks construction and grouping and pin blocks floorplanning. Designers may use an EDA tool to generate multiple pin patterns, use the pin patterns to construct multiple pin blocks, group the pin blocks around four sides of a chip and adjusts the pin blocks into a minimized package size of the chip.

Abstract: A phase lock loop (PLL) featuring automatic stabilization is provided, in which a first charge pump is coupled to a driving control signal to generate a first current, a filter with a zero-point path and the first charge pump are coupled at a first node, and a current adjustment circuit adjusts a current on the first node according to a voltage difference in the zero-point path.

Abstract: A reflective semiconductor optical amplifier (RSOA) and an operating system based on a downstream optical signal reuse method with feed-forward current injection are provided. The RSOA has two active regions and includes a reflecting plane that reflects an input optical signal; and an optical amplifying semiconductor including a rear portion, which is positioned at a side of the reflecting plane and to which a signal having polarity opposite to that of the input optical signal is injected, and a front portion, which is positioned at a side opposite to the side of the rear portion facing the reflecting plane and which the input optical signal is passed though and a signal used to modulate a reflected input optical signal from the reflecting plane to an output optical signal is injected into.

Abstract: Provided is an athermal external cavity laser (ECL), whose output optical power and output wavelength can be kept regular irrespective of temperature changes without using additional temperature controlling components. The ECL comprises: a semiconductor amplifier; an optical fiber comprising a core in which a Bragg grating is formed and a cladding surrounding the core; and a thermosetting polymer that fixes the optical fiber to a ferrule and has a negative thermooptical coefficient, wherein the thickness of the cladding surrounding the core in which the Bragg grating is formed is smaller than the portion of the cladding surrounding the portion of the core where the Bragg grating is not formed, and the thermosetting polymer the negative thermooptical coefficient surrounds the cladding.

Abstract: An apparatus for adjusting brightness of indicator light on a panel is provided. By employing pulse width modulated signals, one can control the amount of current flowing into the indicator light, thereby adjusting the brightness of the indicator light. The apparatus includes a control unit, which generates pulse width modulated signals in response to a user defined condition, and a switch element, which is coupled between the output end of the indicator light and the resistor for receiving the pulse width modulated signals, thereby controlling the amount of current flowing into the input end of the indicator light. One can thus obtain optimized indicating effects and visual comforts.

Abstract: An In-Plane Switching (IPS) mode liquid crystal display device includes a first substrate, a plurality of gate lines on the first substrate along a first direction at a predetermined interval from each other, a plurality of data lines on the first substrate along a second direction substantially perpendicular to the first direction at a second predetermined interval from each other, a plurality of pixel regions defined by the crossing of the gate and data lines, a thin film transistor on the first substrate within each of the pixel regions, at least a common line on the first substrate parallel to the gate lines, a plurality of common electrodes connected to the common line within each of the pixel regions, a dummy data line on the first substrate substantially parallel to the data lines spaced apart from an outer most common electrode adjacent to a liquid crystal injection hole, and a plurality of pixel electrodes on the first substrate within each of the pixel regions, at least one of the pixel electrodes b

Abstract: An In-Plane Switching (IPS) mode liquid crystal display device includes a first substrate, a plurality of gate lines on the first substrate along a first direction at a predetermined interval from each other, a plurality of data lines on the first substrate along a second direction substantially perpendicular to the first direction at a second predetermined interval from each other, a plurality of pixel regions defined by the crossing of the gate and data lines, a thin film transistor on the first substrate within each of the pixel regions, at least a common line on the first substrate parallel to the gate lines, a plurality of common electrodes connected to the common line within each of the pixel regions, a dummy data line on the first substrate substantially parallel to the data lines spaced apart from an outer most common electrode adjacent to a liquid crystal injection hole, and a plurality of pixel electrodes on the first substrate within each of the pixel regions, at least one of the pixel electrodes b