Abstract: The 28-kDa outer membrane proteins (P28) of Ehrlichia chaffeensis are encoded by a multigene family consisting of 21 members located in a 23-kb DNA fragment in the genome of E. chaffeensis. Fifteen of these proteins are claimed herein as novel sequences. The amino acid sequence identity of the various P28 proteins was 20-83%. Six of 10 tested p28 genes were actively transcribed in cell culture grown E. chaffeensis. RT-PCR also indicated that each of the p28 genes was monocistronic. These results suggest that the p28 genes are active genes and encode polymorphic forms of the P28 proteins. The P28s were also divergent among different isolates of E. chaffeensis. The large repertoire of the p28 genes in a single ehrlichial organism and antigenic diversity of the P28 among the isolates of E. chaffeensis suggest that the P28s may be involved in immune avoidance.

Abstract: A method for etching an organic bottom antireflective coating (OBARC) and a photoresist material in a single etching process. The method comprises the steps of etching the OBARC and trimming the photoresist material at the same time in an etching environment using a substantially isotropic etching operation. The etching environment including an etching chamber with a top electrode and a bottom electrode wherein a mixture of abrasive gases can flow therethrough. Using an endpoint detection test to determine when an exposed portion of OBARC has been removed, the exposed portion of OBARC being an area of OBARC without photoresist protection and exposed to the etching environment. Applying an over-etch step to trim the photoresist to a desired dimension where the time of the over-etch step being based on the percentage of an endpoint time and the process condition of the over-etch step being same as that of the endpoint step.

Abstract: The present invention is directed to the cloning, sequencing and expression of homologous immunoreactive 28-kDa protein genes, p28-1, -2, -3, -5; -6, -7, -9, from a polymorphic multiple gene family of Ehrlichia canis. Further disclosed is a multigene locus encoding all nine homologous 28-kDa protein genes of Ehrlichia canis. Recombinant Ehrlichia canis 28-kDa proteins react with convalescent phase antiserum from an E. canis-infected dog, and may be useful in the development of vaccines and serodiagnostics that are particularly effective for disease prevention and serodiagnosis.

Abstract: A DNA construct that encodes, upon expression in a plant cell, a fusion protein comprising a multimeric cholera toxin B subunit and a first immunogenic antigen from a causal factor of a mammalian disease. A DNA construct that encodes, upon expression in a plant cell, a fusion protein comprising a cholera toxin A2 subunit, a multimeric cholera toxin B subunit, a first immunogenic antigen from a causal factor of a mammalian disease, and a first immunogenic antigen from a causal factor of a mammalian disease.

Abstract: The present invention is directed to the cloning, sequencing and expression of a conserved immunoreactive 28-kDa protein gene (P28) from a polymorphic multiple gene family of Ehrlichia canis. E. canis P28 has an 834-bp open reading frame encoding a protein of 278 amino acids with four variable regions, and shares similar surface-exposed regions, antigenicity and T-cell motifs with E. chaffeensis P28. Also disclosed is that recombinant E. canis P28 protein reacts with convalescent phase antiserum from an E. canis-infected dog.

Abstract: The present invention is directed to the cloning, sequencing and expression of homologous immunoreactive 28-kDa protein genes, p28-1, -2, -3, -5, -6, -7, -9, from a polymorphic multiple gene family of Ehrlichia canis. Further disclosed is a multigene locus encoding all nine homologous 28-kDa protein genes of Ehrlichia canis. Recombinant Ehrlichia canis 28-kDa proteins react with convalescent phase antiserum from an E. canis-infected dog, and may be useful in the development of vaccines and serodiagnostics that are particularly effective for disease prevention and serodiagnosis.

Abstract: The present invention is directed to the cloning, sequencing and expression of homologous immunoreactive 28-kDa protein genes, ECa28-1 and ECa28SA3, from a polymorphic multiple gene family of Ehrlichia canis. A complete sequence of another 28-kDa protein gene, ECaSA2, is also provided. Further disclosed is a multigene locus encoding all five homologous 28-kDa protein genes of Ehrlichia canis. Recombinant Ehrlichia canis 28-kDa proteins react with convalescent phase antiserum from an E. canis-infected dog.

Abstract: The 28-kDa outer membrane proteins (P28) of Ehrlichia chaffeensis are encoded by a multigene family consisting of 21 members located in a 23-kb DNA fragment in the genome of E. chaffeensis. Fifteen of these proteins are claimed herein as novel sequences. The amino acid sequence identity of the various P28 proteins was 20-83%. Six of 10 tested p28 genes were actively transcribed in cell culture grown E. chaffeensis. RT-PCR also indicated that each of the p28 genes was monocistronic. These results suggest that the p28 genes are active genes and encode polymorphic forms of the P28 proteins. The P28s were also divergent among different isolates of E. chaffeensis. The large repertoire of the p28 genes in a single ehrlichial organism and antigenic diversity of the P28 among the isolates of E. chaffeensis suggest that the P28s may be involved in immune avoidance.

Abstract: The present invention is directed to the cloning, sequencing and expression of homologous immunoreactive 28-kDa protein genes, p28-1, -2, -3, -5, -6, -7, -9, from a polymorphic multiple gene family of Ehrlichia canis. Further disclosed is a multigene locus encoding all nine homologous 28-kDa protein genes of Ehrlichia canis. Recombinant Ehrlichia canis 28-kDa proteins react with convalescent phase antiserum from an E. canis-infected dog, and may be useful in the development of vaccines and serodiagnostics that are particularly effective for disease prevention and serodiagnosis.

Abstract: A method for fabricating a silicon oxide and silicon glass layers at low temperature using High Density Plasma CVD with silane or inorganic or organic silane derivatives as a source of silicon, inorganic compounds containing boron, phosphorus, and fluorine as a doping compounds, oxygen, and gas additives is described. RF plasma with certain plasma density is maintained throughout the entire deposition step in reactor chamber. Key feature of the invention's process is a silicon source to gas additive mole ratio, which is maintained depending on the used compound and deposition process conditions. Inorganic halide-containing compounds are used as gas additives. This feature provides the reaction conditions for the proper reaction performance that allows a deposition of a film with. good film integrity and void-free gap-fill within the steps of device structures.

Abstract: A method is described for forming gate sidewall spacers having different widths. The variation in spacer width allows for optimization of the MOSFET characteristics by changing the dimensions of the lightly doped source/drain extensions. The process is achieved using a method where the gate structure, comprising the gate electrode and gate oxide, is formed by conventional techniques upon a substrate. Lightly doped source drain extensions are implanted into the substrate not protected by the gate structure. The exposed substrate and gate structure are then covered with an insulating liner layer. This is followed by an etch stop layer deposition over the insulating liner layer. A first spacer oxide layer is then deposited over the etch stop layer. Areas where thicker spacers are desired are masked, and the unmasked spacer oxide layer is removed. The mask is then stripped away and additional spacer oxide is grown over the entire surface.

Abstract: A method for forming an L-shaped spacer using a sacrificial organic top coating. A semiconductor structure is provided having a gate structure thereon. A liner oxide layer is formed on the gate structure. A dielectric spacer layer is formed on the liner oxide layer. In the preferred embodiment, the dielectric spacer layer comprises a silicon nitride layer or a silicon oxynitride layer. A sacrificial organic layer is formed on the dielectric spacer layer. The sacrificial organic layer and the dielectric spacer layer are anisotropically etched to form spacers comprising a triangle-shaped sacrificial organic structure and an L-shaped dielectric spacer. The triangle-shaped sacrificial organic structure is removed leaving an L-shaped dielectric spacer.

Abstract: A method of etching silicon nitride spacers beside a gate structure comprising: providing a gate electrode over a gate oxide layer on a substrate. A liner oxide layer is provided over the substrate and the gate electrode. A silicon nitride layer is provided over the liner oxide layer. The invention's nitride etch recipe is performed in a plasma etcher to anisotropically etch the silicon nitride layer to create spacers. The nitride etch recipe comprises a main etch step and an over etch step. The main etch step comprises the following conditions: a Cl2 flow between 35 and 55 molar %, a He flow between 35 and 55 molar %, a backside He pressure between 4 and 10 torr; and a HBr flow between 7.5 and 12.5 molar %; a pressure between 400 to 900 mTorr; at a power between 300 and 600 Watts. The etch recipe provides a spacer width to nitride layer thickness ratio of about 1:1 and does not pit the Si substrate surface.

Abstract: A process for forming salicided CMOS devices, and non-salicide CMOS devices, on the same semiconductor substrate, using only one silicon nitride layer to provide a component for a composite spacer on the sides of the salicided CMOS devices, and to provide a blocking shape during metal silicide formation, for the non-salicided CMOS devices, has been developed. The process features the use of a disposable organic spacer, on the sides of polysilicon gate structures, used to define the heavily doped source/drain regions, for all CMOS devices. A silicon nitride layer, obtained via LPCVD procedures, at a temperature between 800 to 900° C., is then deposited and patterned to provide the needed spacer, on the sides of the CMOS devices experiencing the salicide process, while the same silicon nitride layer is used to provide the blocking shape needed to prevent metal suicide formation for the non-salicided CMOS devices.

Abstract: A new method of forming silicon nitride sidewall spacers has been achieved. This method is used to fabricate tapered, L-shaped spacer profiles using a two-step etching process that can be performed insitu. In accordance with the objects of this invention, a new method of forming silicon nitride sidewall spacers has been achieved. An isolation region is provided overlying a semiconductor substrate. Conductive traces are provided overlying the insulator layer. A liner oxide layer is deposited overlying the conductive traces and the insulator layer. A silicon nitride layer is deposited overlying the liner oxide layer. The silicon nitride layer is anisotropically etched down to reduce the vertical thickness of the silicon nitride layer while not exposing the underlying liner oxide layer. The silicon nitride layer is etched through to form silicon nitride sidewall spacers adjacent to the conductive traces.

Abstract: A method to make a self-aligned floating gate in a memory device. The method patterns the floating gate (FG) using the trench etch for the shallow trench isolation (STI). Because the floating gate (FG) is adjacent to the raised STI, sharp corners are eliminated between the FG and CG thereby increasing the effectiveness of the intergate dielectric layer. The method includes: forming an first dielectric layer (gate oxide) and a polysilicon layer over a substrate, etching through the first dielectric oxide layer and the polysilicon layer and into the substrate to form a trench. The remaining first dielectric layer and polysilicon layer function as a tunnel dielectric layer and a floating gate. The trench is filled with an isolation layer. The masking layer is removed. An intergate dielectric layer and a control gate are formed over the floating gate and the isolation layer.

Abstract: A method for fabricating a high-density high-capacity capacitor is described. A dielectric layer is provided overlying a semiconductor substrate. A sacrificial layer is deposited overlying the dielectric layer and patterned to form a pattern having a large surface area within a small area on the substrate. In one alternative, spacers are formed on sidewalls of the patterned sacrificial layer. Thereafter, the sacrificial layer is removed. A bottom capacitor plate layer is conformally deposited overlying the spacers. In a second alternative, a bottom capacitor plate layer is deposited overlying the patterned sacrificial layer and etched to leave spacers on sidewalls of the patterned sacrificial layer. Thereafter, the sacrificial layer is removed. In both alternatives, a capacitor dielectric layer is deposited overlying the bottom capacitor plate layer.

Abstract: The invention is a method of characterizing the frequency response of the servo control system in a disk drive having a sampled servo system having a sampling rate and a nominal bandwidth, wherein the sampled servo system comprises a plant and a servo controller that controls the plant using a compensator and a gain element with a nominal open loop gain. The invention is, in more detail, a method for adaptively modifying the servo controller to compensate for plant variations which are incompatible with the nominal gain and bandwidth, including the steps of implementing a self-generated bode plot to determine a gain margin and a phase margin, and if the gain margin is not greater than a predetermined minimum, adjusting the open loop gain of the servo controller to provide a gain margin which is greater than the predetermined minimum at a bandwidth which is different than the nominal bandwidth; and adjusting the compensator to provide a phase margin which is greater than a predetermined minimum.

Abstract: A method for forming an L-shaped spacer using a sacrificial organic top coating, then using the L-shaped spacer to simultaneously implant lightly doped source and drain extensions through the L-shaped spacer while implanting source and drain regions beyond the L-shaped spacer. A semiconductor structure is provided having a gate structure thereon. A liner oxide layer is formed on the gate structure. A dielectric spacer layer is formed on the liner oxide layer. In the preferred embodiments, the dielectric spacer layer comprises a silicon nitride layer or a silicon oxynitride layer. A sacrificial organic layer is formed on the dielectric spacer layer. The sacrificial organic layer and the dielectric spacer layer are anisotropically etched to form spacers comprising a triangle-shaped sacrificial organic structure and an L-shaped dielectric spacer. The triangle-shaped sacrificial organic structure is removed leaving an L-shaped dielectric spacer.

Abstract: The present invention provides a 120-kDa protein gene of Ehrlichia canis, amplified by PCR using primers derived from the DNA sequences flanking the Ehrlichia chaffeensis 120-kDa protein gene. The recombinant E. canis 120-kDa protein contains 14 tandem repeat units with 36 amino acids each. The repeat units are hydrophilic and predicted to be surface-exposed. Also disclosed is that the recombinant E. canis 120-kDa protein is antigenic and reacts with sera from dogs convalescent from canine ehrlichiosis.