Patents by Inventor Jie Zeng

Jie Zeng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12243271
    Abstract: This application discloses a calibration method, a calibration system, and a calibration board. The calibration board includes checkerboard cells arranged on a surface of the calibration board, where at least one dot is arranged in each of the checkerboard cells, the dots of the calibration board include at least a first feature dot and a second feature dot, the first feature dot and the second feature dot are arranged in the checkerboard cells according to a random rule or a specific rule, and a diameter of the first feature dot is greater than a diameter of the second feature dot. The calibration board in this application improves the stability and accuracy of calibration board detection by utilizing characteristics such as a high detection accuracy and a strong anti-blur capability of a dot mark, combining with corner points of checkerboard cells.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: March 4, 2025
    Assignee: Orbbec Inc.
    Inventors: Lihua Wu, Xianzhuo Liu, Minjian Pang, Zhiming Huang, Xiaomeng Wang, Jie Zeng, Hongfei Yang
  • Publication number: 20250056429
    Abstract: This disclosure describes techniques for transmitting, at a transmit power level, a plurality of audio packets over a Bluetooth connection to a peripheral device paired with the wireless device. The wireless device receives one or more NACK frames from the peripheral device, each NACK frame indicating a number of the transmitted audio packets that were not successfully decoded by the peripheral device. The wireless device obtains a percentage of the plurality of transmitted audio packets that were not successfully decoded by the peripheral device. and obtains signal strengths of one or more of the plurality of audio packets transmitted to the peripheral device. The wireless device selectively adjusts the transmit power level based on the percentage and the signal strengths.
    Type: Application
    Filed: February 24, 2022
    Publication date: February 13, 2025
    Inventors: Xie YINGCHAO, Jie ZENG, Runyuan LIU, Peng CHEN
  • Patent number: 12165547
    Abstract: A rollable display device, including a housing and a display panel, is provided. The housing includes an accommodating housing, and the accommodating housing includes an internal accommodating space. The display panel at least includes a first display region and a second display region and can be switched between a rolled-up state and an unrolled state. When in the rolled-up state, the first display region is rolled up in an accommodating space, and the second display region is located outside the accommodating housing and is configured to display. When in the unrolled state, the first display region is rolled out of the accommodating housing.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: December 10, 2024
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Jie Zeng
  • Publication number: 20240363619
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to high-voltage electrostatic discharge (ESD) devices and methods of manufacture. The structure includes a semiconductor material of a first dopant type; a first well having a second dopant type in the semiconductor material; a floating well in the first well, the second well having the first dopant type; and a diffusion region of the second dopant type adjacent to the floating well and in electrical contact to the first well.
    Type: Application
    Filed: April 27, 2023
    Publication date: October 31, 2024
    Inventors: Kyong Jin HWANG, Jie ZENG, Ajay AJAY
  • Publication number: 20240321864
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to silicon control rectifiers and methods of manufacture. The structure includes: a first well in a semiconductor substrate; a second well in the semiconductor substrate; a third well in the semiconductor substrate which isolates the first well from the second well; and a first diffusion region at a surface of the semiconductor substrate and which extends into the first well and the second well, the first diffusion region includes a same polarity as the third well.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 26, 2024
    Inventors: Jie ZENG, Sagar P. KARALKAR
  • Publication number: 20240304613
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to silicon controlled rectifiers with field plate structures and methods of manufacture. The structure includes: a plurality of wells of a first type in a semiconductor substrate; a well of a second type in the semiconductor substrate, the well of the second type surrounding the plurality of wells of the first type; an isolation structure surrounding the plurality of wells of the first type, the isolation structure isolating the well of the second type from the plurality of wells of the first type; and a plurality of field plates on the isolation structure, the plurality of field plates surround the plurality of wells of the first type.
    Type: Application
    Filed: March 7, 2023
    Publication date: September 12, 2024
    Inventor: Jie ZENG
  • Patent number: 12051690
    Abstract: Disclosed is a semiconductor structure including a semiconductor substrate (e.g., a P-substrate) and a symmetric BDSCR. The BDSCR includes, within the substrate, a first well (e.g., a low-doped deep Nwell) and, within the first well, symmetric side sections and a middle section positioned laterally between the side sections. Each side section includes: second and third wells (e.g., Pwells), where the third well is shallower than and has a higher conductivity level than the second well. Each middle section includes multiple floating wells including: two fourth wells (e.g., Nwells), which have a higher conductivity level than the first well, and a fifth well (e.g., another Pwell), which is positioned laterally between and shallower than the fourth wells. By incorporating the floating wells into the middle section, high current tolerance is improved.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: July 30, 2024
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Sagar Premnath Karalkar, Prantik Mahajan, Jie Zeng, Ajay Ajay, Milova Paul, Souvick Mitra
  • Publication number: 20240243118
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to electrostatic devices and methods of manufacture. The structure includes: a device having a collector, an emitter, and a base; an isolation structure extending between the base and the collector; a high resistivity film over the isolation structure; and a silicide blocking layer partially covering the high resistivity film, the isolation structure and the collector.
    Type: Application
    Filed: January 13, 2023
    Publication date: July 18, 2024
    Inventors: Jie ZENG, Kyong Jin HWANG, Namchil MUN, Shiang Yang ONG
  • Publication number: 20240170531
    Abstract: The disclosure provides a structure with a buried doped region, and methods to form the same. A structure may include a semiconductor substrate including a first well. A first terminal includes a first doped region in the first well. A second terminal includes a second doped region in the first well. The first well horizontally separates the first doped region from the second doped region. A first buried doped region is in the first well. The first buried doped region overlaps with, and is underneath, the first doped region. The first well vertically separates the first doped region from the first buried doped region.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 23, 2024
    Inventors: Sagar Premnath Karalkar, Jie Zeng, Souvick Mitra
  • Patent number: 11990466
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to improved turn-on voltage of high voltage electrostatic discharge device and methods of manufacture. The structure comprises a high voltage NPN with polysilicon material on an isolation structure located at a base region, the polysilicon material extending to at least one of a collector and emitter of a bipolar junction transistor (BJT), and the polysilicon material completely covering the base region of the BJT.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: May 21, 2024
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Kyong Jin Hwang, Robert J. Gauthier, Jr., Jie Zeng
  • Publication number: 20240145462
    Abstract: Structures for an electrostatic discharge control device and methods of forming same. The structure comprises a shallow trench isolation region positioned in a semiconductor substrate, and a heterojunction bipolar transistor structure. The heterojunction bipolar transistor structure includes a collector in the semiconductor substrate, an emitter, and a base positioned between a first portion of the collector and the emitter. The collector has a first conductivity type, the collector extends to a top surface of the semiconductor substrate, and the collector wraps about the shallow trench isolation region. The structure further comprises a doped region positioned in the collector adjacent to the shallow trench isolation region. The doped region has a second conductivity type opposite to the first conductivity type, and a second portion of the collector is positioned between the doped region and the top surface of the semiconductor substrate.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Inventors: Kyongjin Hwang, Alwyn Rebello, Jie Zeng
  • Publication number: 20240093589
    Abstract: Disclosed are a wireless remote control method and system for controllable rotary sliding guiding drilling. An upper end of a controllable rotary sliding guiding drilling mechanism is provided with a drill rod; and the wireless remote control system for controllable rotary sliding guiding drilling further comprises: an MWD arranged at a lower end of the controllable rotary sliding guiding drilling mechanism; a bent screw drill tool mounted at a lower end of the MWD; a drill bit mounted at a lower end of the bent screw drill tool, the drill bit being connected with the bent screw drill tool through a connector; and a clutch module mounted on the controllable rotary sliding guiding drilling mechanism, the clutch module comprising an electromagnetic valve, a processor, an internal pipe pressure sensor, an external pipe pressure sensor and a wireless data transmission module.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 21, 2024
    Inventors: Jianguo ZHAO, Qingyou LIU, Haiyan ZHU, Guorong WANG, Jie ZENG, Xu LUO, Xuecheng DONG, Xingming WANG
  • Publication number: 20240037301
    Abstract: The present invention relates to a three-dimensional acid fracturing method for carbonate reservoirs in long intervals, which sequentially comprises the following steps: S1: based on the distribution characteristics of porosity and permeability of the reservoir where the candidate well is located, the reservoirs are divided into Class I, Class II and Class III, and the required acid fracturing fracture density range ?ir of different types of reservoirs is determined according to the increase of production; S2: Determine the most economical fracture number Ne when the economic net present value NPV of candidate wells reaches the maximum in the fifth year based on interval length of different types of reservoirs in candidate wells and acid fracturing fracture density range ?ir determined by S1; S3: Determine the three-dimensional acid fracturing segmented fracture arrangement technology according to the completion mode of the candidate well and the most economical fracture number Ne determined by S2; S4: Based
    Type: Application
    Filed: April 19, 2023
    Publication date: February 1, 2024
    Inventors: Jianchun GUO, Bo GOU, Jichuan REN, Jie ZENG, Ting YU, Chi CHEN, Yingxian MA, Jie LAI, Xiao LI, Yu FAN, Weihua CHEN, Fei LIU
  • Patent number: 11862735
    Abstract: An electrostatic discharge (ESD) protection device including: a substrate including: a first, second and third doped regions, the second doped region disposed between the first and third doped regions, the second doped region has a first conductivity type and a first doping concentration and the first and third doped regions have a second conductivity type and a second doping concentration; first and second doped terminal regions disposed within the first and second doped regions, respectively; and a doped island region disposed within the second doped region, the first and second doped terminal regions and doped island region have the second conductivity type and a third doping concentration, the third doping concentration higher than the first and second doping concentrations; and conductive terminals respectively coupled to the doped terminal regions; and an insulation layer arranged on the substrate between the conductive terminals and covering at least the second doped region.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: January 2, 2024
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Jie Zeng, Raunak Kumar, Souvick Mitra
  • Publication number: 20230411535
    Abstract: Structures for a silicon-controlled rectifier and methods of forming a structure for a silicon-controlled rectifier. The structure includes a first well and a second well in a semiconductor substrate. The first well has a first conductivity type, and the second well has a second conductivity type opposite to the first conductivity type. The structure further includes a first terminal having a doped region that has a portion in the first well, and a second terminal including a second doped region that has a portion in the first well and a third doped region in the second well. The first and second doped regions have the second conductivity type, the third doped region has the first conductivity type, and the second doped region is positioned in a lateral direction between the first doped region and the third doped region.
    Type: Application
    Filed: May 17, 2022
    Publication date: December 21, 2023
    Inventors: Jie Zeng, Souvick Mitra
  • Patent number: 11848388
    Abstract: Structures for a silicon-controlled rectifier and methods of forming a structure for a silicon-controlled rectifier. The structure includes a first well and a second well in a semiconductor substrate. The first well has a first conductivity type, and the second well has a second conductivity type opposite to the first conductivity type. The structure further includes a first terminal having a doped region that has a portion in the first well, and a second terminal including a second doped region that has a portion in the first well and a third doped region in the second well. The first and second doped regions have the second conductivity type, the third doped region has the first conductivity type, and the second doped region is positioned in a lateral direction between the first doped region and the third doped region.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: December 19, 2023
    Assignee: GlobalFoundries Singapore Pte. Ltd.
    Inventors: Jie Zeng, Souvick Mitra
  • Publication number: 20230401984
    Abstract: A rollable display device, including a housing and a display panel, is provided. The housing includes an accommodating housing, and the accommodating housing includes an internal accommodating space. The display panel at least includes a first display region and a second display region and can be switched between a rolled-up state and an unrolled state. When in the rolled-up state, the first display region is rolled up in an accommodating space, and the second display region is located outside the accommodating housing and is configured to display. When in the unrolled state, the first display region is rolled out of the accommodating housing.
    Type: Application
    Filed: April 22, 2021
    Publication date: December 14, 2023
    Inventor: Jie ZENG
  • Patent number: 11824125
    Abstract: An electrostatic discharge (ESD) protection device is provided. The ESD protection device includes a substrate, an active region, a first terminal region, and a second terminal region. The substrate includes dopants having a first dopant conductivity. The active region is arranged over the substrate and has an upper surface. The first terminal region and the second terminal region are arranged in the active region laterally spaced apart from each other. The first terminal region and the second terminal region each include a well region having dopants of the first dopant conductivity and a first doped region arranged in the well region. The first doped region includes dopants having a second dopant conductivity.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: November 21, 2023
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Sagar Premnath Karalkar, James Jerry Joseph, Jie Zeng, Milova Paul, Kyong Jin Hwang
  • Patent number: 11776952
    Abstract: Structures for a silicon-controlled rectifier and methods of forming a structure for a silicon-controlled rectifier. The structure includes first and second wells in the semiconductor substrate, a first terminal including a first doped region in the first well, and a second terminal including a second doped region in the second well. The first well and the second doped region have a first conductivity type, and the second well and the first doped region have a second conductivity type opposite to the first conductivity type. First and second conductor layers are positioned on the semiconductor substrate. The first conductor layer partially overlaps with the first well, and the second conductor layer partially overlaps with the second well. A third doped region, which has the second conductivity type, is laterally positioned in the semiconductor substrate between the first and second conductor layers.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: October 3, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Sagar Premnath Karalkar, Jie Zeng, Milova Paul, Souvick Mitra
  • Patent number: 11758400
    Abstract: A commissioning tool for granting a network joining permit to network devices for joining a network includes a network install code generating unit for generating network install codes (NICs), a memory unit configured to save the NICs, a transmitter configured to transmit the NICs generated by the network install code generating unit to network devices and a network coordinating device. The commissioning tool also includes a user inter-face configured to receive user commands to transmit the NICs generated by the network install code generation unit, and a network control unit, the network control unit being in functional communication with the memory unit, the transmitter and the user interface. The network control unit is configured to instruct the transmitter to transmit the NICs upon receiving a command from the user over the user interface.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: September 12, 2023
    Assignee: LEDVANCE GMBH
    Inventors: Huajin Huang, Li Lu, Wuqiang Liao, Jie Zeng