Patents by Inventor Jimmy Fort

Jimmy Fort has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9099167
    Abstract: The disclosure relates to a method for detecting a current comprising: generating a bias current, transmitting the bias current to a feedback stage and a measurement stage connected to the measurement node receiving a current to be measured, slaving a voltage to the measurement node at a constant value by the measurement and feedback stages, transmitting to an output stage, a current circulating in the measurement stage, which depends on the bias current and the current to be measured, and converting a current circulating in the output stage into a voltage.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: August 4, 2015
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Jimmy Fort
  • Patent number: 9070697
    Abstract: A device for detecting a laser attack made on an integrated circuit chip comprises a bipolar transistor of a first type formed in a semiconductor substrate, that bipolar transistor comprising a parasitic bipolar transistor of a second type. A buried region, forming the base of the parasitic bipolar transistor, operates as a detector of the variations in current flowing caused by impingement of laser light on the substrate.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: June 30, 2015
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Fabrice Marinet, Jimmy Fort, Alexandre Sarafianos, Julien Mercier
  • Publication number: 20150153753
    Abstract: An adjustable bandgap reference voltage includes a first circuit for generating IPTAT, a second circuit for generating ICTAT, and an output module configured to generate the reference voltage. The first circuit includes a first amplifier connected to terminals of a core for equalizing voltages across the terminals, where the first amplifier has a first stage that is biased by the current inversely proportional to absolute temperature and is arranged according to a folded setup with first PMOS transistors arranged according to a common-gate setup. The first circuit also includes a feedback stage with an input connected to the first amplifier output. The feedback stage output is connected to the first stage input and to a terminal of the core. The second circuit includes a follower amplifier connected to a terminal of the core and separated from the first amplifier and the output module is connected to the feedback stage.
    Type: Application
    Filed: February 6, 2015
    Publication date: June 4, 2015
    Inventors: Jimmy Fort, Thierry Soude
  • Publication number: 20150145487
    Abstract: According to an embodiment, generating an adjustable bandgap reference voltage includes generating a current proportional to absolute temperature (PTAT). Generating the PTAT current includes equalizing voltages across the terminals of a core that is designed to be traversed by the PTAT current. Generating the adjustable bandgap reference also includes generating a current inversely proportional to absolute temperature (CTAT), summing the PTAT and the CTAT currents and generating the bandgap reference voltage based on the sum of the currents. Equalizing includes connecting-across the terminals of the core a first fed-back amplifier with at least one first stage arranged as a folded setup and including first PMOS transistors arranged according to a common-gate setup. Equalizing also includes biasing the first stage based on the CTAT current. The summation of the PTAT and CTAT currents is performed in the feedback stage of the first amplifier.
    Type: Application
    Filed: February 2, 2015
    Publication date: May 28, 2015
    Inventors: Jimmy Fort, Thierry Soude
  • Patent number: 9024602
    Abstract: The regulator with low dropout voltage comprises an error amplifier and an output stage comprising an output transistor and a buffer circuit comprising an input connected to the output node of the error amplifier, an output connected to the output transistor, a follower amplifier connected between the input and the output of the buffer circuit. The buffer circuit furthermore comprises a transistor active load connected to the output of the follower amplifier and a negative feedback amplifier arranged in common gate configuration and connected between the output of the follower amplifier and the gate of the transistor of the active load.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: May 5, 2015
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude
  • Publication number: 20150048459
    Abstract: A device for detecting a laser attack made on an integrated circuit chip comprises a bipolar transistor of a first type formed in a semiconductor substrate, that bipolar transistor comprising a parasitic bipolar transistor of a second type. A buried region, forming the base of the parasitic bipolar transistor, operates as a detector of the variations in current flowing caused by impingement of laser light on the substrate.
    Type: Application
    Filed: November 3, 2014
    Publication date: February 19, 2015
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Fabrice Marinet, Jimmy Fort, Alexandre Sarafianos, Julien Mercier
  • Patent number: 8952675
    Abstract: An adjustable bandgap reference voltage includes a first circuit for generating IPTAT, a second circuit for generating ICTAT, and an output module configured to generate the reference voltage. The first circuit includes a first amplifier connected to terminals of a core for equalizing voltages across the terminals, where the first amplifier has a first stage that is biased by the current inversely proportional to absolute temperature and is arranged according to a folded setup with first PMOS transistors arranged according to a common-gate setup. The first circuit also includes a feedback stage with an input connected to the first amplifier output. The feedback stage output is connected to the first stage input and to a terminal of the core. The second circuit includes a follower amplifier connected to a terminal of the core and separated from the first amplifier and the output module is connected to the feedback stage.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: February 10, 2015
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude
  • Patent number: 8947069
    Abstract: According to an embodiment, generating an adjustable bandgap reference voltage includes generating a current proportional to absolute temperature (PTAT). Generating the PTAT current includes equalizing voltages across the terminals of a core that is designed to be traversed by the PTAT current. Generating the adjustable bandgap reference also includes generating a current inversely proportional to absolute temperature (CTAT), summing the PTAT and the CTAT currents and generating the bandgap reference voltage based on the sum of the currents. Equalizing includes connecting-across the terminals of the core a first fed-back amplifier with at least one first stage arranged as a folded setup and including first PMOS transistors arranged according to a common-gate setup. Equalizing also includes biasing the first stage based on the CTAT current. The summation of the PTAT and CTAT currents is performed in the feedback stage of the first amplifier.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: February 3, 2015
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude
  • Publication number: 20150001938
    Abstract: An electronic circuit includes a functional circuit in series with at least one first current source between two terminals of application of a power supply voltage. The first current source is controllable between an operating mode where it delivers a fixed current, independent from the power consumption of said functional circuit, and an operating mode where it delivers a variable current, depending on the power consumption of the functional circuit.
    Type: Application
    Filed: June 26, 2014
    Publication date: January 1, 2015
    Inventor: Jimmy Fort
  • Patent number: 8907452
    Abstract: A device for detecting a laser attack in an integrated circuit chip formed in the upper P-type portion of a semiconductor substrate incorporating an NPN bipolar transistor having an N-type buried layer, including a detector of the variations of the current flowing between the base of said NPN bipolar transistor and the substrate.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: December 9, 2014
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Fabrice Marinet, Jimmy Fort, Alexandre Sarafianos, Julien Mercier
  • Publication number: 20140191578
    Abstract: The current signature of an electronic function is masked by controlling a current source that supplies power for the electronic function is controlled in a dynamically-varying manner. Excess current is detected and compared to a threshold. If the detected excess current meets the threshold, the operation of the electronic function is modified, for example by controlling a clock.
    Type: Application
    Filed: January 6, 2014
    Publication date: July 10, 2014
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Fabrice Marinet
  • Patent number: 8653885
    Abstract: The device for generating a reference current proportional to absolute temperature comprises processing means connected to the terminals of a core and designed to equalize the voltages across the terminals of the core, the core being designed to then be traversed by an internal current proportional to absolute temperature, and an output module designed to deliver to an output terminal the said reference current on the basis of the said internal current; the processing means comprise a self-biased amplifier possessing at least one first stage arranged according to a folded setup and comprising first PMOS transistors arranged in a setup of the common-gate type, and a feedback stage whose input is connected to the output of the amplifier and whose output is connected to the input of the first stage as well as to at least one terminal of the core.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: February 18, 2014
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude
  • Patent number: 8588021
    Abstract: Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell. Additional embodiments are disclosed.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: November 19, 2013
    Assignee: Atmel Corporation
    Inventors: Jimmy Fort, Thierry Soude, Nicolas Zammit
  • Publication number: 20130257401
    Abstract: The regulator with low dropout voltage comprises an error amplifier and an output stage comprising an output transistor and a buffer circuit comprising an input connected to the output node of the error amplifier, an output connected to the output transistor, a follower amplifier connected between the input and the output of the buffer circuit. The buffer circuit furthermore comprises a transistor active load connected to the output of the follower amplifier and a negative feedback amplifier arranged in common gate configuration and connected between the output of the follower amplifier and the gate of the transistor of the active load.
    Type: Application
    Filed: March 21, 2013
    Publication date: October 3, 2013
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude
  • Publication number: 20130241649
    Abstract: The regulator with a low dropout voltage comprises an error amplifier comprising a differential pair of input transistors and a circuit with folded cascode structure connected to the output of the said differential pair, an output stage connected to the output node of the error amplifier, and a Miller compensation capacitor connected between the output stage and the cascode node on the output side (XP) of the cascode circuit; the error amplifier furthermore comprises at least one inverting amplifier module in a feedback loop between the said cascode node and the gate of the cascode transistor of the cascode circuit connected between the said cascode node and the said output node.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 19, 2013
    Applicant: STMICROELECTRONICS (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude
  • Patent number: 8471636
    Abstract: A bias current is generated for an unbalanced differential pair that is proportional to the transconductance gain of the differential pair. When the transconductance gain varies (e.g., due to temperature variations), the bias current varies in proportion thereby maintaining a constant offset voltage. In some implementations, a voltage to current converter circuit generates the bias current from a constant reference voltage that is independent of temperature and voltage supply variations (e.g., a bandgap reference voltage).
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: June 25, 2013
    Assignee: Atmel Rousset S.A.S.
    Inventors: Jimmy Fort, Thierry Soude, Michel Cuenca, Florent Garcia, Franck Strazzieri
  • Publication number: 20130069623
    Abstract: The disclosure relates to a method for detecting a current comprising: generating a bias current, transmitting the bias current to a feedback stage and a measurement stage connected to the measurement node receiving a current to be measured, slaving a voltage to the measurement node at a constant value by the measurement and feedback stages, transmitting to an output stage, a current circulating in the measurement stage, which depends on the bias current and the current to be measured, and converting a current circulating in the output stage into a voltage.
    Type: Application
    Filed: September 4, 2012
    Publication date: March 21, 2013
    Applicant: STMICROELECTRONICS (ROUSSET) SAS
    Inventor: Jimmy Fort
  • Publication number: 20120300567
    Abstract: Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell. Additional embodiments are disclosed.
    Type: Application
    Filed: August 13, 2012
    Publication date: November 29, 2012
    Applicant: ATMEL CORPORATION
    Inventors: Jimmy Fort, Thierry Soude, Nicolas Zammit
  • Publication number: 20120293143
    Abstract: Generating an adjustable bandgap reference voltage comprises generating a current proportional to absolute temperature comprising an equalization of the voltages across the terminals of a core designed to then be traversed by the said current proportional to absolute temperature, generating a current inversely proportional to absolute temperature, summing these two currents and generating said bandgap reference voltage on the basis of the said sum of currents; the said equalization comprises a connection across the terminals of the core of a first fed-back amplifier possessing at least one first stage arranged as a folded setup and comprising first PMOS transistors arranged according to a common-gate setup, and a biasing of the said first stage on the basis of the said current inversely proportional to absolute temperature, the said summation of the two currents being performed in the feedback stage of the first amplifier.
    Type: Application
    Filed: May 16, 2012
    Publication date: November 22, 2012
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude
  • Publication number: 20120293239
    Abstract: The device for generating a reference current proportional to absolute temperature comprises processing means connected to the terminals of a core and designed to equalize the voltages across the terminals of the core, the core being designed to then be traversed by an internal current proportional to absolute temperature, and an output module designed to deliver to an output terminal the said reference current on the basis of the said internal current; the processing means comprise a self-biased amplifier possessing at least one first stage arranged according to a folded setup and comprising first PMOS transistors arranged in a setup of the common-gate type, and a feedback stage whose input is connected to the output of the amplifier and whose output is connected to the input of the first stage as well as to at least one terminal of the core.
    Type: Application
    Filed: May 16, 2012
    Publication date: November 22, 2012
    Applicant: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude