Patents by Inventor Jin BYUN

Jin BYUN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170347150
    Abstract: Provided is a video providing system. The video providing system includes a memory configured to store device information of a display device, an analyzer configured to receive an original video from the outside and analyze images in the original video, and a processor configured to generate, from the original video, video streams according to a streaming mode and control signals of the display device respectively corresponding to the video streams, based on device information of a display device and analysis information from the analyzer, and provide the video streams and the control signals to the display device.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 30, 2017
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Woojoo LEE, Sukho LEE, Kyung Jin BYUN, Sung Weon KANG
  • Patent number: 9831561
    Abstract: A reflective antenna apparatus according to an exemplary embodiment of the present invention includes a feeder which receives an electromagnetic wave from a transmitter and distributes the electromagnetic wave to the antenna apparatus; a sub reflector which has a step formed to generate an orbital angular momentum (OAM) mode electromagnetic wave; and a main reflector which has a step formed to generate the same electromagnetic wave as the OAM mode generated by the sub reflector and cancels the OAM mode electromagnetic wave generated by the sub reflector and an OAM mode electromagnetic wave generated by the main reflector to radiate the electromagnetic waves to a far field.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: November 28, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Woo Jin Byun, Yong Heui Cho, Young Seung Lee
  • Patent number: 9831936
    Abstract: Disclosed is a method for applying non-orthogonal multiple access in a multi-hop relay system constituted by a base station, a relay, a first user terminal, and a second user terminal, including: receiving, by the first user terminal, a first data signal which the first user terminal needs to receive and a second data signal which the second user terminal needs to receive from the base station through a first phase; receiving, by the first user terminal, a third data signal from the base station through a second phase when the second data signal is relayed through the second phase by the relay; and removing an interference signal included in the third data signal received through the second phase by using the second data signal which the first user terminal receives through the first phase.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: November 28, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jung-Bin Kim, Woo Jin Byun
  • Publication number: 20170272280
    Abstract: The present disclosure relates to a wireless communication apparatus capable of increasing throughput using MIMO in an LOS environment and a method for the same. A wireless communication apparatus based on the LOS-MIMO technique may comprise a multi-link configuration unit, a frequency response correction unit, a signal compensation unit, and a feedback unit. In the apparatus, an additional LOS-MIMO equalizer is used at the front of an LOS-MIMO estimator and a coding unit in order to compensate in-band frequency characteristics of frequency response characteristics estimated by the LOS-MIMO estimator and a signal channel estimator, whereby the LOS-MIMO estimation performance can be remarkably enhanced. Also, precise separation of multiplexed signals through the above-described LOS equalizer can make it possible to increase transmission capacity by using the LOS-MIMO which can be applied to high-order mode (e.g., over 16 quadrature amplitude modulation (QAM)) digital communications.
    Type: Application
    Filed: March 15, 2017
    Publication date: September 21, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang Seon KIM, Min Soo KANG, Bong Su KIM, Myung Sun SONG, Woo Jin BYUN
  • Publication number: 20170262011
    Abstract: Provided is a processor system including a first processor driven by a first driving voltage and a first driving clock, a second processor driven by a second driving voltage and a second driving clock and configured to perform an identical task to the first processor, and a defect detector configured to perform level synchronization or clock domain synchronization on a first output signal provided from the first processor and a second output signal provided from the second processor to compare the first and second output signals, wherein the first and second driving voltages are respectively provided from mutually independent power supply sources and the first and second driving clocks are respectively provided from mutually independent clock generators.
    Type: Application
    Filed: February 14, 2017
    Publication date: September 14, 2017
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Young-Su KWON, Kyung Jin BYUN, Nak Woong EUM
  • Publication number: 20170257632
    Abstract: Provided is an encoding method of an image encoding device including predicting an intra mode for coding blocks of a minimum size for intra prediction to generate an intra pixel; and using the intra mode of the coding blocks of the minimum size to restore an intra mode of coding blocks of a larger size.
    Type: Application
    Filed: August 9, 2016
    Publication date: September 7, 2017
    Inventors: Sukho LEE, Kyung Jin BYUN, Nak Woong EUM
  • Publication number: 20170255520
    Abstract: Provided is an operating method of a cache memory device includes receiving an address from an external device, reading an entry corresponding to at least a portion of the received address among a plurality of entries that are included in the cache memory, performing error detection on additional information that is included in the read entry, and performing a recovery operation on the entry based on a result of error detection and the additional information. The entry includes the additional information and a cache line corresponding to the additional information, and the additional information includes a tag, valid bit, and dirty bit that correspond to the cache line.
    Type: Application
    Filed: August 19, 2016
    Publication date: September 7, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jin Ho HAN, Young-Su KWON, Kyoung Seon SHIN, Kyung Jin BYUN, Nak Woong EUM
  • Publication number: 20170255554
    Abstract: Provided is a cache memory. The cache memory includes a first to Nth level-1 caches configured to correspond to first to Nth cores, respectively, a level-2 sharing cache configured to be shared by the first to Nth level-1 caches, and a coherence controller configured to receive an address from each of the first to Nth cores and allocate at least a partial area in an area of the level-2 sharing cache to one of the first to Nth level-1 caches based on the received address.
    Type: Application
    Filed: August 19, 2016
    Publication date: September 7, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jin Ho HAN, Young-Su KWON, Kyung Jin BYUN, Nak Woong EUM
  • Publication number: 20170222648
    Abstract: An Ultra Low Voltage (ULV) digital circuit includes a logic circuit comprising a plurality of logic gates and a plurality of buffered interconnects for connecting between the plurality of logic gates, a temperature sensor configured to detect a temperature of the logic circuit, and a voltage controller configured to control a driving voltage provided to the logic circuit in order to reduce a power consumption of the logic circuit based on the detected temperature. Each of the plurality of logic gates and buffered interconnects reduces a signal delay as a temperature increases.
    Type: Application
    Filed: January 24, 2017
    Publication date: August 3, 2017
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Woojoo LEE, Young-Su KWON, Kyung Jin BYUN, Jin Ho HAN, Nak Woong EUM
  • Publication number: 20170206102
    Abstract: An electronic device configured to perform forensic analysis on a target device includes a data extractor, an emulator, and a user data converter. The data extractor obtains, from the target device, a source file of at least one of applications installed on the target device. The data extractor obtains, from the target device, user data generated according to the least one of the applications being executed in the target device. The emulator emulates an execution of a target application installed based on the obtained source file. The user data converter converts the obtained user data having a data structure according to a database scheme of the target device into converted user data having a data structure according to a database scheme of the emulator. The emulator emulates the execution of the target application such that the target application operates using the converted user data.
    Type: Application
    Filed: January 17, 2017
    Publication date: July 20, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae-Jin LEE, Hyeong Uk JANG, Kyung Jin BYUN, Nak Woong EUM
  • Patent number: 9704547
    Abstract: A semiconductor apparatus may include a read path configured to transmit data from the semiconductor apparatus in response to a read command and at least one read operation control signal, and an operation control circuit configured to receive a plurality of divided clock signals and the read command to identify the one of the plurality of divided clock signals that is relatively better matched to the received read command to manage timings associated with at least one of the read operation control signals.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: July 11, 2017
    Assignee: SK hynix Inc.
    Inventors: Seok Bo Shim, Hee Jin Byun, Jong Ho Jung
  • Publication number: 20170194992
    Abstract: Provided are a multi-input multi-output system which overcomes a disadvantage that optimal receiving performance cannot be maintained according to an installation environment and a performance change of a receiver when a receiving module is configured by using a fixed attenuator and a fixed phase in a line-of-sight multi-input multi-output system configuration and analogously controls an interference removing module of a receiver including a variable attenuator and a phase shifter which are controllable to enhance a receiving performance and increase frequency efficiency, in order to maximize a signal-to-interference ratio of each path and an operating method thereof.
    Type: Application
    Filed: June 21, 2016
    Publication date: July 6, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Bong Su KIM, Min Soo KANG, Kwang Seon KIM, Woo Jin BYUN, Myung Sun SONG
  • Publication number: 20170192885
    Abstract: Provided is a multi-core simulation method including allocating, to a working memory, a shared translation block cache commonly used for a plurality of core models, reading a first target instruction to be performed in a first core model, generating a first translation block corresponding to the first target instruction and provided with an instruction set used in a host processor, performing the first translation block in the first core model after the first translation block is stored in the shared translation block cache, reading a second target instruction to be performed in a second core model, searching the shared translation block cache for a translation block including same content as that of the second target instruction, and performing the first translation block in the second core model, when the first target instruction includes same content as that of the second target instruction.
    Type: Application
    Filed: July 28, 2016
    Publication date: July 6, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae-Jin LEE, Kyung Jin BYUN, Nak Woong EUM
  • Publication number: 20170155467
    Abstract: An apparatus for orbital angular momentum (OAM) mode combination and an antenna apparatus for multi-mode generation are provided. The apparatus for OAM mode combination includes three input ports configured to receive independent OAM mode signals, four output ports configured to output OAM mode signals with the same or different phase delays; and a circuit element configured to simultaneously combine or distribute the OAM mode signals by controlling phases of output signals output through the four output ports to be different depending on the OAM mode signals received through the input ports.
    Type: Application
    Filed: August 30, 2016
    Publication date: June 1, 2017
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Min Soo KANG, Kwang Seon KIM, Myung Sun SONG, Woo Jin BYUN, Bong Su KIM
  • Patent number: 9632894
    Abstract: The present invention relates to an apparatus for computing an error rate comprising: a first circuit interface being connected to a first sub-circuit receiving data and computing output data through a predetermined computation process; a second circuit interface and being connected to a first test circuit receiving the same data, which is inputted to the first sub-circuit, and computing output data through the predetermined computation process; an error injecting part injecting an error to the first test circuit; an error detecting part comparing output data of the first sub-circuit to output data of the first test circuit; and an error rate computing part computing input node error probability of the first sub-circuit by statistic processing of the compared result. The apparatus and method for computing error rate of the present invention is able to shorten the time required to obtain error probability, compared to the direct simulation of the full circuit.
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: April 25, 2017
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jin-Ho Han, Young-Su Kwon, Kyung-Jin Byun
  • Publication number: 20170054487
    Abstract: The present invention relates to a reception apparatus. The reception apparatus includes a plurality of reception antennas; and a signal processing unit configured to use reception characteristic of the plurality of reception antennas, wherein the signal processing unit comprises a channel estimation unit configured to respectively estimate a channel response matrix of each signal received via the plurality of reception antennas, and a coding unit configured to define a coding matrix based on an inverse matrix of the estimated channel response matrix, and to obtain a final output signal corresponding to each reception antenna by applying the coding matrix to each received signal.
    Type: Application
    Filed: July 27, 2016
    Publication date: February 23, 2017
    Inventors: Mi Kyung SUK, Bong Su KIM, Min Soo KANG, Kwang Seon KIM, Woo Jin BYUN, Young Seung LEE
  • Publication number: 20170012695
    Abstract: Disclosed is a method for applying non-orthogonal multiple access in a multi-hop relay system constituted by a base station, a relay, a first user terminal, and a second user terminal, including: receiving, by the first user terminal, a first data signal which the first user terminal needs to receive and a second data signal which the second user terminal needs to receive from the base station through a first phase; receiving, by the first user terminal, a third data signal from the base station through a second phase when the second data signal is relayed through the second phase by the relay; and removing an interference signal included in the third data signal received through the second phase by using the second data signal which the first user terminal receives through the first phase.
    Type: Application
    Filed: April 7, 2016
    Publication date: January 12, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jung-Bin KIM, Woo Jin BYUN
  • Patent number: 9543789
    Abstract: Disclosed are an apparatus and a method for transmitting/receiving wireless energy in an energy transmission system. The apparatus includes: a transmitting controller configured to generate a wireless energy signal; a transmitting resonance body port configured to transmit the wireless energy signal; and a transmitting resonance body configured to transmit the wireless energy signal transmitted through the transmitting resonance body port to receiving apparatuses, wherein the transmitting controller transmits impedance control signals for controlling impedance of each of the receiving resonance body ports of the plurality of receiving apparatuses.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: January 10, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seong-Min Kim, In-Kui Cho, Jung-Ick Moon, Je-Hoon Yun, Sang-Hoon Cheon, Yong-Hae Kim, Myung-Lae Lee, Seung-Youl Kang, Woo-Jin Byun
  • Patent number: 9543790
    Abstract: A method includes matching a basic mode frequency signal and a higher order mode frequency signal to a multi-band frequency signal with respect to a signal in the form of the square wave, transferring the matched basic mode frequency signal and higher order mode frequency signal simultaneously to a multi-resonance reception resonator, converting output impedance of the basic mode frequency and the higher order mode frequency which are received through the reception resonator into a conjugate value of input impedance of the basic mode frequency and the higher order mode frequency of a receiver, and converting the converted multi-band frequency signal into an electric power that is required in a load and transferring the electric power to the load.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: January 10, 2017
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seong-Min Kim, Jung Ick Moon, In Kui Cho, Woo Jin Byun
  • Patent number: 9537225
    Abstract: A method for use with a reflectarray antenna for wireless telecommunication is described. The method involves providing a reflectarray antenna, and adjusting a phase of a scattered field of the reflectarray antenna for generating different radiation patterns for angular mode-based multiplexing. The reflectarray antenna includes a ground plane, a dielectric substrate attached on the ground plane; and a first antenna patch formed on one side of the dielectric substrate. Further, the reflectarray antenna includes a second antenna patch formed adjacent to the first antenna patch with a separation area therebetween; and a phase adjustment member disposed in the separation area. The phase of the scattered field of the antenna is adjusted by changing a DC voltage of the phase adjustment member.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: January 3, 2017
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Woo Jin Byun, Yong Heui Cho, Min Soo Kang, Kwang Seon Kim, Bong-Su Kim