Patents by Inventor Jin Ha Jeong
Jin Ha Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8927367Abstract: A method of fabricating a semiconductor device may include patterning a substrate to form trenches, forming a sacrificial layer to cover inner surfaces of the trenches, the sacrificial layer having a single-layered structure, forming sacrificial patterns by isotropically etching the sacrificial layer such that the sacrificial layer remains on bottom surfaces of the trenches, forming lightly doped regions in sidewalls of the trenches using the sacrificial patterns as an ion mask, removing the sacrificial patterns, and sequentially forming a gate insulating layer and a gate electrode layer in the trenches.Type: GrantFiled: January 8, 2013Date of Patent: January 6, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Yongsang Jeong, Vladimir Urazaev, Jin Ha Jeong, Changhun Lee
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Publication number: 20140256112Abstract: Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers.Type: ApplicationFiled: February 28, 2014Publication date: September 11, 2014Inventors: Ki-Yeon Park, Jae-Hyoung Choi, Vladimir Urazaev, Jin-Ha Jeong
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Patent number: 8809943Abstract: A three dimensional semiconductor memory device includes an electrode structure having a plurality of conductive electrode patterns and insulating patterns alternatingly stacked on a substrate. Opposite sidewalls of the electrode structure include respective grooves therein extending in a direction substantially perpendicular to the substrate. First and second active patterns protrude from the substrate and extend within the grooves in the opposite sidewalls of the electrode structure, respectively. Respective data storing layers extend in the grooves between the conductive electrode patterns of the electrode structure and sidewalls of the first and second active patterns adjacent thereto. Related fabrication methods are also discussed.Type: GrantFiled: April 26, 2012Date of Patent: August 19, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-Soo Lim, Vladimir Urazaev, Jin Ha Jeong, Hansoo Kim, Heayun Lee
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Publication number: 20140218710Abstract: A method of forming a reticle includes: loading a blank reticle; projecting an electron beam; moving a second aperture plate having a first pattern aperture and a second pattern aperture so that the first pattern aperture is directly overlapped by a first aperture of a first aperture plate, the electron beam passing through the first pattern aperture after passing the first aperture; exposing the blank reticle with the electron beam after the electron beam passes the first pattern aperture, to form a first exposure pattern; moving the second aperture plate so that the second pattern aperture is directly overlapped by the first aperture of the first aperture plate, the electron beam passing through the second pattern aperture after passing the first aperture; exposing the blank reticle with the electron beam after the electron beam passes the second pattern aperture, to form a second exposure pattern; and developing the blank reticle having the first and second exposure patterns to form the reticle having firsType: ApplicationFiled: April 9, 2014Publication date: August 7, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jin CHOI, Jin-Ha JEONG, Urazaev VLADIMIR, Hea-Yun LEE
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Publication number: 20140151859Abstract: A semiconductor package includes a substrate in which a plurality of wires are formed; at least one semiconductor chip electrically connected to portions of the plurality of wires; and a shielding can mounted on the substrate, surrounding the at least one semiconductor chip, electrically connected to at least one wire of the plurality of wires and including a soft magnetic material. The semiconductor package can prevent or substantially reduce electromagnetic interference (EMI).Type: ApplicationFiled: February 5, 2014Publication date: June 5, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Yong-hoon Kim, Hee-Seok Lee, Jin-ha Jeong
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Patent number: 8697317Abstract: A method including loading a blank reticle; projecting an electron beam; moving a second aperture plate having a first and second pattern aperture so the first pattern aperture is overlapped by a first aperture of a first aperture plate, the electron beam passing through the first pattern aperture after passing the first aperture; exposing the blank reticle with the electron beam that passes the first pattern aperture to form a first exposure pattern; moving the second aperture plate so the second pattern aperture is overlapped by the first aperture of the first aperture plate, the electron beam passing through the second pattern aperture after passing the first aperture; exposing the blank reticle with the electron beam after passing the second pattern aperture, to form a second exposure pattern; and developing the blank reticle having the first and second exposure patterns to form the reticle having first and second patterns.Type: GrantFiled: August 1, 2012Date of Patent: April 15, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Jin Choi, Jin-Ha Jeong, Urazaev Vladimir, Hea-Yun Lee
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Patent number: 8664751Abstract: A semiconductor package includes a substrate in which a plurality of wires are formed; at least one semiconductor chip electrically connected to portions of the plurality of wires; and a shielding can mounted on the substrate, surrounding the at least one semiconductor chip, electrically connected to at least one wire of the plurality of wires and including a soft magnetic material. The semiconductor package can prevent or substantially reduce electromagnetic interference (EMI).Type: GrantFiled: May 25, 2011Date of Patent: March 4, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Yong-hoon Kim, Hee-Seok Lee, Jin-ha Jeong
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Publication number: 20140042528Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a device isolation region, a trench formed in the device isolation region, a void connected to the trench in the device isolation region, a first mask pattern formed along sidewalls of the trench and protruding inwardly with respect to the void, a gate insulating film formed along the sidewall of the void, and a gate electrode filling the trench and at least a portion of the void.Type: ApplicationFiled: August 6, 2013Publication date: February 13, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Dong-Il Park, Ae-Gyeong Kim, Jong-Sam Kim, Kyoung-Eun Uhm, Tae-Cheol Lee, Yong-Sang Jeong, Jin-Ha Jeong
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Patent number: 8609305Abstract: In a method of forming a reticle and electron beam exposure system, first electron beams are irradiated onto a first region of a blank reticle having a light shielding layer and a photosensitive layer, to form first shot patterns. Second electron beams having a cross-sectional area larger than the first electron beams are irradiated onto a second region of the blank reticle. The photosensitive layer is developed to form first and second mask patterns at the first and second regions, respectively. The light shielding layer is etched off using the first and second mask patterns as an etching mask, thereby forming the mother pattern including a first pattern in the first region and a second pattern in the second region. Accordingly, the enlargement of the second electron beams reduces the scan time for the blank reticle, thereby reducing the process time.Type: GrantFiled: April 10, 2012Date of Patent: December 17, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jin Choi, Jin-Ha Jeong, Urazaev Vladimir, Hea-Yun Lee
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Patent number: 8587096Abstract: Example embodiments relate to a semiconductor device. The semiconductor device may include a first semiconductor chip including a semiconductor substrate, a first through via that penetrates the semiconductor substrate, a second semiconductor chip stacked on one plane of the first semiconductor chip, and a shielding layer covering at least one portion of the first and/or second semiconductor chip and electrically connected to the first through via.Type: GrantFiled: June 29, 2011Date of Patent: November 19, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Yong-hoon Kim, Hee-seok Lee, Jin-Ha Jeong, Ji-hyun Lee
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Patent number: 8563951Abstract: Exposure systems include a beam generator, which is configured to irradiate source beams in a direction of an object to be exposed by the source beams, along with first and second beam shapers. The first beam shaper, which is disposed proximate the beam generator, has a first aperture therein positioned to pass through the source beams received from the beam generator. The second beam shaper is disposed proximate the first beam shaper. The second beam shaper includes a plate having a second aperture therein, which is positioned to receive the source beams that are passed through the first aperture of the first beam shaper. The second beam shaper further includes a first actuator and a first shift screen mechanically coupled to the first actuator.Type: GrantFiled: March 14, 2012Date of Patent: October 22, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jin Choi, Jin-Ha Jeong, Vladimir Urazaev, Hea-Yun Lee
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Patent number: 8491499Abstract: Provided is a system for sampling and pretreating biological fluid. It comprises: a piercing unit having at a lower portion a capillary tip which is to be inserted into skin to a predetermined depth to take biological fluid therethrough; a dropper, connected to an upper portion of the piercing unit, having an injection tube at an upper portion thereof, the injection tube communicating with the capillary tip; and a reagent container, designed to accommodate the piercing unit therein in an airtight manner so as to seal an outer circumference of the piercing unit, functioning to contain a reagent for treating the biological fluid of the capillary tip of the piercing unit. The system allows even a novice to sample and pretreat biological fluid with high accuracy without the use of expensive precision devices. The system employs fewer expendable supplies, thus providing higher convenience for the user.Type: GrantFiled: October 21, 2008Date of Patent: July 23, 2013Assignee: Boditechmed IncInventors: Eui Yul Choi, Kie Bong Nahm, Jae Hoon Kim, Dong Seok Jeong, Sang Yeol Park, Joung Dae Moon, Jin Ha Jeong, Young Min Kim, So Young Jung, Ae Kyung Park, Byeong Chul Kim
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Patent number: 8445317Abstract: Methods for fabricating a semiconductor device are provided. In the methods, first material layers and second material layers may be alternatingly and repeatedly stacked on a substrate. An opening penetrating the first material layers and the second material layers may be formed. A semiconductor solution may be formed in the opening by using a spin-on process.Type: GrantFiled: February 18, 2011Date of Patent: May 21, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jin Ha Jeong, Jung-Ho Kim, Kihyun Hwang, Yong-Hoon Son
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Publication number: 20130052569Abstract: A method including loading a blank reticle; projecting an electron beam; moving a second aperture plate having a first and second pattern aperture so the first pattern aperture is overlapped by a first aperture of a first aperture plate, the electron beam passing through the first pattern aperture after passing the first aperture; exposing the blank reticle with the electron beam that passes the first pattern aperture to form a first exposure pattern; moving the second aperture plate so the second pattern aperture is overlapped by the first aperture of the first aperture plate, the electron beam passing through the second pattern aperture after passing the first aperture; exposing the blank reticle with the electron beam after passing the second pattern aperture, to form a second exposure pattern; and developing the blank reticle having the first and second exposure patterns to form the reticle having first and second patterns.Type: ApplicationFiled: August 1, 2012Publication date: February 28, 2013Inventors: Jin CHOI, Jin-Ha Jeong, Urazaev Vladimir, Hea-Yun Lee
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Publication number: 20120292535Abstract: Exposure systems include a beam generator, which is configured to irradiate source beams in a direction of an object to be exposed by the source beams, along with first and second beam shapers. The first beam shaper, which is disposed proximate the beam generator, has a first aperture therein positioned to pass through the source beams received from the beam generator. The second beam shaper is disposed proximate the first beam shaper. The second beam shaper includes a plate having a second aperture therein, which is positioned to receive the source beams that are passed through the first aperture of the first beam shaper. The second beam shaper further includes a first actuator and a first shift screen mechanically coupled to the first actuator.Type: ApplicationFiled: March 14, 2012Publication date: November 22, 2012Inventors: Jin Choi, Jin-Ha Jeong, Vladimir Urazaev, Hea-Yun Lee
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Publication number: 20120288787Abstract: In a method of forming a reticle and electron beam exposure system, first electron beams are irradiated onto a first region of a blank reticle having a light shielding layer and a photosensitive layer, to form first shot patterns. Second electron beams having a cross-sectional area larger than the first electron beams are irradiated onto a second region of the blank reticle. The photosensitive layer is developed to form first and second mask patterns at the first and second regions, respectively. The light shielding layer is etched off using the first and second mask patterns as an etching mask, thereby forming the mother pattern including a first pattern in the first region and a second pattern in the second region. Accordingly, the enlargement of the second electron beams reduces the scan time for the blank reticle, thereby reducing the process time.Type: ApplicationFiled: April 10, 2012Publication date: November 15, 2012Inventors: Jin Choi, Jin-Ha Jeong, Urazaev Vladimir, Hea-Yun Lee
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Publication number: 20120273872Abstract: A three dimensional semiconductor memory device includes an electrode structure having a plurality of conductive electrode patterns and insulating patterns alternatingly stacked on a substrate. Opposite sidewalls of the electrode structure include respective grooves therein extending in a direction substantially perpendicular to the substrate. First and second active patterns protrude from the substrate and extend within the grooves in the opposite sidewalls of the electrode structure, respectively. Respective data storing layers extend in the grooves between the conductive electrode patterns of the electrode structure and sidewalls of the first and second active patterns adjacent thereto. Related fabrication methods are also discussed.Type: ApplicationFiled: April 26, 2012Publication date: November 1, 2012Inventors: Jin-Soo Lim, Vladimir Urazaev, Jin Ha Jeong, Hansoo Kim, Heayun Lee
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Patent number: 8236673Abstract: A method of fabricating a vertical NAND semiconductor device can include changing a phase of a first preliminary semiconductor layer in an opening from solid to liquid to form a first single crystalline semiconductor layer in the opening and then forming a second preliminary semiconductor layer on the first single crystalline semiconductor layer. The phase of the second preliminary semiconductor layer is changed from solid to liquid to form a second single crystalline semiconductor layer that combines with the first single crystalline semiconductor layers to form a single crystalline semiconductor layer in the opening.Type: GrantFiled: February 10, 2011Date of Patent: August 7, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Yong-hoon Son, Jin-ha Jeong, Jung-ho Kim, Vladimir Urazaev, Jong-hyuk Kang, Sung-woo Hyun
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Publication number: 20120159974Abstract: A refrigerator, the temperature of the inside of which is uniformly controlled, and a control method thereof. The direction of an air flow in a storage chamber is periodically changed so as to uniformly distribute cool air in the storage chamber by interchanging roles of suction and discharge holes in various manners under various conditions, thereby preventing local supercooling and thus uniformly maintaining the internal temperature of the storage chamber.Type: ApplicationFiled: December 7, 2011Publication date: June 28, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jeong Su HAN, Kee Hwan KA, Hyo Sang LEE, Jin Ha JEONG, Jun hoe CHOI, Ji Hoon HA, Tae Gyoon NOH
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Publication number: 20120153796Abstract: A refrigerator includes a main body, a storage compartment provided in the main body and including a storage space, a partition plate to divide the storage space, and a storage container supported by the partition plate. The storage container includes a container body defining the external appearance of the storage container and having a top opening, a thickness reinforced portion formed at the lower part of the container body to prevent temperature of the lower part of the container body from rapidly changing by cold air of the storage compartment, and a thermal insulating member provided in a space between the thickness reinforced portion and the container body.Type: ApplicationFiled: December 13, 2011Publication date: June 21, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jeong Su HAN, In Sang Jeon, Duke Kimm, Kwang Hoon Lee, Sung Soo Lee, Jung Bae Kim, Hyung Jin Seo, Song Kyoo Kim, Jin Ha Jeong