Patents by Inventor Jin Ha Kim

Jin Ha Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170137856
    Abstract: The present invention relates to the development of an L-arabinose isomerase variant from Thermotoga neapolitana DSM 5068, which is a kind of thermophile, on the basis of protein molecular modeling. Moreover, the present invention relates to a method of producing D-tagatose from D-galactose by using the enzyme or a microorganism of the genus Corynebacterium expressing the enzyme.
    Type: Application
    Filed: January 24, 2017
    Publication date: May 18, 2017
    Inventors: In Seok OH, Chang Gyeom KIM, Seung Hyun CHO, Seong Bo KIM, Yang Hee KIM, Kyong Yeon CHO, Sung Jae YANG, Jin Ha KIM
  • Publication number: 20170107919
    Abstract: A method for analyzing a driving pattern of a vehicle includes setting a driving pattern measurement condition, measuring a driving pattern, deducing an engine operating region for the measured driving pattern from an engine control map, calculating each weighting determined according to a distance from the measured driving pattern to each vertex of the engine operating region, accumulating each calculated weighting for each coordinate of the engine operating region, determining whether a current measurement condition departs from the set measurement condition, and calculating a weighting factor for each coordinate under the set measurement condition when the current measurement condition departs from the set measurement condition, wherein, in the step of deducing an engine operating region, the engine operating region refers to a virtual block defined by four vertex coordinates of a pixel, in which the measured driving pattern is present, in the engine control map.
    Type: Application
    Filed: May 6, 2016
    Publication date: April 20, 2017
    Inventor: Jin-Ha KIM
  • Publication number: 20170084740
    Abstract: A 3D semiconductor integrated circuit device and a method of manufacturing the same are provided. An active pillar is formed on a semiconductor substrate, and an interlayer insulating layer is formed so that the active pillar is buried in the interlayer insulating layer. The interlayer insulating layer is etched to form a hole so that the active pillar and a peripheral region of the active pillar are exposed. An etching process is performed on the peripheral region of the active pillar exposed through the hole by a certain depth, and a space having the depth is provided between the active pillar and the interlayer insulating layer. A silicon material layer is formed to be buried in the space having the depth, and an ohmic contact layer is formed on the silicon material layer and the active pillar.
    Type: Application
    Filed: December 6, 2016
    Publication date: March 23, 2017
    Inventors: Jin Ha KIM, Jun Kwan KIM, Kang Sik CHOI, Su Jin CHAE, Young Ho LEE
  • Patent number: 9593321
    Abstract: The present invention relates to the development of an L-arabinose isomerase variant from Thermotoga neapolitana DSM 5068, which is a kind of thermophile, on the basis of protein molecular modeling. Moreover, the present invention relates to a method of producing D-tagatose from D-galactose by using the enzyme or a microorganism of the genus Corynebacterium expressing the enzyme.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: March 14, 2017
    Assignee: CJ Cheiljedang Corporation
    Inventors: In Seok Oh, Chang Gyeom Kim, Seung Hyun Cho, Seong Bo Kim, Yang Hee Kim, Kyong Yeon Cho, Sung Jae Yang, Jin Ha Kim
  • Publication number: 20170070716
    Abstract: A method of operating a mobile device and mobile systems are provided. The method includes detecting a first event through an interface of the mobile device, displaying scene data that is generated by a camera of the mobile device on a display of the mobile device, in response to the detecting first event, detecting a second event through the interface, and measuring an external color temperature in response to the detecting the second event. The method further includes generating flash data having a color temperature for compensating the external color temperature, displaying the flash data on the display, and capturing a scene using the camera.
    Type: Application
    Filed: May 24, 2016
    Publication date: March 9, 2017
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Moo-Youn PARK, Jin-Ha KIM
  • Patent number: 9543401
    Abstract: A 3D semiconductor integrated circuit device and a method of manufacturing the same are provided. An active pillar is formed on a semiconductor substrate, and an interlayer insulating layer is formed so that the active pillar is buried in the interlayer insulating layer. The interlayer insulating layer is etched to form a hole so that the active pillar and a peripheral region of the active pillar are exposed. An etching process is performed on the peripheral region of the active pillar exposed through the hole by a certain depth, and a space having the depth is provided between the active pillar and the interlayer insulating layer. A silicon material layer is formed to be buried in the space having the depth, and an ohmic contact layer is formed on the silicon material layer and the active pillar.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: January 10, 2017
    Assignee: SK Hynix Inc.
    Inventors: Jin Ha Kim, Jun Kwan Kim, Kang Sik Choi, Su Jin Chae, Young Ho Lee
  • Patent number: 9538071
    Abstract: In an electronic apparatus having a photographing function and a method of controlling the same, a qualitative description and a quantitative setting link with each other flexibly so as to provide a mixed linkage guide so that the qualitative description and the quantitative setting may be reused, and a qualitative description and a quantitative setting which will be added later may link with each other freely.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: January 3, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-kyung Kim, Jin-pyo Gwak, Hyun-ock Yim, Won-hyung Cho, Dae-hong Ki, Sung-ho Kim, Jin-ha Kim
  • Patent number: 9504271
    Abstract: A method for sterilizing microbial cells is provided. According to the method, microbial cells or a culture containing microbial cells are treated with a polyethylene glycol-based nonionic surfactant so that almost all of the microbial cells are sterilized while the enzyme activity expressed in the microbial cells is maintained at a high level. A method for sterilizing microbial cells and a material containing the sterilized microbial cells, in which the microbial cells are sterilized using a polyethylene glycol-based nonionic surfactant, can be used for foods so that the microbial cells are sterilized to be used in food production. Further, a material containing sterilized microbial cells can be used in processes for preparing tagatose, in which Corynebacterium genus microbial cells that produce Galactose and/or Arabinose isomerase are sterilized using a polyethylene glycol-based nonionic surfactant.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: November 29, 2016
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Jin Ha Kim, Young Mi Lee, Seong Bo Kim, Taek Beom Kim, Yang Hee Kim, Seung Won Park
  • Publication number: 20160333335
    Abstract: The present invention relates to the development of an L-arabinose isomerase variant from Thermotoga neapolitana DSM 5068, which is a kind of thermophile, on the basis of protein molecular modeling. Moreover, the present invention relates to a method of producing D-tagatose from D-galactose by using the enzyme or a microorganism of the genus Corynebacterium expressing the enzyme.
    Type: Application
    Filed: April 25, 2014
    Publication date: November 17, 2016
    Applicant: CJ Cheiljedang Corporation
    Inventors: In Seok OH, Chang Gyeom KIM, Seung Hyun CHO, Seong Bo KIM, Yang Hee KIM, Kyong Yeon CHO, Sung Jae YANG, Jin Ha KIM
  • Patent number: 9484798
    Abstract: A power control device and an image forming apparatus including the same are disclosed. A power control device meets the need for low power consumption by minimizing standby power consumption in a plug-on state of an electronic apparatus, and meets the safety requirements by increasing a discharging rate of an X-cap or an E-cap in a plug-off state. The power control device includes a first capacitor charged by AC power during input of the AC power, a rectifier converting the AC power to DC power, a second capacitor disposed at an output of the rectifier, and a discharge circuit including at least one discharge resistor, and a first switch and a second switch configured to be alternately turned on/off in response to supply and interruption of the AC power, and discharging at least one of the first and second capacitors via the at least one discharge resistor, in response to turn-off of the first switch and turn-on of the second switch.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: November 1, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jin Ha Kim
  • Patent number: 9427923
    Abstract: Provided is an food packing material, manufacturing method and mold thereof having hydrophobicity including a number of columns formed in one side of food packing material. The disclosure may provide food packing material, manufacturing method and mold thereof in which an amount of contents off a wall of the food packing material may be minimized by hydrophobicity.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: August 30, 2016
    Assignees: CJ CHEILJEDANG CORPORATION, KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jin Hwan Lee, Kyoung Sik Jo, Sang Wook Lee, Min Young Park, Sang Eon Lee, Kang Won Lee, Jin Ha Kim, Heon Kwang Lim, Seung Seob Lee
  • Publication number: 20160138994
    Abstract: The present invention provides an inertia test apparatus for a model ship that mimics a pitching inertia radius of an actual ship by reciprocating a model ship. The apparatus includes a base frame providing a supporting force, vertical frames integrally fixed at both sides of the base frame and having a hinge shaft on an upper end, a swing including a pair of fixing members rotatably hung on the hinge shafts of the vertical frames and a bed integrally formed at a lower ends of the fixing members, and providing a pitching inertia radius of the model ship by reciprocating about the hinge shafts, with the model ship seated on the bed, and a centering adjuster seating the model ship on the bed of the swing and matching a center of gravity of the model ship with a center of the swing by allowing the model ship to move.
    Type: Application
    Filed: October 7, 2015
    Publication date: May 19, 2016
    Inventors: In Bo Park, Sung Kwon Choi, Jin Ha Kim, Yeonguk Won, Young-Sik Kim, Hong Gun Sung, Sa Young Hong, Jang Pyo Hong, Suk Kyu Cho
  • Patent number: 9328896
    Abstract: A lens for controlling an illuminance distribution to realize high luminous flux efficiency by maintaining a required beam angle and uniformity on an illumination surface having a particular shape, such as a square shape, and a light-emitting diode (LED) package including the lens are provided. The lens includes an incidence surface onto which light emitted from a light-emitting device is incident, and an emission surface through which the light incident onto the incidence surface is emitted. An illuminance controller, which includes at least two optical devices, is disposed on the emission surface to control an illuminance distribution of the emission surface.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: May 3, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-ju Kim, Sang-woo Ha, Chin-woo Kim, Jin-ha Kim
  • Patent number: 9300127
    Abstract: An interface unit that interrupts overcurrent or overvoltage resulting from a ground voltage difference between electronic products interconnected through interface devices, so as to prevent damage to the products and risk of fire. The interface unit, which connects a first electronic product and a second electronic product to each other, includes a first interface device provided in the first electronic product and connected with the second electronic product, a second interface device provided in the second electronic product and connected with the first interface device through a VCC line and a ground line, and a ground overcurrent interrupter installed on the ground line, the ground overcurrent interrupter interrupting overcurrent flowing in the ground line.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: March 29, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jin Ha Kim
  • Publication number: 20160042960
    Abstract: A 3D semiconductor integrated circuit device and a method of manufacturing the same are provided. An active pillar is formed on a semiconductor substrate, and an interlayer insulating layer is formed so that the active pillar is buried in the interlayer insulating layer. The interlayer insulating layer is etched to form a hole so that the active pillar and a peripheral region of the active pillar are exposed. An etching process is performed on the peripheral region of the active pillar exposed through the hole by a certain depth, and a space having the depth is provided between the active pillar and the interlayer insulating layer. A silicon material layer is formed to be buried in the space having the depth, and an ohmic contact layer is formed on the silicon material layer and the active pillar.
    Type: Application
    Filed: November 13, 2014
    Publication date: February 11, 2016
    Inventors: Jin Ha KIM, Jun Kwan KIM, Kang Sik CHOI, Su Jin CHAE, Young Ho LEE
  • Patent number: 9257487
    Abstract: A 3D semiconductor integrated circuit having a gate pick-up line and a method of manufacturing the same, wherein the semiconductor integrated circuit includes a plurality of active pillars formed in a gate pick-up region, buffer layers formed on the respective active pillars in the gate pick-up region, gates each surrounding an outer circumference of the corresponding active pillar and the corresponding buffer layer, and a gate pick-up line electrically coupled to the gates.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: February 9, 2016
    Assignee: SK Hynix Inc.
    Inventors: Isaac Chung, Jin Ha Kim
  • Patent number: 9240479
    Abstract: A 3D semiconductor integrated circuit having a gate pick-up line and a method of manufacturing the same, wherein the semiconductor integrated circuit includes a plurality of active pillars formed in a gate pick-up region, buffer layers formed on the respective active pillars in the gate pick-up region, gates each surrounding an outer circumference of the corresponding active pillar and the corresponding buffer layer, and a gate pick-up line electrically coupled to the gates.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: January 19, 2016
    Assignee: SK Hynix Inc.
    Inventors: Isaac Chung, Jin Ha Kim
  • Publication number: 20160005859
    Abstract: A 3D semiconductor integrated circuit having a gate pick-up line and a method of manufacturing the same, wherein the semiconductor integrated circuit includes a plurality of active pillars formed in a gate pick-up region, buffer layers formed on the respective active pillars in the gate pick-up region, gates each surrounding an outer circumference of the corresponding active pillar and the corresponding buffer layer, and a gate pick-up line electrically coupled to the gates.
    Type: Application
    Filed: September 16, 2015
    Publication date: January 7, 2016
    Inventors: Isaac CHUNG, Jin Ha KIM
  • Publication number: 20160005794
    Abstract: A 3D semiconductor integrated circuit having a gate pick-up line and a method of manufacturing the same, wherein the semiconductor integrated circuit includes a plurality of active pillars formed in a gate pick-up region, buffer layers formed on the respective active pillars in the gate pick-up region, gates each surrounding an outer circumference of the corresponding active pillar and the corresponding buffer layer, and a gate pick-up line electrically coupled to the gates.
    Type: Application
    Filed: September 16, 2015
    Publication date: January 7, 2016
    Inventors: Isaac CHUNG, Jin Ha KIM
  • Patent number: 9217166
    Abstract: The present invention relates to a D-psicose 3-epimerase variant with improved thermostability by substituting an amino acid at a specific position of an amino acid sequence of a wild type D-psicose 3-epimerase. Further, the present invention provides a recombinant expression vector including a gene of the D-psicose 3-epimerase variant, and a recombinant strain transformed with the recombinant expression vector. Furthermore, the present invention provides an immobilized reactor prepared using the D-psicose 3-epimerase variant or the recombinant strain, and a method of continuously producing D-psicose using the immobilized reactor.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: December 22, 2015
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Yang Hee Kim, Jin Ha Kim, Young Mi Lee, Young Ho Hong, Min Hae Kim, Seong Bo Kim, Seung Won Park, Seung Hyun Oh, Deok Kun Oh, Jin Geun Choi