Abstract: In a process for mitigating and/or eliminating the abnormal growth of underlying polysilicon in dichloro silane-based CVD polycide WSix films, a first technique conducts the deposition of the underlying polysilicon layer at a temperature that substantially avoids crystallization of the underlying polysilicon. A second approach reduces the exposure (for example time period and or concentration) of the mono-silane SiH4 post flush, so as to avoid infusion of silicon into the underlying polysilicon layer, and resulting abnormal growth. In this manner, abnormal effects, such as stress fractures formed in subsequent layers, can be eliminated.

Abstract: A residual gas removing device for a gas supply apparatus in a semiconductor fabricating facility, includes a low stress valve disposed between a mass flow controller and a chamber. The low stress valve alternately supplies or cuts off a gas from the mass flow controller to the chamber. A WF6 gas removing apparatus is in flow communication with a gas inlet line of the low stress valve to remove a residual WF6 gas in the gas inlet line, before proceeding with a subsequent deposition step.

Abstract: A method of fabricating a PE-SiON film includes forming a PE-SiON film by turning on a high frequency radio frequency (HF RF) power in the chamber after a plurality of reaction gases SiH4, N2, NH3, N2O have simultaneously flown into a chamber without proceeding a bypass process of SiH4.

Abstract: A method for forming trench isolation regions in a semiconductor device reliably electrically isolates a device and enhances a device density. The method for forming trench isolation regions includes forming a trench on a surface of a semiconductor device with a predetermined depth; forming a nitride liner layer on the surface of the semiconductor including the trench, forming a gas distribution region which is uniformly distributed on the nitride liner layer; and forming an insulation layer by filling the trench after said forming of the gas distribution region. The gas distribution region is preferably formed by introducing an ozone gas. The insulation layer is preferably formed by simultaneously introducing ozone gas and TEOS(Tetra Ethyl Ortho-Silicate) chemical.

Abstract: An insulating layer having a BPSG layer, a semiconductor device and methods for fabricating them. After preparing an oxidizing atmosphere using an oxygen gas, a first seed layer is formed with a tetraethylorthosilicate (TEOS) and the oxygen gas. Thereafter, a second seed layer, used to form an insulating layer capable of controlling an amount of a boron, is formed by means of using a triethylborate (TEB), the TEOS and the oxygen gas. Then, the insulating layer having a BPSG layer is formed using the TEB, a triethylphosphate, the TEOS and an ozone gas. About 5.25 to 5.75% by weight of the boron and about 2.75 to 4.25% by weight of the phosphorous are added to the insulating layer.

Abstract: A method for cleaning the inside of a chamber using a radio frequency (RF) plasma, in which all parts within the camber can be completely cleaned. In the cleaning method, the conditions inside the chamber are stabilized. Then, impurities are cleaned from the inside of the chamber using the RF plasma, while varying the pressure in the chamber continuously or in discrete steps.

Abstract: A silicide layer is formed on a conductive layer in a microelectronic device by forming a first silicide layer on the conductive layer. A second silicide layer is then formed on the first silicide layer, the second silicide layer having a concentration of silicon that is less than the first silicide layer. Preferably, the first silicide layer and the second silicide layer are formed of tungsten silicide. The first silicide layer and the second silicide layer are preferably annealed to form a merged silicide layer. According to another aspect, a contact structure for contacting a microelectronic layer in a microelectronic device is formed by forming an insulation layer on the microelectronic layer, the insulation layer having a contact hole therethrough that exposes a portion of the microelectronic layer. A conductive layer is then formed on the insulation layer, the conductive layer extending through the contact hole to contact the exposed portion of the microelectronic layer.