Abstract: A memory system includes a variable resistance memory configured to input and output data by a first unit and a translation layer for managing the degree of wear of the variable resistance memory by a second unit, different from the first unit.

Abstract: An memory device including a data region storing a main data, a first index region storing a count data, and a second index region storing an inverted count data, where the data region, the first index region, and the second index region are included in one logical address.

Abstract: An apparatus for providing atomicity with respect to a request of a write operation for successive sectors in a flash memory is provided. The apparatus includes a data write module writing data in a main sector of a page and allocating status bits indicating a status of the data write to a spare sector of the page, a write progress managing module overwriting a commit mark in the spare sector allocated with the status bits according to a progress status of the data write, and a validity determining module determining validity of the sectors on the basis of the overwritten commit mark and providing information of the successive sectors.

Abstract: Provided is a flash memory address translation method that may maintain at least one chip that may be divided based on at least one horizontal bank and at least one vertical channel, and may divide the at least one bank by at least one stripe partition, managing an error of a chip without deterioration in a performance of a small writing.

Abstract: Provided are an apparatus and method for processing data of flash memory. The apparatus includes a user requesting unit to request a data operation using a predetermined logical address, a transformation unit to transform the logical address into a physical address, and a control unit to record count data counting the number of predetermined bits of data, in an index region to indicate whether the data is valid when conducting the data operation.

Abstract: A method and apparatus for allocating resources for physical channels in a mobile communication system are disclosed. An apparatus for allocating resources, the apparatus comprising: An address generation unit allocating spare resources to a physical channel with reference to resource allocation information stored in a monitoring unit, and generating an address value of a frame generation unit corresponding to frequency and symbol index values of the allocated resources; the frame generation unit storing data to be transmitted via the physical channel in the generated address value to generate subframe data; and the monitoring unit storing an address value corresponding to the physical channel generated by the address generation unit.

Abstract: Disclosed is a mobile type electron accelerator which enables a high voltage generator and a beam extraction device irradiating electron beams, and a reactor to be safely placed in containers mounted on trailers of a vehicle having mobility so as to allow a sample (for example, waste water, waste gas, and a sample to be investigated) to be tested in real time while maximally suppressing danger of environmental pollution or radiation exposure, thereby assuring rapidity, field applicability, and accuracy.

Abstract: A nonvolatile-memory-management includes a generation unit that generates a free block list by arranging an entry including representative information of a group, of which free blocks adjacent to each other are grouped according to predetermined criteria, according to key values where the representative information are combined, a determination unit that determines parameters according to characteristics of data to be recorded, and a block-allocating unit that allocates free blocks satisfying the parameters as an area to be recorded with the data by referring to the free block list.

Abstract: Provided is an apparatus and method for managing mapping information of a nonvolatile memory, in which a time period required for a request for access to a logic sector of the nonvolatile memory is minimized. The apparatus includes an extractor which extracts a logical sector mapped with each physical sector in physical units mapped with a predetermined logical unit, a mapping information generator which generates mapping information of logical sectors belonging to the logical unit including the extracted logical sector, and a mapping information memory which stores the generated mapping information.

Abstract: An apparatus includes a nonvolatile memory including a plurality of memory cells, each configured to store data having at least two bits and a control circuit configured to write data to a first memory cell connected to a wordline of the nonvolatile memory and to then write data to a second memory cell that is connected to wordline and shares a bit buffer with the first memory cell.

Abstract: A method and apparatus for writing data to and reading data from a phase-change random access memory (PRAM) include encoding original data using a predetermined encoding function, selecting data, from among the original data and the encoded data, which require less power when being written to the PRAM, writing the selected data to the PRAM, generating marking information related to the selected data, and writing the marking information to the PRAM. Therefore, power consumption can be reduced when data are written to the PRAM.

Abstract: A non-volatile mass storage memory and an input/output processing method using the memory are provided. The memory device includes a storage unit including a non-volatile random access memory and a flash memory and a controller to control the storage to process an input/output request. Accordingly, system memories having different purposes and functionalities, such as a flash memory and a dynamic random access memory (DRAM), may be integrated with each other.

Abstract: The present invention relates to a mapping information managing apparatus and method for a non-volatile memory supporting different cell types, and more particularly, to a mapping information managing apparatus and method for a non-volatile memory supporting different cell types capable of managing mapping information considering physical characteristics of each cell type in the non-volatile memory supporting different cell types in which bits represented by one cell are different from each other. A mapping information managing apparatus for a non-volatile memory supporting different cell types includes: a user request unit used for a user to request a predetermined operation by using a logical address; a non-volatile memory comprising a plurality of memory areas having different cell types; and a mapping information managing unit storing mapping information on user data written to a second memory area of the plurality of memory areas in a first memory area.

Abstract: A solid state drive (SSD) including a storage that includes a plurality of flash memories configured to be independently drivable and a controller to receive an input/output (I/O) request from a host, to split the I/O request into a plurality of sub-requests each having a size configured to be capable of being processed independently by each flash memory, and to process the I/O request based on the sub-requests.

Abstract: Provided are a nonvolatile memory and an apparatus and method for deciding data validity for the same, in which validity of data stored in the nonvolatile memory can be decided. The nonvolatile memory includes a memory cell storing data bits in a plurality of pages included in a predetermined block through a plurality of states realized by at least two bits. The block includes a first page in which data bits for determining validity of data bits written by a user are stored, and a second page in which the data bits written by the user are stored.

Abstract: A method and apparatus for battery gauging in a portable terminal are provided. In the battery gauging method, it is determined in a low-power mode whether a listening interval occurs for detecting the presence of a received signal. The remaining battery capacity is detected if the listening interval occurs. An interrupt signal is transmitted to the second processor, operating in a low-power mode, if the remaining battery capacity is less than or equal to a threshold. Upon receipt of the interrupt signal, the second processor wakes up to interrupt the power of the portable terminal.

Abstract: A computing system, more particularly, a computing system including a phase-change memory is provided. The computing system includes a flash memory configured to store data and a phase-change memory configured to store address mapping information for converting a logical address into a physical address. The phase-change memory is configured to store the address mapping information while the computing system is in a power-off state. The computing system may store an address mapping table to manage the flash memory in the phase-change memory.

Abstract: Disclosed is a condensing sheet, a method of manufacturing the condensing sheet, a backlight assembly including the condensing sheet, and a liquid crystal display including the backlight assembly. The condensing sheet includes a light output unit that has a plurality of lenses, and a light input unit that faces the light output unit and includes a light penetration unit and a light reflection unit. The light reflect ion unit has a structure including a recess sinking toward the light output unit and a reflector received in the recess.