Abstract: A system-on-chip (SoC) test apparatus is disclosed. The system-on-chip (SoC) testing apparatus reduces a test time due to a small amount of overhead in the case of testing an AMBA-based system-on-chip (SoC) using a TIC, an EBI, and a Test Harness, and maintains AMBA- or TIC- compatibility simultaneously while performing scan input/output operations.

Abstract: A data processing apparatus and method for a flash memory, which make it easy to determine whether data stored in the flash memory is valid, are provided. The data processing apparatus includes a user request unit which issues a request for performing a data operation on a flash memory using a predetermined logical address, a conversion unit which converts the logical address into a physical address, and a control unit which performs the data operation on the physical address and writes inverted data obtained by inverting error correction code (ECC) corresponding to data used in the data operation to a region indicating whether the ECC is erroneous.

Abstract: A memory system includes a variable resistance memory configured to input and output data by a first unit and a translation layer for managing the degree of wear of the variable resistance memory by a second unit, different from the first unit.

Abstract: A nonvolatile memory including a memory cell that stores data in a plurality of pages included in a block according to a voltage applied to a memory cell is provided. The nonvolatile memory includes a block that includes a first page including first data that stores data recorded by a user, and a second page including second data area that stores data recorded by a user, wherein the second page records count-information on states represented by a bit pair in the same position of the first data area and the second data area.

Abstract: A low-profile Universal-Serial-Bus (USB) assembly includes a modular USB core component that is retractably mounted into an external housing. The modular USB core component includes a PCBA in which all passive components and unpackaged IC chips are attached to a single side of a PCB opposite to the metal contacts. The IC chips (e.g., USB controller, flash memory) are attached to the PCB by wire bonding or other chip-on-board (COB) technique. The passive components are attached by conventional surface mount technology (SMT) techniques. The housing includes a retractable mechanism that facilitates selective exposure of metal contacts, either by sliding a front portion of the modular USB core component into and out of a front opening of the housing, or by providing a cover plate that slidably covers the front portion of the modular USB core component.

Abstract: A data processing apparatus and method are provided for a flash memory, wherein the data processing apparatus and method can easily determine whether data stored in the flash memory is valid. The data processing apparatus for a flash memory includes a user request unit which issues a request for performing a data operation on a predetermined logical address, a conversion unit which converts the predetermined logical address into a physical address, and a control unit which performs the data operation on the physical address and records inverted data of data written to the predetermined logical address in an index area to indicate whether the data written to the predetermined logical address is valid.

Abstract: A method and apparatus for writing data to and reading data from a phase-change random access memory (PRAM) include encoding original data using a predetermined encoding function, selecting data, from among the original data and the encoded data, which require less power when being written to the PRAM, writing the selected data to the PRAM, generating marking information related to the selected data, and writing the marking information to the PRAM. Therefore, power consumption can be reduced when data are written to the PRAM.

Abstract: An apparatus includes a nonvolatile memory including a plurality of memory cells, each configured to store data having at least two bits and a control circuit configured to write data to a first memory cell connected to a wordline of the nonvolatile memory and to then write data to a second memory cell that is connected to wordline and shares a bit buffer with the first memory cell.

Abstract: The vehicle canister comprising: the first chamber filled with the active carbon and funneled with the tank port, where the evaporating gas is infused through and the second chamber filled with the active carbon and funneled with the atmosphere port and neighboring the first chamber via the isolation wall. Also, it involves the vehicle canister installed in the canister housing which has the absorption and desorption improver to improve the absorption and desorption efficiency with heat conduction with temperature change of the active carbon occurred during the absorption and desorption of evaporation gas infused into the canister housing. The absorption and desorption improver is composed with the first and the second absorption and desorption improver.

Abstract: A data management system includes a data processor configured to provide a file system module configured to store first data in a flash memory in block units and a filter layer module configured to receive second data from the file system module and to store the second data in a phase-change random access memory (PRAM) in sub-block units. The filter layer module may be configured to identify difference data in the second data received from the file system module by comparing the received second data and third data stored in the PRAM, and to write the identified difference data to the PRAM. The second data may include file metadata and the first data may include data other than file metadata. The sub-block units may be byte units.

Abstract: A low-profile Universal-Serial-Bus (USB) assembly includes a modular USB core component that is mounted into a swivel casing. The modular USB core component includes a PCBA in which all passive components and unpackaged IC chips are attached to a single side of a PCB opposite to the metal contacts. The IC chips (e.g., USB controller, flash memory) are attached to the PCB by wire bonding or other chip-on-board (COB) technique. The passive components are attached by conventional surface mount technology (SMT) techniques. The swivel casing includes a holder that is pivotably mounted into an external housing by way of a pivot pin. The pivot pin is either a separate structure that is inserted into holes formed in the holder and housing, or is integrally formed on the holder.

Abstract: A Secure Digital device including a PCBA having passive components mounted on a PCB using surface mount technology (SMT) techniques, and active components (e.g., controller and flash memory) mounted using chip-on-board (COB) techniques. The components are mounted only on one side of the PCB, and then a molded plastic casing is formed over both sides of the PCB such that the components are encased in the plastic, and a thin plastic layer is formed over the PCB surface opposite to the components. The molded plastic casing is formed to include openings that expose metal contacts provided on the PCB, and ribs that separate the openings. In one embodiment the metal contacts are formed on the same side as the thin plastic layer, and in an alternate embodiment the metal contacts are formed on a block that is mounted on the PCB during the SMT process.

Abstract: A universal serial bus (USB) flash drive pen device for deploying and retracting a USB plug connector having a pusher assembly including a USB flash drive and a USB plug connector, in accordance with an embodiment of the present invention. The USB flash drive pen device further includes a housing assembly at least partially enclosing said pusher assembly for deploying said USB plug connector, said USB flash drive being coupled to said USB plug connector, said pusher assembly retracting said USB plug connector into said housing assembly, said USB flash drive pen device for deploying said USB plug connector to couple said USB flash drive to a USB port.

Abstract: Provided is a 4× framer/deframer module for PCI-Express and a framer/deframer device using the same. In the PCI-Express for high-rate data processing, delimiter and pad processing, and 4× framer shifting and arrangement/reverse arrangement for framing/deframing a frame format are performed to achieve a structure that facilitates reconfiguration and expansion, for example, a pipeline structure, so that the 4× framer/deframer module can operate without delay within a 250 MHz clock even when expansion to 32× is made.

Abstract: Provided is an apparatus and method for extracting a conditional access internal message which can efficiently extract a conditional access internal message including an entitlement control message (ECM)/entitlement management message (EMM) without fast information channel (FIC) of a digital multimedia broadcasting (DMB) frame in a mobile multimedia broadcasting system.

Abstract: Apparatus and method of managing a nonvolatile memory are disclosed where the nonvolatile-memory-managing apparatus includes a nonvolatile memory that has a first block and a second block having one or more physical pages, and an operation unit that determines the type of merge operation to perform for the first block and second block according to whether logical page offsets recorded in consecutive physical pages of the first block increases in steps and in repeating order.

Abstract: An apparatus for controlling operation processing in a nonvolatile memory includes an emergency request-managing unit to set values of a pre-empt flag and a status-backup flag when an operation based on an urgent request is transmitted, a status-checking unit to check the set values of the pre-empt flag and the status-backup flag, and an operation-processing unit to process the operation based on the urgent request and an operation based on a normal request according to the checked values.

Abstract: A nonvolatile-memory-management includes a generation unit that generates a free block list by arranging an entry including representative information of a group, of which free blocks adjacent to each other are grouped according to predetermined criteria, according to key values where the representative information are combined, a determination unit that determines parameters according to characteristics of data to be recorded, and a block-allocating unit that allocates free blocks satisfying the parameters as an area to be recorded with the data by referring to the free block list.

Abstract: A page replacement method is provided. The page replacement method includes (a) establishing a first page list in which a plurality of pages in a main memory are listed in an order that they have been used, (b) establishing a second page list in which some of the pages in the main memory whose images are stored in a storage medium are listed in an order that they have been used, and (c) storing data downloaded from the storage medium in the pages included in the second page list in an order opposite to the order that the corresponding pages are listed in the second page list.

Abstract: The present invention relates to a mapping information managing apparatus and method for a non-volatile memory supporting different cell types, and more particularly, to a mapping information managing apparatus and method for a non-volatile memory supporting different cell types capable of managing mapping information considering physical characteristics of each cell type in the non-volatile memory supporting different cell types in which bits represented by one cell are different from each other. A mapping information managing apparatus for a non-volatile memory supporting different cell types includes: a user request unit used for a user to request a predetermined operation by using a logical address; a non-volatile memory comprising a plurality of memory areas having different cell types; and a mapping information managing unit storing mapping information on user data written to a second memory area of the plurality of memory areas in a first memory area.