Patents by Inventor Jin-Sik Choi

Jin-Sik Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160091447
    Abstract: Provided herein is a gas sensor apparatus including a first sensor unit, second sensor unit, and signal processing unit. The first sensor unit has a channel area doped to an n-type such that it may selectively react to a donor molecule in gas. The second sensor unit has a channel area doped to a p-type such that it may selectively react to an acceptor molecule in gas. The signal processing unit receives a sense signal of the donor molecule from the first sensor unit and a sense signal of the acceptor molecule from the second sensor unit, processes the received sense signals and generates result data of processing the received sense signals. Therefore, the gas sensor apparatus may selectively sense donor gas and acceptor gas.
    Type: Application
    Filed: May 13, 2015
    Publication date: March 31, 2016
    Inventors: Young Jun YU, Jin Sik CHOI, Choon Gi CHOI, Hong Kyw CHOI, Jin Soo KIM, Jin Tae Kim, Kwang Hyo CHUNG, Jong Ho CHOE
  • Publication number: 20160060681
    Abstract: Provided is a gene amplifying and detecting device. The gene amplifying and detecting device includes: a gene amplifying chip including a chamber formed therein; a reaction solution filled in the chamber and including a fluorescent material; a light source located at one side of the gene amplifying chip; a light detector located at the other side of the gene amplifying chip; and a graphene heater formed on an inner surface or outer surface of the gene amplifying chip so as to heat the reaction solution.
    Type: Application
    Filed: November 26, 2014
    Publication date: March 3, 2016
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kwang Hyo CHUNG, Jin Tae KIM, Yo Han CHOI, Choon Gi CHOI, Hong Kyw CHOI, Young Jun YU, Doo Hyeb YOUN, Jin Sik CHOI
  • Patent number: 9275860
    Abstract: A method of manufacturing a junction electronic device having a 2-Dimensional (2D) material as a channel, includes forming a pattern portion by surface-treating a substrate so that the patterned portion has a higher surface potential than other portions of the substrate; bonding a 2D material to rthe patterned portion having the higher surface potential by spraying a liquid including 2D material flakes onto the substrate; forming a pair of first electrodes in contact with both ends of the 2D material disposed on the substrate; forming a dielectric layer on the first electrodes and the 2D material; and forming a second electrode on the dielectric layer. The 2D materials are disposed at desired positions by chemical exfoliation.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: March 1, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young Jun Yu, Jin Soo Kim, Hong Kyw Choi, Jin Sik Choi, Jin Tae Kim, Kwang Hyo Chung, Doo Hyeb Youn, Choon Gi Choi
  • Patent number: 9178032
    Abstract: Provided is a gas sensor including a substrate, a sensing electrode extended in a first direction on the substrate, and a plurality of heaters disposed in a second direction crossing the first direction on the substrate. The plurality of heaters is separated at both sides of the sensing electrode. The plurality of heaters includes graphene.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: November 3, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young-Jun Yu, Hongkyw Choi, Jin Sik Choi, Kwang Hyo Chung, Jin Tae Kim, Doo Hyeb Youn, Choon Gi Choi
  • Patent number: 9147797
    Abstract: A semiconductor light emitting device according to an embodiment includes a top layer having a top surface and a bottom surface, the top layer being an n electrode; an uneven pattern formed in the bottom surface of the n electrode; an n-type semiconductor layer formed under the n electrode, the n-type semiconductor layer having a top surface and a bottom surface; an uneven pattern formed in the top surface of the n-type semiconductor layer, the uneven pattern of the n-type semiconductor layer corresponding to the uneven pattern of the n electrode; an active layer formed under the n-type semiconductor layer; a p-type semiconductor layer formed under the active layer; and a p electrode formed under the p-type semiconductor layer.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: September 29, 2015
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Jin Sik Choi
  • Publication number: 20150228481
    Abstract: Disclosed is a method of manufacturing a junction electronic device by disposing 2-Dimensional (2D) materials at desired positions by chemically exfoliating the 2D materials, and the method includes: forming a pattern by surface-treating a surface of a substrate; transferring a 2D material by spraying a liquid solution, in which 2D material flakes are dissolved, onto the substrate on which the pattern is formed; forming first electrodes at both sides of the 2D material disposed on the substrate; forming a dielectric layer on the first electrodes; and forming a second electrode on the dielectric layer.
    Type: Application
    Filed: April 22, 2014
    Publication date: August 13, 2015
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Young Jun YU, Jin Soo KIM, Hong Kyw CHOI, Jin Sik CHOI, Jin Tae KIM, Kwang Hyo CHUNG, Doo Hyeb YOUN, Choon Gi CHOI
  • Publication number: 20150200031
    Abstract: The present invention relates to a method of fabricating a nanowire and graphene-sheet hybrid structure, and a transparent electrode employing the same, in which a hybrid structure, in which a graphene sheet is attached on surfaces of nanowires, is fabricated by fabricating a line pattern, in which nanowires are aligned in a longitudinal direction, by using an electro-spinning method, and then additionally employing a dipping method of dipping the line pattern in a graphene sheet dispersed solution, and the fabricated hybrid structure is applied to the transparent electrode. Accordingly, a crosslinking portion is increased by decreasing a distance between nanowires present inside the line pattern to improve a conductive property of a nanowire metal line. Further, the nanowire with a relative uniform density is present within the fabricated line pattern, so that when the line pattern is fabricated on the entire substrate, it is possible to achieve a uniform distribution of nanowires over a large area.
    Type: Application
    Filed: July 16, 2014
    Publication date: July 16, 2015
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Doo Hyeb YOUN, Choon Gi CHOI, Jin Soo KIM, Young Jun YU, Jin Sik CHOI, Hong Kyw CHOI
  • Publication number: 20150191358
    Abstract: Disclosed are a method of growing a high-quality single layer graphene by using a Cu/Ni multi-layer metallic catalyst, and a graphene device using the same. The method controls and grows a high-quality single layer graphene by using the Cu/Ni multilayer metallic catalyst, in which a thickness of a nickel lower layer is fixed and a thickness of a copper upper layer is changed in a case where a graphene is grown by a CVD method. According to the method, it is possible to obtain a high-quality single layer graphene, and improve performance of a graphene application device by utilizing the high-quality single layer graphene and thus highly contribute to industrialization of the graphene application device.
    Type: Application
    Filed: June 25, 2014
    Publication date: July 9, 2015
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jin Sik CHOI, Hong Kyw CHOI, Ki Chul KIM, Young Jun YU, Jin Soo KIM, Choon Gi CHOI
  • Patent number: 9023166
    Abstract: A method of transferring graphene is provided. A method of transferring graphene in accordance with an exemplary embodiment of the present invention may include forming a graphene layer by composing graphene and a base layer, depositing a self-assembled monolayer on the graphene layer, and separating a combination layer comprising the self-assembled monolayer and the graphene layer from the base layer.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: May 5, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jin Sik Choi, Young-Jun Yu, Jin Tae Kim, Kwang Hyo Chung, Doo Hyeb Youn, Choon Gi Choi
  • Patent number: 9000157
    Abstract: The present invention relates to an organic electroluminescence device containing a light emitting metallic compound of Chemical Formula 1. In the Chemical Formula 1, M is selected from Ir, Pt, Rh, Re, and Os, and m is 2, provided that m is 1 when M is Pt.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: April 7, 2015
    Assignees: Samsung Display Co., Ltd., Industry-University Cooperation Foundation Hanyang University
    Inventors: Dong-Hack Suh, Jin-Sik Choi, Jin-Soo Lim, Song-Ho Kim, Dae-Beom Kim
  • Publication number: 20140287414
    Abstract: A DNA analysis system that controls DNA analysis by wireless using an application of a mobile device and a very small DNA analysis apparatus, and that receives a DNA analysis result in real time on the spot is provided. Therefore, by performing DNA analysis by simultaneously controlling a plurality of small DNA analysis apparatuses using signal processing and screen display functions of a mobile device, analysis speed of DNA is improved, and an analysis result of DNA can be provided in real time. Further, by forming a DNA analysis apparatus in a very small size, DNA can be immediately analyzed with low power consumption on the spot using a small sample, and the DNA analysis apparatus can be carried.
    Type: Application
    Filed: August 28, 2013
    Publication date: September 25, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kwang Hyo CHUNG, Jin Tae KIM, Doo Hyeb YOUN, Ki-Chul KIM, Young-Jun YU, Jin Sik CHOI, Choon Gi CHOI
  • Publication number: 20140238591
    Abstract: A method of transferring graphene is provided. A method of transferring graphene in accordance with an exemplary embodiment of the present invention may include forming a graphene layer by composing graphene and a base layer, depositing a self-assembled monolayer on the graphene layer, and separating a combination layer comprising the self-assembled monolayer and the graphene layer from the base layer.
    Type: Application
    Filed: June 21, 2013
    Publication date: August 28, 2014
    Inventors: Jin Sik CHOI, Young-Jun YU, Jin Tae KIM, Kwang Hyo CHUNG, Doo Hyeb YOUN, Choon Gi CHOI
  • Publication number: 20140231933
    Abstract: Provided is a gas sensor including a substrate, a sensing electrode extended in a first direction on the substrate, and a plurality of heaters disposed in a second direction crossing the first direction on the substrate. The plurality of heaters is separated at both sides of the sensing electrode. The plurality of heaters includes graphene.
    Type: Application
    Filed: January 24, 2014
    Publication date: August 21, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Young-Jun YU, Hongkyw CHOI, Jin Sik CHOI, Kwang Hyo CHUNG, Jin Tae KIM, Doo Hyeb YOUN, Choon Gi CHOI
  • Publication number: 20140178598
    Abstract: Disclosed are methods for forming a graphene pattern. The method includes forming a fine pattern defined by at least one trench on a substrate, applying a graphene solution on the fine pattern, and selectively forming a graphene layer on the fine pattern contacting the graphene solution.
    Type: Application
    Filed: June 12, 2013
    Publication date: June 26, 2014
    Inventors: Kwang Hyo CHUNG, Jin Tae KIM, Young-Jun YU, Jin Sik CHOI, Doo Hyeb YOUN, Ki-Chul KIM, Choon Gi CHOI
  • Patent number: 8742429
    Abstract: A semiconductor light emitting device includes a first semiconductor layer having a bottom surface with uneven patterns, an active layer formed on the first semiconductor layer, a second semiconductor layer formed on the active layer, a second electrode formed on the second semiconductor layer, and a first electrode formed under the first semiconductor layer.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: June 3, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Jin Sik Choi
  • Publication number: 20120267356
    Abstract: A ground structure for a PECVD apparatus includes a ground connector is positioned in a receiving portion of a ground mount that is connected to an electrical reservoir. A cylindrical ground clamp holds the ground connector and includes an opening portion along a sidewall in a longitudinal direction. An outer surface of the ground connector makes contact with an inner surface of the ground clamp. A pair of stumbling portions are folded from an outer surface of the ground clamp and spaced apart from each other by a width of the opening portion. A ground wiring is connected to the ground clamp and the ground mount, and the ground current flows to the ground mount via the ground clamp by the ground wiring, thus the ground current is grounded to the electrical reservoir. Accordingly, the electric arc is prevented between the ground connector and the ground clamp.
    Type: Application
    Filed: November 24, 2010
    Publication date: October 25, 2012
    Applicant: KOMICO, LTD.
    Inventors: Jeong-Duck Choi, Hyun-Mi Yuk, Jin-Sik Choi
  • Publication number: 20110184170
    Abstract: The present invention relates to an organic electroluminescence device containing a light emitting metallic compound of Chemical Formula 1. In the Chemical Formula 1, M is selected from Ir, Pt, Rh, Re, and Os, and m is 2, provided that m is 1 when M is Pt.
    Type: Application
    Filed: October 27, 2010
    Publication date: July 28, 2011
    Applicants: SAMSUNG ELECTRONICS CO., LTD, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION, HANYANG UNIVERSITY
    Inventors: Dong-Hack SUH, Jin-Sik CHOI, Jin-Soo LIM, Song-Ho KIM, Dae-Beom KIM
  • Patent number: 7939669
    Abstract: The present invention relates to a light emitting transition metal compound of Chemical Formula 1 and an organic electroluminescence device including the compound. In the Chemical Formula 1, M is selected from Ir, Pt, Rh, Re, and Os, m is 2 or 3, n is 0 or 1, the sum of m and n is 3, provided that the sum of m and n is 2 M is Pt. X is a N or P atom, and Y is S, O, or Se.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: May 10, 2011
    Assignees: Samsung Electronics Co., Ltd., Industry-University Cooperation Foundation, Hanyang University
    Inventors: Dong-Hack Suh, Jin-Sik Choi, Jin-Soo Lim, Song-Ho Kim, Chi-Hun Kim
  • Patent number: 7875717
    Abstract: The present invention relates to a light emitting metallic compound of Chemical Formula 1 and an organic electroluminescence device including the compound. In the Chemical Formula 1, M is selected from Ir, Pt, Rh, Re, and Os, m is 2 or 3, n is 0 or 1, the sum of m and n is 3, provided that the sum of m and n is 2 when M is Pt. X is an N or P atom, Y is S, O, or Se, and Z is SiR5R6, CR5R6, PR5, S, SO2, carbonyl, or NR5, and L2 is represented by Chemical Formulae 2, 3, or 4.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: January 25, 2011
    Assignees: Samsung Electronics Co., Ltd., Industry-University Cooperation Foundation, Hanyang University
    Inventors: Dong-Hack Suh, Jin-Sik Choi, Song-Ho Kim, Dae-Beom Kim, Chi-Hun Kim
  • Publication number: 20110001164
    Abstract: A semiconductor light emitting device according to an embodiment includes a top layer having a top surface and a bottom surface, the top layer being an n electrode; an uneven pattern formed in the bottom surface of the n electrode; an n-type semiconductor layer formed under the n electrode, the n-type semiconductor layer having a top surface and a bottom surface; an uneven pattern formed in the top surface of the n-type semiconductor layer, the uneven pattern of the n-type semiconductor layer corresponding to the uneven pattern of the n electrode; an active layer formed under the n-type semiconductor layer; a p-type semiconductor layer formed under the active layer; and a p electrode formed under the p-type semiconductor layer.
    Type: Application
    Filed: September 13, 2010
    Publication date: January 6, 2011
    Inventor: Jin Sik CHOI