Abstract: Dual-layered structural semiconductor chips are provided. The semiconductor chip includes a first semiconductor chip and a second semiconductor chip bonded to the first semiconductor chip. The first semiconductor chip includes a first substrate having a first bottom surface. The second semiconductor chip includes a second substrate having a second bottom surface. The first bottom surface directly contacts the second bottom surface. The related packages and the related methods are also provided.

Abstract: A jig apparatus fastening loaded trays having light emitting devices received therein, includes a body and first and second extending portions. The body has a bent structure in a length direction thereof. The first and second extending portions are respectively bent and extend from a first end and a second end of the body in the length direction thereof.

Abstract: A semiconductor device includes a MIM capacitor on a substrate. The MIM capacitor includes a dielectric region and first and second electrodes on opposite sides of the dielectric region. At least one of the first and second electrodes, e.g., an upper electrode, includes an oxygen diffusion blocking material, e.g., oxygen atoms, at a concentration that decreases in a direction away from the dielectric region. The at least one of the first and second electrodes may include a first layer having a first concentration of the oxygen diffusion blocking material and a second layer on the first layer and having a second concentration of the oxygen diffusion blocking material less than the first concentration. The at least one of the first and second electrodes may further include a third layer on the second layer and having a concentration of the oxygen diffusion blocking material less than the second concentration.

Abstract: Capacitor of a semiconductor device, and a method of fabricating the same, include sequentially forming a mold structure and a polysilicon pattern over a semiconductor substrate, patterning the mold structure using the polysilicon pattern as an etch mask to form lower electrode holes penetrating the mold structure, forming a protection layer covering a surface of the polysilicon pattern, forming lower electrodes in the lower electrode holes provided with the protection layer, removing the polysilicon pattern and the protection layer to expose upper sidewalls of the lower electrodes, removing the mold structure to expose lower sidewalls of the lower electrodes, and sequentially forming a dielectric and an upper electrode covering the lower electrodes.

Abstract: Dual-layered structural semiconductor chips are provided. The semiconductor chip includes a first semiconductor chip and a second semiconductor chip bonded to the first semiconductor chip. The first semiconductor chip includes a first substrate having a first bottom surface. The second semiconductor chip includes a second substrate having a second bottom surface. The first bottom surface directly contacts the second bottom surface. The related packages and the related methods are also provided.

Abstract: A refrigerator having a mounting structure capable of easily and conveniently achieving the mounting process for elements to be installed in an inner case. The refrigerator includes a first body including an inner case, an outer case, and a urethane foam filled between the inner case and the outer case, a coupling hole formed through the inner case, a mounting member coupled to the coupling hole at a first outside of the inner case by a first end of the mounting member and provided with a fastening hole, the mounting member being fixed between the inner case and the outer case by the urethane foam when the urethane foam is filled, and a fastening member fastened to the fastening hole at a first inside of the inner case.

Abstract: A deposition apparatus according to an exemplary embodiment of the present invention includes a plurality of reaction spaces, a plurality of plasma electrodes respectively disposed in the reaction spaces, a first plasma processor connected to at least two plasma electrodes, and a first plasma power source connected to the first plasma processor. The first plasma processor may include a plasma distributor or a plasma splitter.

Abstract: A refrigerator having a mounting structure capable of easily and conveniently achieving the mounting process for elements to be installed in an inner case. The refrigerator includes a first body including an inner case, an outer case, and a urethane foam filled between the inner case and the outer case, a coupling hole formed through the inner case, a mounting member coupled to the coupling hole at a first outside of the inner case by a first end of the mounting member and provided with a fastening hole, the mounting member being fixed between the inner case and the outer case by the urethane foam when the urethane foam is filled, and a fastening member fastened to the fastening hole at a first inside of the inner case.

Abstract: An apparatus and method for testing a voltage standing wave ratio (VSWR) in a wideband code division multiple access (W-CDMA) mobile communication system. Upon detecting a VSWR test request, a controller determines an oscillation frequency information and a power level information of a test signal for a VSWR test, and generates a test signal generation request including the determined oscillation frequency information and power level information. Upon detecting the test signal generation request, a test signal generator generates a test signal corresponding to the oscillation frequency information and power level information, and provides the generated test signal to an antenna. A VSWR detector receives the test signal and a reflected signal of the test signal from the antenna, and calculates a VSWR using the received test signal and reflected signal.

Abstract: An apparatus and method for testing a voltage standing wave ratio (VSWR) in a wideband code division multiple access (W-CDMA) mobile communication system. Upon detecting a VSWR test request, a controller determines an oscillation frequency information and a power level information of a test signal for a VSWR test, and generates a test signal generation request including the determined oscillation frequency information and power level information. Upon detecting the test signal generation request, a test signal generator generates a test signal corresponding to the oscillation frequency information and power level information, and provides the generated test signal to an antenna. A VSWR detector receives the test signal and a reflected signal of the test signal from the antenna, and calculates a VSWR using the received test signal and reflected signal.