Abstract: A display device includes first pixels in a first pixel region and connected to first scan lines and second pixels in a second pixel region connected to second scan lines. The second pixel has a width less than the first pixel region. The display device also includes a first scan driver to supply first scan signals to the first scan lines, a second scan driver to supply second scan signals to the second scan lines, a first signal line to supply a first driving signal to the first scan driver and the second scan driver, and a signal delay circuit connected to the first signal line to delay the first driving signal.

Abstract: A display device includes a substrate having a display area and a non-display area, a plurality of pixels in the display area, scan lines for supplying a scan signal to the pixels, the scan lines extending in a first direction, data lines for supplying a data signal to the pixels, the data lines extending in a second direction crossing the first direction, and a first dummy part in the non-display area, adjacent to an outermost pixel, connected to an outermost data line of the display area, forming a parasitic capacitor with the outermost pixel, and including a first dummy data line and a first dummy power pattern extending in parallel to the data lines.

Abstract: A display device is disclosed, and the display device includes a substrate including first to third display regions, the second and the third display regions being spaced from each other, each of the second and third display regions having an area smaller than that of the first display region and being continuous to the first display region, first to third pixels in the first to third display regions, first to third lines connected to the first to third pixels, and a dummy part configured to compensate for a difference between a load value of the first lines and load values of the second and third lines, wherein the second display region includes a first sub-region adjacent to the first display region and a second sub-region spaced from the first display region, and the third display region includes a third sub-region adjacent to the first display region and a fourth sub-region spaced from the first display region.

Abstract: A stage includes an output, an input, signal processors, and a stabilizer. The output supplies a voltage of a first or second power source to an output terminal based on voltages of first and second nodes. The input controls voltages of third and fourth nodes based on signals to a first and second input terminals. A first signal processor controls the voltage of the first node based on the voltage of the second node. A second signal processor is connected to a fifth node and controls the voltage of the first node based on a signal to a third input terminal. A third signal processor controls the voltage of the fourth node based on the voltage of the third node and the signal to the third input terminal. The stabilizer is connected between the second signal processor and input to control voltage drop widths of the third and fourth nodes.

Abstract: A display device is provided. The display device comprises a display panel including a plurality of signal pads and one or more dummy pads, and at least one flexible wiring board providing signals to the signal pads, wherein a maximum bias period of signals provided to a pair of adjacent signal pads with at least one dummy pad interposed therebetween is longer than a maximum bias period of signals provided to a pair of adjacent signal pads with no dummy pad disposed therebetween.

Abstract: A display apparatus includes a substrate including a display area, a peripheral area surrounding the display area, a function-adding area, of which at least a portion is surrounded by the display area, and a detour area disposed between the display area and the function-adding area. The display apparatus includes a plurality of pixel circuits disposed in the display area. A plurality of driving lines are electrically connected to the pixel circuits and extend in a direction in the display area. A first detour line is disposed in the detour area and is electrically connected to a first driving line. A second detour line is disposed in the detour area. The second detour line is electrically connected to a second driving line and is disposed in a different layer from the first detour line.

Abstract: A pixel and an organic light emitting diode (OLED) display using the pixel are disclosed. The pixel includes a driving transistor for transmitting a driving current, an OLED configured to receive a first portion of the driving current and a bypass transistor configured to receive a second portion of the driving current.

Abstract: A display device includes: a first pixel region including first pixels, each of the first pixels including a driving transistor to be initialized by a first initialization power source supplied from a first power line; a second pixel region including second pixels, each of the second pixels including a driving transistor to be initialized by a second initialization power source supplied from a second power line; and a power supplier to supply the first initialization power source and the second initialization power source, the first initialization power source and the second initialization power source having a same voltage level when the display device is driven in a first mode, and the first initialization power source and the second initialization power source having different voltage levels during at least one frame period when the display device is driven in a second mode.

Abstract: A display device includes a substrate including a first pixel area, a second pixel area, and a third pixel area, each of the second and third pixel areas having a smaller surface area than the first pixel area and being connected to the first pixel area, first to third pixels provided in the first to third pixel areas, respectively, first to third lines connected to the first to third pixels, respectively, a line connecting part connecting the second and third lines, and a dummy unit overlapping the line connecting part to compensate for a difference of a load value of the first line and a load value of the second line.

Abstract: A display device is disclosed, and the display device includes a substrate including first to third display regions, the second and the third display regions being spaced from each other, each of the second and third display regions having an area smaller than that of the first display region and being continuous to the first display region, first to third pixels in the first to third display regions, first to third lines connected to the first to third pixels, and a dummy part configured to compensate for a difference between a load value of the first lines and load values of the second and third lines, wherein the second display region includes a first sub-region adjacent to the first display region and a second sub-region spaced from the first display region, and the third display region includes a third sub-region adjacent to the first display region and a fourth sub-region spaced from the first display region.

Abstract: A display device includes a substrate having a display area and a non-display area, a plurality of pixels in the display area, scan lines for supplying a scan signal to the pixels, the scan lines extending in a first direction, data lines for supplying a data signal to the pixels, the data lines extending in a second direction crossing the first direction, and a first dummy part in the non-display area, adjacent to an outermost pixel, connected to an outermost data line of the display area, forming a parasitic capacitor with the outermost pixel, and including a first dummy data line and a first dummy power pattern extending in parallel to the data lines.

Abstract: A stage includes an output, an input, signal processors, and a stabilizer. The output supplies a voltage of a first or second power source to an output terminal based on voltages of first and second nodes. The input controls voltages of third and fourth nodes based on signals to a first and second input terminals. A first signal processor controls the voltage of the first node based on the voltage of the second node. A second signal processor is connected to a fifth node and controls the voltage of the first node based on a signal to a third input terminal. A third signal processor controls the voltage of the fourth node based on the voltage of the third node and the signal to the third input terminal. The stabilizer is connected between the second signal processor and input to control voltage drop widths of the third and fourth nodes.

Abstract: A pixel and an organic light emitting diode (OLED) display using the pixel are disclosed. The pixel includes a driving transistor for transmitting a driving current, an OLED configured to receive a first portion of the driving current and a bypass transistor configured to receive a second portion of the driving current.

Abstract: A display device includes first and second pixel areas spaced apart from each other so that corresponding scan lines are separate from each other, a first non-pixel area at a periphery of the first pixel area, a second non-pixel area at a periphery of the second pixel area and opposite to the first non-pixel area with at least one pixel area interposed therebetween, first scan lines in the first pixel area, second scan lines in the second pixel area, a first scan driver in the first non-pixel area and connected to the first scan lines, a second scan driver in the second non-pixel area and connected to the second scan lines, first wires in the first non-pixel area and connected to the first scan driver, second wires in the second non-pixel area and connected to the second scan driver; and connecting wires connecting the first wires and second wires.

Abstract: A pixel and an organic light emitting diode (OLED) display using the pixel are disclosed. The pixel includes a driving transistor for transmitting a driving current, an OLED configured to receive a first portion of the driving current and a bypass transistor configured to receive a second portion of the driving current.

Abstract: A display device includes a substrate having a display area and a non-display area, a plurality of pixels in the display area, scan lines for supplying a scan signal to the pixels, the scan lines extending in a first direction, data lines for supplying a data signal to the pixels, the data lines extending in a second direction crossing the first direction, and a first dummy part in the non-display area, adjacent to an outermost pixel, connected to an outermost data line of the display area, forming a parasitic capacitor with the outermost pixel, and including a first dummy data line and a first dummy power pattern extending in parallel to the data lines.

Abstract: A display device includes first and second pixel areas spaced apart from each other so that corresponding scan lines are separate from each other, a first non-pixel area at a periphery of the first pixel area, a second non-pixel area at a periphery of the second pixel area and opposite to the first non-pixel area with at least one pixel area interposed therebetween, first scan lines in the first pixel area, second scan lines in the second pixel area, a first scan driver in the first non-pixel area and connected to the first scan lines, a second scan driver in the second non-pixel area and connected to the second scan lines, first wires in the first non-pixel area and connected to the first scan driver, second wires in the second non-pixel area and connected to the second scan driver; and connecting wires connecting the first wires and second wires.

Abstract: A display device includes pixels coupled to scan lines, emission control lines, and data lines, a scan driver configured to supply scan signals to the pixels through the scan lines, an emission driver configured to supply emission control signals to the pixels through the emission control lines, and a data driver configured to supply data signals to the pixels through the data lines, wherein the emission driver is configured to supply the emission control signals for each one of sub-periods in one frame period, and wherein a width of the emission control signals in any one sub-period from among the sub-periods is different from that of the emission control signals in another sub-period from among the sub-periods.

Abstract: A display device includes a substrate including a first pixel area, a second pixel area, and a third pixel area, each of the second and third pixel areas having a smaller surface area than the first pixel area and being connected to the first pixel area, first to third pixels provided in the first to third pixel areas, respectively, first to third lines connected to the first to third pixels, respectively, a line connecting part connecting the second and third lines, and a dummy unit overlapping the line connecting part to compensate for a difference of a load value of the first line and a load value of the second line.

Abstract: A pixel includes an organic light emitting diode (OLED), a pixel circuit, and first and second transistors. The OLD includes a cathode electrode connected to a second power source. The pixel circuit includes a driving transistor having a gate electrode initialized by a third power source. The driving transistor controls the amount of current flowing from a first power source to the second power source via the OLED. The first transistor is connected between a fourth power source and the second power source and an anode electrode of the OLED. The first transistor is turned on based on a scan signal is supplied to a scan line. The second transistor is connected between a data line and the pixel circuit. The second transistor is turned on when the scan signal is supplied to the ith scan line.