Abstract: An organic light emitting display device includes pixel driving circuits to control pixels which include organic light emitting diodes. The pixel driving circuits include a first pixel driving circuit and a second pixel driving circuit, and the organic light emitting diodes include a first organic light emitting diode. The first organic light emitting diode emits light at a first brightness based on a driving current from the first pixel driving circuit in a first frame, and emits light at a second brightness based on a driving current from the second pixel driving circuit in a second frame.

Abstract: A display device includes a substrate including a first pixel region, a second pixel region having an area smaller than that of the first pixel region, and a peripheral region surrounding the first pixel region and the second pixel region, a second pixel provided in the second pixel region, a second line connected to the second pixel, an extension line extended to the peripheral region, a dummy part located in the peripheral region to overlap with the extension line, a power line connected to the first and second pixel regions, and a connection line located in the peripheral region to be connected to the dummy part, the connection line being electrically connected to a portion of the second pixel region, wherein the second pixel region includes a first sub-pixel region connected to the connection line and a second sub-pixel region except the first sub-pixel region.

Abstract: A display device including a first pixel area including first pixels, a second pixel area including second pixels, a third pixel area including third pixels, and a display driver configured to control image display operations of the first pixel area, the second pixel area, and the third pixel area according to a first mode or a second mode, wherein the first pixel area includes a first sub-pixel area, and a second sub-pixel area between the first sub-pixel area and the second pixel area, and wherein the first sub-pixel area is configured to display a black image in the first mode, and the second sub-pixel area is configured to display a dummy image.

Abstract: An organic light emitting display device includes a display unit including a first pixel column and a first data line connected to the first pixel column, a first pad unit including first and second signal pads, a test unit including a first switching element which is connected between the first data line and the first signal pad, and includes a control electrode connected to the second signal pad, a first conductive pattern provided in a different layer from that of the first signal pad and connected to the first signal pad, and a second conductive pattern provided in a different layer from that of the second signal pad and connected to the second signal pad, where the first and second conductive patterns are spaced apart from each other in the same layer, and a width of the first conductive pattern is greater than that of the second conductive pattern.

Abstract: A display device includes pixels coupled to scan lines, emission control lines, and data lines, a scan driver configured to supply scan signals to the pixels through the scan lines, an emission driver configured to supply emission control signals to the pixels through the emission control lines, and a data driver configured to supply data signals to the pixels through the data lines, wherein the emission driver is configured to supply the emission control signals for each one of sub-periods in one frame period, and wherein a width of the emission control signals in any one sub-period from among the sub-periods is different from that of the emission control signals in another sub-period from among the sub-periods.

Abstract: A display device includes: a first pixel region including first pixels, each of the first pixels including a driving transistor to be initialized by a first initialization power source supplied from a first power line; a second pixel region including second pixels, each of the second pixels including a driving transistor to be initialized by a second initialization power source supplied from a second power line; and a power supplier to supply the first initialization power source and the second initialization power source, the first initialization power source and the second initialization power source having a same voltage level when the display device is driven in a first mode, and the first initialization power source and the second initialization power source having different voltage levels during at least one frame period when the display device is driven in a second mode.

Abstract: A display apparatus includes: a display unit including a plurality of pixels connected to a plurality of scan lines and a plurality of data lines; an initialization unit for applying an initialization signal to the plurality of data lines; and a wire test unit for applying a wire test signal to the plurality of data lines through a plurality of fan-out lines respectively connected to one end of each of the plurality of data lines.

Abstract: A display device includes first and second pixel areas spaced apart from each other so that corresponding scan lines are separate from each other, a first non-pixel area at a periphery of the first pixel area, a second non-pixel area at a periphery of the second pixel area and opposite to the first non-pixel area with at least one pixel area interposed therebetween, first scan lines in the first pixel area, second scan lines in the second pixel area, a first scan driver in the first non-pixel area and connected to the first scan lines, a second scan driver in the second non-pixel area and connected to the second scan lines, first wires in the first non-pixel area and connected to the first scan driver, second wires in the second non-pixel area and connected to the second scan driver; and connecting wires connecting the first wires and second wires.

Abstract: A stage includes an output, an input, signal processors, and a stabilizer. The output supplies a voltage of a first or second power source to an output terminal based on voltages of first and second nodes. The input controls voltages of third and fourth nodes based on signals to a first and second input terminals. A first signal processor controls the voltage of the first node based on the voltage of the second node. A second signal processor is connected to a fifth node and controls the voltage of the first node based on a signal to a third input terminal. A third signal processor controls the voltage of the fourth node based on the voltage of the third node and the signal to the third input terminal. The stabilizer is connected between the second signal processor and input to control voltage drop widths of the third and fourth nodes.

Abstract: A pixel includes an organic light emitting diode (OLED), a pixel circuit, and first and second transistors. The OLD includes a cathode electrode connected to a second power source. The pixel circuit includes a driving transistor having a gate electrode initialized by a third power source. The driving transistor controls the amount of current flowing from a first power source to the second power source via the OLED. The first transistor is connected between a fourth power source and the second power source and an anode electrode of the OLED. The first transistor is turned on based on a scan signal is supplied to a scan line. The second transistor is connected between a data line and the pixel circuit. The second transistor is turned on when the scan signal is supplied to the ith scan line.

Abstract: A display device includes first pixels in a first pixel region and connected to first scan lines and second pixels in a second pixel region connected to second scan lines. The second pixel has a width less than the first pixel region. The display device also includes a first scan driver to supply first scan signals to the first scan lines, a second scan driver to supply second scan signals to the second scan lines, a first signal line to supply a first driving signal to the first scan driver and the second scan driver, and a signal delay circuit connected to the first signal line to delay the first driving signal.

Abstract: The present disclosure relates to a display device including first pixels disposed in a first pixel area, and connected to first scan lines; second pixels disposed in a second pixel area, and connected to second scan lines; a timing controller configured to supply a first clock signal and a second clock signal to a first clock line and a second clock line, respectively; a first scan driver configured to receive the first clock signal through the first clock line, and to supply a first scan signal to the first scan lines; and a second scan driver configured to receive the second clock signal through the second clock line, and to supply a second scan signal to the second scan lines, wherein the second pixel area has a smaller width than the first pixel area.

Abstract: A display device includes a first pixel region and a second pixel region having different widths. First pixels in the first pixel region each include a first transistor. Second pixels in the second pixel region each include a second transistor performing a same function as the first transistor. At least one of a channel width and a channel length of the first transistor of the first and second pixels is be different from one another.

Abstract: A pixel and an organic light emitting diode (OLED) display using the pixel are disclosed. The pixel includes a driving transistor for transmitting a driving current, an OLED configured to receive a first portion of the driving current and a bypass transistor configured to receive a second portion of the driving current.

Abstract: A display device includes a substrate including a first pixel area, a second pixel area, and a third pixel area, each of the second and third pixel areas having a smaller surface area than the first pixel area and being connected to the first pixel area, first to third pixels provided in the first to third pixel areas, respectively, first to third lines connected to the first to third pixels, respectively, a line connecting part connecting the second and third lines, and a dummy unit overlapping the line connecting part to compensate for a difference of a load value of the first line and a load value of the second line.

Abstract: A display apparatus includes a substrate including a display area, a peripheral area surrounding the display area, a function-adding area, of which at least a portion is surrounded by the display area, and a detour area disposed between the display area and the function-adding area. The display apparatus includes a plurality of pixel circuits disposed in the display area. A plurality of driving lines are electrically connected to the pixel circuits and extend in a direction in the display area. A first detour line is disposed in the detour area and is electrically connected to a first driving line. A second detour line is disposed in the detour area. The second detour line is electrically connected to a second driving line and is disposed in a different layer from the first detour line.

Abstract: A display panel includes a base substrate, an active pattern on the base substrate, and including a first active pattern of a first transistor, and a second active pattern of a second transistor, a gate pattern on the base substrate, and including a first gate electrode that overlaps the first active pattern, and a second gate electrode that overlaps the second active pattern, an insulation layer covering the gate pattern, a first conductive pattern on the insulation layer, and electrically connected to the first gate electrode through a first contact hole formed through the insulation layer, and a second conductive pattern electrically connected to the second gate electrode through a second contact hole formed through the insulation layer, wherein each of the first contact hole and the second contact hole overlaps, partially overlaps, or does not overlap each of the first active pattern and the second active pattern, and wherein a first overlapped area at which the first active pattern overlaps the first con

Abstract: A display device according to example embodiments includes a display panel divided into a first area including a plurality of first area pixel rows and a second area including a plurality of second area pixel rows, the number of pixels of each of the second area pixel rows being less than the number of pixels of each of the first area pixel rows, a scan driver configured to provide a plurality of scan signals to the display panel based on a width of an active period of a clock signal, the scan signals being output having substantially the same width of active periods to each other, a data driver configured to provide a plurality of data signals to the display panel, and a timing controller configured to adjust the width of the active period of the clock signal within a frame period based on locations of the first area and the second area.

Abstract: A pixel and an organic light emitting diode (OLED) display using the pixel are disclosed. The pixel includes a driving transistor for transmitting a driving current, an OLED configured to receive a first portion of the driving current and a bypass transistor configured to receive a second portion of the driving current.

Abstract: A scan driver includes a plurality of scan driving blocks. Each of the scan driving blocks includes a first shift register including a plurality of driving transistors, the first shift register being configured to provide a first driving signal to a first driving node and to provide a second driving signal to a second driving node, a second shift register including a plurality of masking transistors, the second shift register being configured to provide a masking signal to a masking output node, and a buffer circuit including a plurality of buffer transistors, the buffer circuit being configured to provide scan signals. The buffer circuit outputs the scan signals that include the first pulse or the scan signals that include the first pulse and the second pulse based on the masking signal.