Abstract: A stage includes an output, an input, signal processors, and a stabilizer. The output supplies a voltage of a first or second power source to an output terminal based on voltages of first and second nodes. The input controls voltages of third and fourth nodes based on signals to a first and second input terminals. A first signal processor controls the voltage of the first node based on the voltage of the second node. A second signal processor is connected to a fifth node and controls the voltage of the first node based on a signal to a third input terminal. A third signal processor controls the voltage of the fourth node based on the voltage of the third node and the signal to the third input terminal. The stabilizer is connected between the second signal processor and input to control voltage drop widths of the third and fourth nodes.

Abstract: A display device according to example embodiments includes a display panel divided into a first area including a plurality of first area pixel rows and a second area including a plurality of second area pixel rows, the number of pixels of each of the second area pixel rows being less than the number of pixels of each of the first area pixel rows, a scan driver configured to provide a plurality of scan signals to the display panel based on a width of an active period of a clock signal, the scan signals being output having substantially the same width of active periods to each other, a data driver configured to provide a plurality of data signals to the display panel, and a timing controller configured to adjust the width of the active period of the clock signal within a frame period based on locations of the first area and the second area.

Abstract: An organic light emitting display device includes pixels connected to scan lines, data lines, and emission control lines to emit light components in response to amounts of current that flow from a first driving power source to a second driving power source, a sensing unit connected between the first or second driving power source and the pixels to measure to at least one of current and voltage, a controller to sense a control signal in response to at least one of the current and the voltage measured by the sensing unit, a timing controller to supply a plurality of emission start signals with different widths in a one frame period in response to the control signal when the organic light emitting display device is driven at a low frequency, and an emission driver to supply emission control signals to the emission control lines in response to the emission start signals.

Abstract: A display apparatus includes a substrate including a display area, a peripheral area surrounding the display area, a function-adding area, of which at least a portion is surrounded by the display area, and a detour area disposed between the display area and the function-adding area. The display apparatus includes a plurality of pixel circuits disposed in the display area. A plurality of driving lines are electrically connected to the pixel circuits and extend in a direction in the display area. A first detour line is disposed in the detour area and is electrically connected to a first driving line. A second detour line is disposed in the detour area. The second detour line is electrically connected to a second driving line and is disposed in a different layer from the first detour line.

Abstract: A display device includes a substrate including a first pixel area, a second pixel area, and a third pixel area, each of the second and third pixel areas having a smaller surface area than the first pixel area and being connected to the first pixel area, first to third pixels provided in the first to third pixel areas, respectively, first to third lines connected to the first to third pixels, respectively, a line connecting part connecting the second and third lines, and a dummy unit overlapping the line connecting part to compensate for a difference of a load value of the first line and a load value of the second line.

Abstract: A display device includes a substrate including a first pixel region, a second pixel region having an area smaller than that of the first pixel region, and a peripheral region surrounding the first pixel region and the second pixel region, a second pixel provided in the second pixel region, a second line connected to the second pixel, an extension line extended to the peripheral region, a dummy part located in the peripheral region to overlap with the extension line, a power line connected to the first and second pixel regions, and a connection line located in the peripheral region to be connected to the dummy part, the connection line being electrically connected to a portion of the second pixel region, wherein the second pixel region includes a first sub-pixel region connected to the connection line and a second sub-pixel region except the first sub-pixel region.

Abstract: A display panel includes a base substrate, an active pattern on the base substrate, and including a first active pattern of a first transistor, and a second active pattern of a second transistor, a gate pattern on the base substrate, and including a first gate electrode that overlaps the first active pattern, and a second gate electrode that overlaps the second active pattern, an insulation layer covering the gate pattern, a first conductive pattern on the insulation layer, and electrically connected to the first gate electrode through a first contact hole formed through the insulation layer, and a second conductive pattern electrically connected to the second gate electrode through a second contact hole formed through the insulation layer, wherein each of the first contact hole and the second contact hole overlaps, partially overlaps, or does not overlap each of the first active pattern and the second active pattern, and wherein a first overlapped area at which the first active pattern overlaps the first con

Abstract: A pixel includes an organic light emitting diode (OLED), a pixel circuit, and first and second transistors. The OLD includes a cathode electrode connected to a second power source. The pixel circuit includes a driving transistor having a gate electrode initialized by a third power source. The driving transistor controls the amount of current flowing from a first power source to the second power source via the OLED. The first transistor is connected between a fourth power source and the second power source and an anode electrode of the OLED. The first transistor is turned on based on a scan signal is supplied to a scan line. The second transistor is connected between a data line and the pixel circuit. The second transistor is turned on when the scan signal is supplied to the ith scan line.

Abstract: A stage includes an output, an input, signal processors, and a stabilizer. The output supplies a voltage of a first or second power source to an output terminal based on voltages of first and second nodes. The input controls voltages of third and fourth nodes based on signals to a first and second input terminals. A first signal processor controls the voltage of the first node based on the voltage of the second node. A second signal processor is connected to a fifth node and controls the voltage of the first node based on a signal to a third input terminal. A third signal processor controls the voltage of the fourth node based on the voltage of the third node and the signal to the third input terminal. The stabilizer is connected between the second signal processor and input to control voltage drop widths of the third and fourth nodes.

Abstract: A display apparatus includes a substrate including a display area, a peripheral area surrounding the display area, a function-adding area, of which at least a portion is surrounded by the display area, and a detour area disposed between the display area and the function-adding area. The display apparatus includes a plurality of pixel circuits disposed in the display area. A plurality of driving lines are electrically connected to the pixel circuits and extend in a direction in the display area. A first detour line is disposed in the detour area and is electrically connected to a first driving line. A second detour line is disposed in the detour area. The second detour line is electrically connected to a second driving line and is disposed in a different layer from the first detour line.

Abstract: A display device includes a substrate including a first pixel region, a second pixel region having an area smaller than that of the first pixel region, and a peripheral region surrounding the first pixel region and the second pixel region, a second pixel provided in the second pixel region, a second line connected to the second pixel, an extension line extended to the peripheral region, a dummy part located in the peripheral region to overlap with the extension line, a power line connected to the first and second pixel regions, and a connection line located in the peripheral region to be connected to the dummy part, the connection line being electrically connected to a portion of the second pixel region, wherein the second pixel region includes a first sub-pixel region connected to the connection line and a second sub-pixel region except the first sub-pixel region.

Abstract: A display device includes a first pixel region and a second pixel region having different widths. First pixels in the first pixel region each include a first transistor. Second pixels in the second pixel region each include a second transistor performing a same function as the first transistor. At least one of a channel width and a channel length of the first transistor of the first and second pixels is be different from one another.

Abstract: A display apparatus includes a substrate including a display area, a peripheral area surrounding the display area, a function-adding area, of which at least a portion is surrounded by the display area, and a detour area disposed between the display area and the function-adding area. The display apparatus includes a plurality of pixel circuits disposed in the display area. A plurality of driving lines are electrically connected to the pixel circuits and extend in a direction in the display area. A first detour line is disposed in the detour area and is electrically connected to a first driving line. A second detour line is disposed in the detour area. The second detour line is electrically connected to a second driving line and is disposed in a different layer from the first detour line.

Abstract: A display device is provided. The display device comprises a display panel including a plurality of signal pads and one or more dummy pads, and at least one flexible wiring board providing signals to the signal pads, wherein a maximum bias period of signals provided to a pair of adjacent signal pads with at least one dummy pad interposed therebetween is longer than a maximum bias period of signals provided to a pair of adjacent signal pads with no dummy pad disposed therebetween.

Abstract: An organic light emitting display device includes pixels connected to scan lines, data lines, and emission control lines to emit light components in response to amounts of current that flow from a first driving power source to a second driving power source, a sensing unit connected between the first or second driving power source and the pixels to measure to at least one of current and voltage, a controller to sense a control signal in response to at least one of the current and the voltage measured by the sensing unit, a timing controller to supply a plurality of emission start signals with different widths in a one frame period in response to the control signal when the organic light emitting display device is driven at a low frequency, and an emission driver to supply emission control signals to the emission control lines in response to the emission start signals.

Abstract: A scan driving circuit includes a plurality of stages, each having a shift register and a scan signal output unit. The shift register has a first node to receive a first driving voltage according to a control signal and a second node to receive the first driving voltage according to a reset signal. The scan signal output unit outputs scan signals to respective scan lines. The scan signal output unit has a plurality of clock switches controlled according to a voltage of the first node and a plurality of switches controlled according to a voltage of the second node. The clock switches sequentially output clock signals to respective third nodes, which are connected to respective scan lines. The switches output a second driving voltage to the third nodes.

Abstract: A display device is disclosed, and the display device includes a substrate including first to third display regions, the second and the third display regions being spaced from each other, each of the second and third display regions having an area smaller than that of the first display region and being continuous to the first display region, first to third pixels in the first to third display regions, first to third lines connected to the first to third pixels, and a dummy part configured to compensate for a difference between a load value of the first lines and load values of the second and third lines, wherein the second display region includes a first sub-region adjacent to the first display region and a second sub-region spaced from the first display region, and the third display region includes a third sub-region adjacent to the first display region and a fourth sub-region spaced from the first display region.

Abstract: A display apparatus includes a substrate including a display area, a peripheral area surrounding the display area, a function-adding area, of which at least a portion is surrounded by the display area, and a detour area disposed between the display area and the function-adding area. The display apparatus includes a plurality of pixel circuits disposed in the display area. A plurality of driving lines are electrically connected to the pixel circuits and extend in a direction in the display area. A first detour line is disposed in the detour area and is electrically connected to a first driving line. A second detour line is disposed in the detour area. The second detour line is electrically connected to a second driving line and is disposed in a different layer from the first detour line.

Abstract: A display device includes a substrate having a display area and a non-display area, a plurality of pixels in the display area, scan lines for supplying a scan signal to the pixels, the scan lines extending in a first direction, data lines for supplying a data signal to the pixels, the data lines extending in a second direction crossing the first direction, and a first dummy part in the non-display area, adjacent to an outermost pixel, connected to an outermost data line of the display area, forming a parasitic capacitor with the outermost pixel, and including a first dummy data line and a first dummy power pattern extending in parallel to the data lines.

Abstract: A scan driver includes a plurality of scan driving blocks. Each of the scan driving blocks includes a first shift register including a plurality of driving transistors, the first shift register being configured to provide a first driving signal to a first driving node and to provide a second driving signal to a second driving node, a second shift register including a plurality of masking transistors, the second shift register being configured to provide a masking signal to a masking output node, and a buffer circuit including a plurality of buffer transistors, the buffer circuit being configured to provide scan signals. The buffer circuit outputs the scan signals that include the first pulse or the scan signals that include the first pulse and the second pulse based on the masking signal.