Abstract: Disclosed in the present invention are a dynamic maximal clique enumeration device and method based on an FPGA with an HBM, the method including: the HBM stores a dynamic edge flow, a complete graph adjacency matrix, and candidate cliques; a matrix computing unit updates the complete graph adjacency matrix based on the dynamic edge flow, transmits the updated complete graph adjacency matrix to the HBM for storage, and determines header nodes, of which the corresponding candidate clique needs to be updated; a sequence computing unit constructs, according to the updated complete graph adjacency matrix and each header node to be updated, the sorted data set for reconstructing candidate cliques by data block sequencing; and an update computing unit executes, in parallel, an update task of the candidate clique corresponding to each header node to be updated based on the sorted data set, transmits the updated candidate cliques to the HBM for storage, and transmits the updated candidate cliques to the PC host to ext

Abstract: An infectious disease infection prediction method, an apparatus, and a storage medium based on macro-micrograph fusion are provided. The method includes: acquiring macrographs of a plurality of first regions and micrographs of second regions within a set period; inputting the macroscopic graphs and the microscopic graphs into two graph convolutional neural networks to obtain two hidden layer vectors respectively, and fusing the two hidden layer vectors to obtain fusion hidden layer information of the first regions; performing a time sequence calculation of the fusion hidden layer information to obtain time sequence hidden layer information of the first regions; inputting the time series hidden layer information into two prediction networks to obtain two prediction results, respectively, and performing fusion calculation of the two prediction results to obtain a final prediction result of infectious diseases in the first regions.

Abstract: A graph calculation method of RNA similarity analysis, an apparatus, a device, and a medium are provided. The method includes: converting sequence data of a looked-up RNA into a looked-up RNA structure graph; obtain a first similarity between the looked-up RNA structure graph and a target RNA structure graph; obtaining a second similarity based on the number of base constituent structures in the looked-up RNA structure graph and the number of base constituent structures in the target RNA structure graph; reconstructing the looked-up RNA structure graph based on the base constituent structures in the looked-up RNA structure graph to generate a looked-up RNA higher-order graph; and analyzing similarity between the looked-up RNA higher-order graph and a target RNA higher-order graph to obtain a third similarity; and obtaining a final similarity between the looked-up RNA and the target RNA based on the first similarity, the second similarity, and the third similarity.

Abstract: A method for preparing high-density magnesia-alumina spinel ceramic by low-temperature pressureless sintering, comprises: using MgAl2O4 powder as a raw material powder, adding calcium phosphate as a sintering aid and controlling the calcium element of the calcium phosphate to not exceed 500 ppm of the total mass of the raw material powder; and then performing pressureless sintering, thereby preparing a high-density magnesia-alumina spinel ceramic; the pressureless sintering includes normal pressure sintering or vacuum sintering.

Abstract: A field programmable solder BeTA (FPSBGA) module may be utilized to assemble PCB/Substrate in any stack-up configuration. The local field programmable soldering BGA includes control system provides the necessary feedback for effective control of thermal profiles. The FPSBGA enables a control component (110) to cause the execution of the temperature application component (120) to cause a non-uniform application of specified temperature parameters to the substrate.

Abstract: A multi-scale prediction method for an ablation behavior of a hypersonic aircraft heat resistant structure, includes inputting hypersonic inflow far field boundary conditions into a macro CFD solver to perform numerical simulation of the external flow field of a hypersonic aircraft; extracting the mass fraction and temperature distribution of wall surface components; obtaining an msd.txt file and an atomic path file recording the mean square displacement data through a micro RMD solver; obtaining the ratio of mass loss rate to material density, namely, the ablation retreating rate using the MSD method and Fick's law; inputting it into a CFD solver for performing grid reconstruction and transient calculation to obtain the transient variation in the external flow field of a hypersonic aircraft along the ablation retreating of the aircraft wall surface.

Abstract: The present disclosure provides a data storage system, including data cache module, data processing module, and a persistent memory. The data cache module includes an on-chip mapping data cache and an on-chip counter cache, where the mapping data cache is configured to cache mapping data, and when the free space of the mapping data cache is less than a preset threshold, the least recently used mapping data cache line will be evicted from the cache and written back to the persistent memory. The data processing module encrypts/decrypts persistent memory data by using their counters, and accesses the persistent memory blocks indicated by their corresponding mapping data. The persistent memory comprises the first and second storage regions for the latest checkpoint data and modified working data in the current checkpoint interval respectively.

Abstract: The present disclosure provides a distance detection device. The distance detection device includes a light source configured to emit pulse light beams sequentially; and a scanning module including a first optical module, a second optical module, and drivers. The first optical module and the second optical module are sequentially positioned on an optical path of the light beams emitted by the light source, the drivers drive the first optical module and the second optical module to move to sequentially project the light beams emitted by the light source to different directions and form a strip-shaped scanning range after being emitted from the scanning module.

Abstract: A size of a transform block is identified. A transform type for the transform block is identified. The transform type includes a horizontal transform type and a vertical transform type. Identifying the transform type includes determining whether the size of the transform block is below a predefined block size; and, in response to determining that the size is below the predefined block size, selecting a default transform type for each of the horizontal transform type and the vertical transform type. The transform type is then applied to the transform block. The default transform type can be the discrete cosine transform (DCT).

Abstract: An optical combiner and a display device are provided. The optical combiner includes a light-transmitting structure and a waveguide structure in the light-transmitting structure. The waveguide structure includes a first dielectric layer, a waveguide plate, and a second dielectric layer arranged in sequence. The waveguide plate includes a coupling-out region, wherein the refractive index of the first dielectric layer and the refractive index of the second dielectric layer are both less than the refractive index of the waveguide plate. Since the refractive index of the first dielectric layer and the refractive index of the second dielectric layer are both less than the refractive index of the waveguide plate, light beams propagating in the waveguide plate undergo totally reflection during propagation and cannot be refracted into the first dielectric layer and the second dielectric layer.

Abstract: A stacked grating and an AR display device are provided. The stacked grating includes at least two grating layers stacked from bottom to top sequentially. Grating grooves are arranged in each of the grating layers in a distribution pattern. The distribution patterns of the grating grooves in a horizontal direction are distinct from each other for each two adjacent ones of the grating layers, and the distribution patterns of the grating grooves of two grating layers arranged with one grating layer between them in the horizontal direction are the same. As such, the stacked grating is equivalent to a bulk grating, and the transmission/reflection selectivity of grating diffraction is improved, thus reducing privacy disclosure and increasing the energy utilization rate.

Abstract: Aspects of this disclosure relate to power delivery to chips in an array. An array of power conversion paths can be positioned vertically relative to the chips of the array. A power conversion path can convert a high voltage, low current signal to a low voltage, high current. The power conversion path can include a first power conversion stage and a second power conversion stage. The power conversion path can be implemented in a power supply module, for example.

Abstract: A method, an apparatus and a computer device for detecting an open circuit fault are provided. The sample data of the electrical signal at the primary side of the transformer in the CLLLC resonant bidirectional DC/DC converter is performed with spectrum analysis to obtain a first frequency, and whether an open circuit fault occurs in the CLLLC resonant bidirectional DC/DC converter can be determined according to the first frequency and an actual switching frequency.

Abstract: The systems, methods, and devices disclosed herein relate to a multi-layer structures arranged in a vertically orientation. In some embodiments, a computing assembly can include a first cooling system, a first electronics layer, a second cooling system, and a second electronics layer. The first cooling system can be disposed on top of and can be in thermal communication with the first electronics layer. The first electronics layer array includes an array of integrated circuit dies that are in electronic communication with each other in a plane that is orthogonal to power delivery. The first electronics layer can be disposed on top of and can be in thermal communication with the second cooling system, and the second cooling system can be disposed on top of and can be in thermal communication with the second electronics layer. The second electronics layer includes an array of power delivery modules. In some embodiments, at least one layer can use system on wafer packaging.

Abstract: Systems and methods of for vertical power and clock delivery are disclosed. In some embodiments, a computing system can include an array of chips comprising a chip and a power delivery module configured to provide a power supply voltage and one or more clock signals to the chip, the power delivery module being positioned vertically relative to the chip, and the chip configured to vertically receive the one or more clock signals from the power delivery module.

Abstract: A data classification method and apparatus, a device and a storage medium. A structural feature of the respective node in graph data may be determined according to a neighbor node of the respective node in the graph data through a deviation between the decoded feature obtained by decoding the embedded coding feature of the respective node in the graph data and the initial feature of the respective node, and then the embedded coding feature corresponding to the respective node is adjusted according to the decoded feature of the respective node and the structural feature of the respective node in the graph data to obtain the adjusted feature corresponding to the respective node, so that accuracy of an obtained feature of the respective node is improved, and thus accuracy of data classification may be improved.

Abstract: A genetically engineered bacterium and a preparation method and use thereof are disclosed. The genetically engineered bacteria contain a gene encoding ?-1,2-fucosyltransferase, and a gene encoding a protein tag is connected to the gene encoding ?-1,2-fucosyltransferase; the protein tag is MBP, SUMO1, SUMO2 or TrxA, the amino acid sequence of the MBP is shown in SEQ ID NO: 2, the amino acid sequence of the SUMO1 is shown in SEQ ID NO: 3, the amino acid sequence of the SUMO2 is shown in SEQ ID NO: 4, the amino acid sequence of the TrxA is shown in SEQ ID NO: 5. Fermentation with the genetically engineered bacteria can greatly increase the yield of 2?-fucosyllactose compared to the genetically engineered bacteria that only expresses ?-1,2-fucosyltransferase exogenously, and the yield can be more than doubled in a preferred case.

Abstract: The present disclosure provides a data storage system, including data cache module, data processing module, and a persistent memory. The data cache module includes an on-chip mapping data cache and an on-chip counter cache, where the mapping data cache is configured to cache mapping data, and when the free space of the mapping data cache is less than a preset threshold, the least recently used mapping data cache line will be evicted from the cache and written back to the persistent memory. The data processing module encrypts/decrypts persistent memory data by using their counters, and accesses the persistent memory blocks indicated by their corresponding mapping data. The persistent memory comprises the first and second storage regions for the latest checkpoint data and modified working data in the current checkpoint interval respectively.

Abstract: Systems, methods, devices and storage media for graph data processing are provided. In one aspect, a graph data processing system includes a memory and a plurality of processing units, and each processing unit is provided with a decision module. Each processing unit is configured to determine set operations required for extracting one or more subgraphs matching a specified graph pattern from target graph data according to a preset graph pattern matching algorithm. Then, for each set operation, the decision module is configured to determine a cost value corresponding to a performance of the processing unit occupied to execute the set operation in accordance with different execution policies, and further select a target execution policy with a smallest cost value to execute the set operation.