Patents by Inventor Jing-Meng Liu

Jing-Meng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Amplifier circuit with internal zeros
    Patent number: 7652536
    Abstract: An amplifier circuit with internal zeros provides a second pole in addition to a first pole and two zeros such that the second pole can prevent excessive gain at high frequency, so as to have high-frequency noise under control.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: January 26, 2010
    Assignee: Richtek Technology Corp.
    Inventors: Hung-Der Su, Jing-Meng Liu, An-Tung Chen, Pao-Chuan Lin
  • Capacitor charger with a modulated current varying with an input voltage and method thereof
    Patent number: 7619394
    Abstract: In a capacitor charger including a transformer having a primary winding connected with an input voltage and a secondary winding for transforming a primary current flowing through the primary winding to a secondary current flowing through the secondary winding, the primary current is adjusted according to a monitoring voltage varying with the input voltage, thereby prolonging the lifetime of the battery that provides the input voltage and improving the power efficiency of the battery.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: November 17, 2009
    Assignee: Richtek Technology Corp.
    Inventors: Chung-Lung Pai, Kwan-Jen Chu, Chun-Yen Huang, Jing-Meng Liu
  • Reduction of power consumption and EMI of a switching amplifier
    Publication number: 20090243722
    Abstract: A switching amplifier has a network including current sources and resistors connected to the two output terminals of the H-bridge of the switching amplifier, to provide a small current to the load connected between the two output terminals at zero input, whereby the common mode voltage bouncing is reduced and the switching amplifier has less power consumption and reduced electro-magnetic interference.
    Type: Application
    Filed: March 24, 2009
    Publication date: October 1, 2009
    Inventors: Jing-Meng Liu, Jwin-Yen Guo, Shao-Ming Sun
  • Power-saving control circuit and method for OLED panel
    Patent number: 7595596
    Abstract: The present invention discloses a power-saving control circuit for an OLED panel, comprising: a plurality of OLEDs respectively located in a corresponding plurality of paths; a current amount determination circuit determining current amounts on the plurality of paths; a voltage supply circuit under control by a control signal, for providing an output voltage to the current amount determination circuit; and a matching feedback adjustment circuit for generating the control signal according to a difference among the current amounts of the plurality of paths.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: September 29, 2009
    Assignee: Richtek Technology Corporation
    Inventor: Jing-Meng Liu
  • Single-chip common-drain JFET device and its applications
    Publication number: 20090237062
    Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.
    Type: Application
    Filed: April 17, 2009
    Publication date: September 24, 2009
    Inventors: Liang-Pin Tai, Jing-Meng Liu, Hung-Der Su
  • LED control circuit and method, and insect resistive LED lamp
    Publication number: 20090236997
    Abstract: A LED control circuit and method generate a high frequency clock signal with a fixed duty for a LED driver, to supply a switching current to drive a LED to emit light flashing at a modulated high frequency and with a fixed duty. By controlling the flashing LED light within certain flashing frequency range, the circuit and method allow a LED light source for expelling, confusing or trapping insects but serving only an illuminative or decorative purpose to human eyes, due to the difference between human beings and insects in visual perception of flashing frequencies.
    Type: Application
    Filed: March 19, 2009
    Publication date: September 24, 2009
    Inventor: Jing-Meng Liu
  • Single-chip common-drain JFET device and its applications
    Publication number: 20090206922
    Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.
    Type: Application
    Filed: April 17, 2009
    Publication date: August 20, 2009
    Inventors: Liang-Pin Tai, Jing-Meng Liu, Hung-Der Su
  • Single-chip common-drain JFET device and its applications
    Publication number: 20090206921
    Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.
    Type: Application
    Filed: April 17, 2009
    Publication date: August 20, 2009
    Inventors: Liang-Pin Tai, Jing-Meng Liu, Hung-Der Su
  • Cross-interference reduction of a buck power converter
    Publication number: 20090206663
    Abstract: A power converter includes a first conversion stage for converting an input voltage to a first output voltage and a second conversion stage for converting the first output voltage to a second output voltage. An error signal is generated according to a reference voltage and a feedback signal extracted from the second conversion stage, and a feed forward signal is generated from the error signal and injected into the first conversion stage to stabilize the first output voltage. The feedback signal is a function of the second output voltage and thus, the error signal varies with the second output voltage. As a result, the first output voltage will be stabilized when the second output voltage varies, due to the varied feed forward signal.
    Type: Application
    Filed: February 18, 2009
    Publication date: August 20, 2009
    Inventor: Jing-Meng Liu
  • Single-chip common-drain JFET device and its applications
    Publication number: 20090201078
    Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.
    Type: Application
    Filed: April 17, 2009
    Publication date: August 13, 2009
    Inventors: Liang-Pin Tai, Jing-Meng Liu, Hung-Der Su
  • Single-chip common-drain JFET device and its applications
    Publication number: 20090201079
    Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.
    Type: Application
    Filed: April 17, 2009
    Publication date: August 13, 2009
    Inventors: Liang-Pin Tai, Jing-Meng Liu, Hung-Der Su
  • Backlight control circuit
    Patent number: 7573211
    Abstract: The present invention discloses a backlight control circuit, comprising: a voltage supply circuit, which is a boost converter circuit for receiving an input voltage from an input terminal and generating an output voltage to an output terminal, the output voltage being provided as an operating voltage for a plurality of light emitting devices; at least one input capacitor electrically connected between the input terminal and ground; and at least one output capacitor electrically connected between the output terminal and the input terminal.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: August 11, 2009
    Assignee: Richtek Technology Corporation
    Inventor: Jing-Meng Liu
  • Capacitor charger with a modulated current varying with an input voltage and method thereof
    Publication number: 20090195221
    Abstract: In a capacitor charger including a transformer having a primary winding connected with an input voltage and a secondary winding for transforming a primary current flowing through the primary winding to a secondary current flowing through the secondary winding, the primary current is adjusted according to a monitoring voltage varying with the input voltage, thereby prolonging the lifetime of the battery that provides the input voltage and improving the power efficiency of the battery.
    Type: Application
    Filed: March 30, 2009
    Publication date: August 6, 2009
    Inventors: Chung-Lung Pai, Kwan-Jen Chu, Chun-Yen Huang, Jing-Meng Liu
  • Power supply circuit and control method thereof
    Patent number: 7557553
    Abstract: A power supply circuit and a control method are provided, in which the original enable pad and output pad, or the enable pad and feedback pad are used to trim the output voltage of the power supply circuit without extra trim pads.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: July 7, 2009
    Assignee: Richtek Technology Corp.
    Inventors: Hung-Der Su, Jing-Meng Liu
  • Single-chip common-drain JFET device and its applications
    Patent number: 7535032
    Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: May 19, 2009
    Assignee: Richtek Technology Corp.
    Inventors: Liang-Pin Tai, Jing-Meng Liu, Hung-Der Su
  • PULSE WIDTH MODULATION REGULATOR SYSTEM WITH AUTOMATICALLY SWITCHING PULSE SKIPPING MODE
    Publication number: 20090115389
    Abstract: A pulse width modulation (PWM) Regulator System with automatically switching pulse skipping mode (PSM) is disclosed. The PWM regulator system comprises a PWM regulator, a PSM switching module and a pulse generator. The PWM regulator converts the input voltage by PWM. The PSM switching module determines to enter or exit the PSM. The pulse generator adaptively produces pulse signal for the switching regulator to operate in PSM.
    Type: Application
    Filed: January 6, 2009
    Publication date: May 7, 2009
    Inventors: Kwan-Jen Chu, Chung-Lung Pai, Po-Shun Chung, Jing-Meng Liu
  • Universal serial bus charger circuit and charging method
    Publication number: 20090102431
    Abstract: The present invention discloses a universal serial bus (USB) charging circuit, comprising: a charging path for charging a battery from a USB host; a charging switch located on the charging path; a current sensing circuit for sensing current information on the charging path; a maximum available current detection circuit for detecting the maximum available current from the USB host; and a loop controller circuit for controlling the charging switch so that the charging current on the charging path is substantially equal to the maximum available current detected by the maximum available current detection circuit, wherein the maximum available current detection circuit detects the maximum available current during circuit initialization and stores it.
    Type: Application
    Filed: September 18, 2008
    Publication date: April 23, 2009
    Inventors: Nien-Hui Kung, Kwan-Jen Chu, Jing-Meng Liu
  • Control circuit and method for a fly-back voltage converter
    Patent number: 7518888
    Abstract: In a fly-back voltage converter that includes a transformer to transform a primary current to a secondary current and a switch serially coupled to the primary winding to switch the primary current in response to a control signal, a detection signal is produced by comparing the secondary current with two threshold values after the primary current is switched off to trigger the next on-time cycle of the switch. Once the secondary current is detected to be greater than a first threshold value, it is determined that the secondary current has been switched on, and until the secondary current is detected to be lower than a second threshold value, it is determined that the secondary current is to be switched off. The hysteresis range of the threshold values prevents error detection of the secondary current.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: April 14, 2009
    Assignee: Richtek Technology Corp.
    Inventors: Kwan-Jen Chu, Chung-Lung Pai, Yuan-Huang Cheng, Jing-Meng Liu
  • MULTI-COLOR BACKLIGHT CONTROL CIRCUIT AND MULTI-COLOR BACKLIGHT CONTROL METHOD
    Publication number: 20090066261
    Abstract: The present invention discloses a multi-color backlight control circuit, comprising: a plurality of pins for electrically connecting with a plurality of LED strings of different LED colors; and a voltage supply circuit for receiving an input voltage and supplying a single output voltage to the plurality of LED strings of different LED colors. The present invention also discloses a multi-color backlight control method, comprising: supplying a single output voltage to a plurality of LED strings of different LED colors.
    Type: Application
    Filed: September 7, 2007
    Publication date: March 12, 2009
    Inventor: Jing-Meng Liu
  • Spacer process for CMOS fabrication with bipolar transistor leakage prevention
    Publication number: 20090042395
    Abstract: A two-step spacer etch is used for the formation of a spacer in CMOS fabrication. A dry etch is first applied to remove part of the spacer material on the silicon substrate and leave a thin layer of the spacer material remained on the silicon substrate. Then, a wet etch is applied to completely remove the thin layer of the spacer material on the silicon substrate. The wet etch has good etch selectivity between the spacer material and silicon, and thus will not damage the surface of the silicon substrate when the spacer is formed. Therefore, the BJT on the silicon substrate is prevented from junction leakage.
    Type: Application
    Filed: October 14, 2008
    Publication date: February 12, 2009
    Inventors: Chien-Ling Chan, Jing-Meng Liu, Hung-Der Su