Abstract: The present invention discloses a method for single-wire transmission without clock synchronization, comprising: providing three states; defining a spacing bit by a first state of the three states; and defining data signals, a start signal and an end signal by combinations of the second and third states of the three states.

Abstract: A plurality of switches, an inductor and two capacitors are configured to be a boost-inverting converter. To operate the converter in a boost-inverting mode, a control apparatus and method switch the switches such that the inductor is energized in a first phase, the first capacitor is discharged to produce an inverting voltage in a second phase, and the capacitor Cout1 is discharged to produce the inverting voltage and the second capacitor is charged to produce a boost voltage in a third phase. Therefore, the boost-inverting converter has lower peak inductor current and less power loss, and the limitation to the switch design for the boost-inverting converter is relaxed.

Abstract: Two step driving technique is used to turn on the power switch of a power management apparatus in such a manner that the power switch is weakly turned on first and then goes into a low ON-resistance region. The power switch is so avoided to operate at highest gate and drain voltages simultaneously even a non-uniform turn on happens, and is thereby away from avalanche breakdown. The safe operation region of the power management apparatus is therefore extended with minimum efficiency degradation.

Abstract: The present invention discloses a level shift circuit which comprises: level shift means for receiving an input of a first operational voltage and generating an output of a second operational voltage; and a current path connecting with a source of the second operational voltage and providing current to the output of the level shift means to speed up output level switching. The circuit preferably further comprises a power consumption control circuit for stopping excess power consumption when the output of the level shift means has substantially accomplished level switching.

Abstract: A backlight power controller chip comprises a control circuit connected to two switches to turn on and off two display panels of a dual panel display handheld apparatus. The controller chip individually switches the two switches to control the backlight sources of the two display panels. The controller chip is available for various types of display panels.

Abstract: A power supply circuit and a control method are provided, in which the original enable pad and output pad, or the enable pad and feedback pad are used to trim the output voltage of the power supply circuit without extra trim pads.

Abstract: A method, which is for determining switching state of a transistor-based switching device that includes a set of transistors, includes the steps of: applying a bias voltage to a transistor having a fastest response so as to dispose the transistors in the set in a desired transistor state; detecting a voltage level at a transistor having a slowest response to the bias voltage; and comparing the detected voltage level with a predetermined threshold voltage level in order to determine the switching state of the switching device. A transistor-based switching device is also disclosed.

Abstract: Electronic circuits use low-cost depletion-mode JFET to serve as power switch. Since depletion-mode JFET has smaller conductive resistance and is majority carrier device, the energy loss is less when current flows through the depletion-mode JFET, and faster switching speed is obtained, thereby enhancing the efficiency of the electronic circuits.

Abstract: Electronic circuits use low-cost depletion-mode JFET to serve as power switch. Since depletion-mode JFET has smaller conductive resistance and is majority carrier device, the energy loss is less when current flows through the depletion-mode JFET, and faster switching speed is obtained, thereby enhancing the efficiency of the electronic circuits.

Abstract: In a lateral DMOS device which has a drain diffusion region, an insulator is provided on the drain diffusion region. The insulator is helpful to reduce the lateral electric field under silicon surface. The gate of the DMOS does not overlap with the insulator over the drain diffusion region such that the lateral DMOS device is insensitive to oxide corner loss.

Abstract: In a synchronized data communication on a one-wired bus, it transmits and receives a synchronizing signal that segments part of or all proportions of the data signal by use of three electrically distinguishable statuses for the identifier of the synchronizing signal and the logic states of the data signal to increase the endurance of frequency displacement and resist influences of the interference of external conditions, low quality of transmission medium, and limitation of transmission distance and make the reliability and correctness of the signal transmission improve substantially. It is also clearly illustrated the feasibility and simplicity for implementing the one-wired synchronized communication by a plurality of exemplary signal types and a transceiver circuitry.

Abstract: In a capacitor charger, a transformer has a primary winding connected between an input voltage and a switch for generating a primary current flowing through the primary winding by switching the switch to thereby induce a secondary current flowing through a secondary winding of the transformer and a secondary voltage tapered from the secondary winding, a control apparatus and method adjusts the on-time period for the switch in response to the input voltage. The charging time and charging current are independent of the input voltage, and there is no power loss resulted from current sense to the primary current.

Abstract: A voltage generating circuit, which generates tri-state logic output in accordance with high, low or floating of the input node, is proposed.

Abstract: A pulse width modulation (PWM) Regulator System with automatically switching pulse skipping mode (PSM) is disclosed. The PWM regulator system comprises a PWM regulator, a PSM switching module and a pulse generator. The PWM regulator converts the input voltage by PWM. The PSM switching module determines to enter or exit the PSM. The pulse generator adaptively produces pulse signal for the switching regulator to operate in PSM.

Abstract: In a fly-back voltage converter that includes a transformer to transform a primary current to a secondary current and a switch serially coupled to the primary winding to switch the primary current in response to a control signal, a detection signal is produced by comparing the secondary current with two threshold values after the primary current is switched off to trigger the next on-time cycle of the switch. Once the secondary current is detected to be greater than a first threshold value, it is determined that the secondary current has been switched on, and until the secondary current is detected to be lower than a second threshold value, it is determined that the secondary current is to be switched off. The hysteresis range of the threshold values prevents error detection of the secondary current.

Abstract: A power metal oxide semiconductor transistor layout is disclosed. The power metal oxide semiconductor transistor layout uses network of conductive lead line as a connection or a network connection to connect source and drain regions thereby achieves advantages of a high uniformity of current, low Rds_on, much less power loss, an actual line density two times larger than that of conventional layouts and a strengthened resistance to electron migration.

Abstract: A plurality of switches, an inductor and two capacitors are configured to be a boost-inverting converter. To operate the converter in a boost-inverting mode, a control apparatus and method switch the switches such that the inductor is energized in a first phase, the first capacitor is discharged to produce an inverting voltage in a second phase, and the second capacitor is charged to produce a boost voltage in a third phase. Therefore, the boost-inverting converter has lower peak inductor current and less power loss, and the limitation to the switch design for the boost-inverting converter is relaxed.

Abstract: In a voltage converter with a high-side short-circuit protection before an input voltage provided by a high-voltage power supply reaches a first threshold, a driver detects the input voltage and the output voltage of the converter to turn on the low-side transistor of the converter and turn off the high-voltage power supply when the input voltage ranges between the first threshold and a second threshold and the output voltage reaches a third threshold, to thereby avoid damages to the circuit connected to the output node of the converter. The driver comprises a front-end drive circuit to switch the high-side and low-side transistors and a low-voltage logic control circuit for the turning-on of the low-side transistor.

Abstract: A power metal oxide semiconductor transistor layout is disclosed. The power metal oxide semiconductor transistor layout uses network of conductive lead line as a connection or a network connection to connect source and drain regions thereby achieves advantages of a high uniformity of current, low Rds_on, much less power loss, an actual line density two times larger than that of conventional layouts and a strengthened resistance to electron migration.

Abstract: In an apparatus for over-voltage and over-current protection for a step-up current-mode converter including an inductor connected via a phase node to a switch that is switched by a control signal to convert an input voltage to an output voltage, a controller has a multiplexed pin, and a resistor and a capacitor are connected in parallel between the multiplexed pin and the phase node. In an over-voltage protection mode, the controller senses the voltage on the multiplexed pin, and in an over-current protection mode, the controller supplies a current to flow through the resistor and senses the voltage on the multiplexed pin.